From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30764C433EF for ; Tue, 22 Feb 2022 15:42:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233189AbiBVPnB (ORCPT ); Tue, 22 Feb 2022 10:43:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39080 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231670AbiBVPm6 (ORCPT ); Tue, 22 Feb 2022 10:42:58 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5FA532ECF; Tue, 22 Feb 2022 07:42:32 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 7A7F2B81B2C; Tue, 22 Feb 2022 15:42:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4EA6C340E8; Tue, 22 Feb 2022 15:42:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645544550; bh=4//NcDkbCERxvJD9pSnHOA7+fCOtUfqFIgkJBXt7Bxw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=oMrjiGwzkNhehM5e/m5igP2WP2AFF48DTnt5KgURuJWQoSW3KSUPZxYZEKjOdQvjr 2gRO+dqerQYnVRHcs4q+V4IPU3VabswmccDV6Y4Vmfdyj2pIXUtMJ8ujt77+E+QKm2 8qCEQReDfP/OkW5TSicFrengRStVVwu7z9ewvSk320gtn3GByvTMVcwPAG5fXf+6v3 HFiLwcWg089FBzgoIe91tH9mx5lnjIOJetI+vnuhhaaqfp0Qc+iG6qoIv00sy+oAor blJi/ZQnZ1iW1KkC7ceTCRHxqWxuWi2hptm9nl/5nfdO7VnLStsg9iTq4trG/IlpVz Ug532c9ww8LgA== Received: by pali.im (Postfix) id B9EBDFDB; Tue, 22 Feb 2022 16:42:26 +0100 (CET) Date: Tue, 22 Feb 2022 16:42:26 +0100 From: Pali =?utf-8?B?Um9ow6Fy?= To: Lorenzo Pieralisi Cc: robh+dt@kernel.org, Bjorn Helgaas , Thomas Petazzoni , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?utf-8?B?QmVow7pu?= , Russell King , Marc Zyngier , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 10/11] PCI: mvebu: Implement support for legacy INTx interrupts Message-ID: <20220222154226.mwu7d3silgmwzeqc@pali> References: <20220105150239.9628-1-pali@kernel.org> <20220112151814.24361-1-pali@kernel.org> <20220112151814.24361-11-pali@kernel.org> <20220211171917.GA740@lpieralisi> <20220211175202.gku5pkwn5wmjo5al@pali> <20220216234039.stxv5ndd6ai23sbb@pali> <20220222102057.GA17238@lpieralisi> <20220222105129.jg5kwmhvhggsv72n@pali> <20220222152409.GA18799@lpieralisi> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220222152409.GA18799@lpieralisi> User-Agent: NeoMutt/20180716 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 22 February 2022 15:24:09 Lorenzo Pieralisi wrote: > On Tue, Feb 22, 2022 at 11:51:29AM +0100, Pali Rohár wrote: > > On Tuesday 22 February 2022 10:21:06 Lorenzo Pieralisi wrote: > > > On Thu, Feb 17, 2022 at 12:40:39AM +0100, Pali Rohár wrote: > > > > On Friday 11 February 2022 18:52:02 Pali Rohár wrote: > > > > > On Friday 11 February 2022 17:19:17 Lorenzo Pieralisi wrote: > > > > > > On Wed, Jan 12, 2022 at 04:18:13PM +0100, Pali Rohár wrote: > > > > > > > This adds support for legacy INTx interrupts received from other PCIe > > > > > > > devices and which are reported by a new INTx irq chip. > > > > > > > > > > > > > > With this change, kernel can distinguish between INTA, INTB, INTC and INTD > > > > > > > interrupts. > > > > > > > > > > > > > > Note that for this support, device tree files has to be properly adjusted > > > > > > > to provide "interrupts" or "interrupts-extended" property with intx > > > > > > > interrupt source, "interrupt-names" property with "intx" string and also > > > > > > > 'interrupt-controller' subnode must be defined. > > > > > > > > > > > > > > If device tree files do not provide these nodes then driver would work as > > > > > > > before. > > > > > > > > > > > > Nit: this information is not useful. DT rules are written in DT > > > > > > bindings, not in kernel commit logs. All I am saying is that firmware > > > > > > developers should not have to read this log to write firmware. > > > > > > > > > > It was not intended for firmware developers, but for reviewers of this > > > > > patch to understand, what is happening in code and that with old DT > > > > > files this patch does not change driver behavior (= work as before). > > > > > > > > > > > > Signed-off-by: Pali Rohár > > > > > > > --- > > > > > > > drivers/pci/controller/pci-mvebu.c | 185 +++++++++++++++++++++++++++-- > > > > > > > 1 file changed, 177 insertions(+), 8 deletions(-) > > > > > > > > > > > > > > diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c > > > > > > > index 1e90ab888075..dbb6ecb4cb70 100644 > > > > > > > --- a/drivers/pci/controller/pci-mvebu.c > > > > > > > +++ b/drivers/pci/controller/pci-mvebu.c > > > > > > > @@ -54,9 +54,10 @@ > > > > > > > PCIE_CONF_ADDR_EN) > > > > > > > #define PCIE_CONF_DATA_OFF 0x18fc > > > > > > > #define PCIE_INT_CAUSE_OFF 0x1900 > > > > > > > +#define PCIE_INT_UNMASK_OFF 0x1910 > > > > > > > > > > > > Nit: I understand it is tempting but here you are redefining or better > > > > > > giving a proper label to a register. Separate patch please. > > > > > > > > > > Ok! > > > > > > > > > > > > +#define PCIE_INT_INTX(i) BIT(24+i) > > > > > > > #define PCIE_INT_PM_PME BIT(28) > > > > > > > -#define PCIE_MASK_OFF 0x1910 > > > > > > > > > > > > See above. > > > > > > > > > > > > > -#define PCIE_MASK_ENABLE_INTS 0x0f000000 > > > > > > > +#define PCIE_INT_ALL_MASK GENMASK(31, 0) > > > > > > > #define PCIE_CTRL_OFF 0x1a00 > > > > > > > #define PCIE_CTRL_X1_MODE 0x0001 > > > > > > > #define PCIE_CTRL_RC_MODE BIT(1) > > > > > > > @@ -110,6 +111,9 @@ struct mvebu_pcie_port { > > > > > > > struct mvebu_pcie_window iowin; > > > > > > > u32 saved_pcie_stat; > > > > > > > struct resource regs; > > > > > > > + struct irq_domain *intx_irq_domain; > > > > > > > + raw_spinlock_t irq_lock; > > > > > > > + int intx_irq; > > > > > > > }; > > > > > > > > > > > > > > static inline void mvebu_writel(struct mvebu_pcie_port *port, u32 val, u32 reg) > > > > > > > @@ -235,7 +239,7 @@ static void mvebu_pcie_setup_wins(struct mvebu_pcie_port *port) > > > > > > > > > > > > > > static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port) > > > > > > > { > > > > > > > - u32 ctrl, lnkcap, cmd, dev_rev, mask; > > > > > > > + u32 ctrl, lnkcap, cmd, dev_rev, unmask; > > > > > > > > > > > > > > /* Setup PCIe controller to Root Complex mode. */ > > > > > > > ctrl = mvebu_readl(port, PCIE_CTRL_OFF); > > > > > > > @@ -288,10 +292,30 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port) > > > > > > > /* Point PCIe unit MBUS decode windows to DRAM space. */ > > > > > > > mvebu_pcie_setup_wins(port); > > > > > > > > > > > > > > - /* Enable interrupt lines A-D. */ > > > > > > > - mask = mvebu_readl(port, PCIE_MASK_OFF); > > > > > > > - mask |= PCIE_MASK_ENABLE_INTS; > > > > > > > - mvebu_writel(port, mask, PCIE_MASK_OFF); > > > > > > > + /* Mask all interrupt sources. */ > > > > > > > + mvebu_writel(port, ~PCIE_INT_ALL_MASK, PCIE_INT_UNMASK_OFF); > > > > > > > + > > > > > > > + /* Clear all interrupt causes. */ > > > > > > > + mvebu_writel(port, ~PCIE_INT_ALL_MASK, PCIE_INT_CAUSE_OFF); > > > > > > > + > > > > > > > + if (port->intx_irq <= 0) { > > > > > > > + /* > > > > > > > + * When neither "summary" interrupt, nor "intx" interrupt was > > > > > > > + * specified in DT then unmask all legacy INTx interrupts as in > > > > > > > + * this case driver does not provide a way for masking and > > > > > > > + * unmasking of individual legacy INTx interrupts. In this case > > > > > > > + * all interrupts, including legacy INTx are reported via one > > > > > > > + * shared GIC source and therefore kernel cannot distinguish > > > > > > > + * which individual legacy INTx was triggered. These interrupts > > > > > > > + * are shared, so it should not cause any issue. Just > > > > > > > + * performance penalty as every PCIe interrupt handler needs to > > > > > > > + * be called when some interrupt is triggered. > > > > > > > + */ > > > > > > > > > > > > This comment applies to current mainline right (ie it describes how > > > > > > current mainline handles INTx) ? IMO you should split it out in a > > > > > > separate patch. > > > > > > > > > > This above comment describe what happens in if-branch when intx_irq is > > > > > not set (as written in comment "when intx interrupt was not specified in > > > > > DT"). You are right that this is also the behavior in the current > > > > > mainline. > > > > > > > > > > I'm not sure if this comment can be split out as support for "intx" > > > > > interrupt is in this patch. > > > > > > > > > > > I understand it is hard but a patch is a logical _change_, this > > > > > > comment is a change per se, it is a clarification on current > > > > > > behaviour. > > > > > > > > > > Ok, I could try to split this comment into two patches, but part about > > > > > if-branch comment needs to stay in "this" patch. > > > > > > > > I have done it locally. > > > > > > > > Let me know when I should resend this patch series and I will include > > > > into it also these changes. > > > > > > Hi, > > > > > > yes please resend it and I will merge it. > > > > Done! > > https://lore.kernel.org/linux-pci/20220222104625.28461-1-pali@kernel.org/T/#u > > Can you rebase it please on top of my pci/mvebu branch ? > > https://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git/ > > Forgive me, I forgot to mention that, thanks. > > Lorenzo Ok! I rebased V3 on top of c3bd7dc553eea5a3595ca3aa0adee9bf83622a1f (pci/mvebu branch in your repo), fixed conflicts and pushed to my git repo https://git.kernel.org/pub/scm/linux/kernel/git/pali/linux.git/ as commit 42402f0cfc362ffb0b7e464f420d6ead342dab2b (lpieralisi-pci-mvebu branch). It is enough? Or do you want me to resend it via emails? From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A8DE1C433F5 for ; Tue, 22 Feb 2022 15:47:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4Zho0ut5c+j0d9QqiQT153n9L6RiDMUJVV2V/SAH3y8=; b=jX4FzWc06URBx2 haADdAx12Y6BZC2WKlZGrG57cVy4SI7gBgv+nrURyTXDtG6i9j9NhOoShFOLotUahh7pFUgjGi30J P1TXc09iNSMnpAj5PYD+BhwZrPj+FUOTaULdjztw4r5gAo8x+OIqFYtNIBSkhjA04X/VfQFes8fZ9 5icV3PRffbbMwjTL5+qEpQHwHZ/eBFXnbDhfVrSwwLzxsrRWCQlTO2VsPEtcSTtxY4XpFmNRpWlFK Fsh9A6HpGZOWJY7R56rG66+LJpuY1yq32upTUn8yJCS4BOE1u7ai8c/9FnwGVC44GScfvb6NOX5Zz Q3m8hWx0CbQRsIyV5weA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nMXMG-00AN0J-1y; Tue, 22 Feb 2022 15:45:44 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nMXJB-00AL53-4H for linux-arm-kernel@lists.infradead.org; Tue, 22 Feb 2022 15:42:36 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 6FBEDB81B22; Tue, 22 Feb 2022 15:42:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4EA6C340E8; Tue, 22 Feb 2022 15:42:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645544550; bh=4//NcDkbCERxvJD9pSnHOA7+fCOtUfqFIgkJBXt7Bxw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=oMrjiGwzkNhehM5e/m5igP2WP2AFF48DTnt5KgURuJWQoSW3KSUPZxYZEKjOdQvjr 2gRO+dqerQYnVRHcs4q+V4IPU3VabswmccDV6Y4Vmfdyj2pIXUtMJ8ujt77+E+QKm2 8qCEQReDfP/OkW5TSicFrengRStVVwu7z9ewvSk320gtn3GByvTMVcwPAG5fXf+6v3 HFiLwcWg089FBzgoIe91tH9mx5lnjIOJetI+vnuhhaaqfp0Qc+iG6qoIv00sy+oAor blJi/ZQnZ1iW1KkC7ceTCRHxqWxuWi2hptm9nl/5nfdO7VnLStsg9iTq4trG/IlpVz Ug532c9ww8LgA== Received: by pali.im (Postfix) id B9EBDFDB; Tue, 22 Feb 2022 16:42:26 +0100 (CET) Date: Tue, 22 Feb 2022 16:42:26 +0100 From: Pali =?utf-8?B?Um9ow6Fy?= To: Lorenzo Pieralisi Cc: robh+dt@kernel.org, Bjorn Helgaas , Thomas Petazzoni , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?utf-8?B?QmVow7pu?= , Russell King , Marc Zyngier , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 10/11] PCI: mvebu: Implement support for legacy INTx interrupts Message-ID: <20220222154226.mwu7d3silgmwzeqc@pali> References: <20220105150239.9628-1-pali@kernel.org> <20220112151814.24361-1-pali@kernel.org> <20220112151814.24361-11-pali@kernel.org> <20220211171917.GA740@lpieralisi> <20220211175202.gku5pkwn5wmjo5al@pali> <20220216234039.stxv5ndd6ai23sbb@pali> <20220222102057.GA17238@lpieralisi> <20220222105129.jg5kwmhvhggsv72n@pali> <20220222152409.GA18799@lpieralisi> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220222152409.GA18799@lpieralisi> User-Agent: NeoMutt/20180716 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220222_074234_081633_A9BA955D X-CRM114-Status: GOOD ( 56.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gVHVlc2RheSAyMiBGZWJydWFyeSAyMDIyIDE1OjI0OjA5IExvcmVuem8gUGllcmFsaXNpIHdy b3RlOgo+IE9uIFR1ZSwgRmViIDIyLCAyMDIyIGF0IDExOjUxOjI5QU0gKzAxMDAsIFBhbGkgUm9o w6FyIHdyb3RlOgo+ID4gT24gVHVlc2RheSAyMiBGZWJydWFyeSAyMDIyIDEwOjIxOjA2IExvcmVu em8gUGllcmFsaXNpIHdyb3RlOgo+ID4gPiBPbiBUaHUsIEZlYiAxNywgMjAyMiBhdCAxMjo0MDoz OUFNICswMTAwLCBQYWxpIFJvaMOhciB3cm90ZToKPiA+ID4gPiBPbiBGcmlkYXkgMTEgRmVicnVh cnkgMjAyMiAxODo1MjowMiBQYWxpIFJvaMOhciB3cm90ZToKPiA+ID4gPiA+IE9uIEZyaWRheSAx MSBGZWJydWFyeSAyMDIyIDE3OjE5OjE3IExvcmVuem8gUGllcmFsaXNpIHdyb3RlOgo+ID4gPiA+ ID4gPiBPbiBXZWQsIEphbiAxMiwgMjAyMiBhdCAwNDoxODoxM1BNICswMTAwLCBQYWxpIFJvaMOh ciB3cm90ZToKPiA+ID4gPiA+ID4gPiBUaGlzIGFkZHMgc3VwcG9ydCBmb3IgbGVnYWN5IElOVHgg aW50ZXJydXB0cyByZWNlaXZlZCBmcm9tIG90aGVyIFBDSWUKPiA+ID4gPiA+ID4gPiBkZXZpY2Vz IGFuZCB3aGljaCBhcmUgcmVwb3J0ZWQgYnkgYSBuZXcgSU5UeCBpcnEgY2hpcC4KPiA+ID4gPiA+ ID4gPiAKPiA+ID4gPiA+ID4gPiBXaXRoIHRoaXMgY2hhbmdlLCBrZXJuZWwgY2FuIGRpc3Rpbmd1 aXNoIGJldHdlZW4gSU5UQSwgSU5UQiwgSU5UQyBhbmQgSU5URAo+ID4gPiA+ID4gPiA+IGludGVy cnVwdHMuCj4gPiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+ID4gTm90ZSB0aGF0IGZvciB0aGlzIHN1 cHBvcnQsIGRldmljZSB0cmVlIGZpbGVzIGhhcyB0byBiZSBwcm9wZXJseSBhZGp1c3RlZAo+ID4g PiA+ID4gPiA+IHRvIHByb3ZpZGUgImludGVycnVwdHMiIG9yICJpbnRlcnJ1cHRzLWV4dGVuZGVk IiBwcm9wZXJ0eSB3aXRoIGludHgKPiA+ID4gPiA+ID4gPiBpbnRlcnJ1cHQgc291cmNlLCAiaW50 ZXJydXB0LW5hbWVzIiBwcm9wZXJ0eSB3aXRoICJpbnR4IiBzdHJpbmcgYW5kIGFsc28KPiA+ID4g PiA+ID4gPiAnaW50ZXJydXB0LWNvbnRyb2xsZXInIHN1Ym5vZGUgbXVzdCBiZSBkZWZpbmVkLgo+ ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+IElmIGRldmljZSB0cmVlIGZpbGVzIGRvIG5vdCBw cm92aWRlIHRoZXNlIG5vZGVzIHRoZW4gZHJpdmVyIHdvdWxkIHdvcmsgYXMKPiA+ID4gPiA+ID4g PiBiZWZvcmUuCj4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiBOaXQ6IHRoaXMgaW5mb3JtYXRpb24g aXMgbm90IHVzZWZ1bC4gRFQgcnVsZXMgYXJlIHdyaXR0ZW4gaW4gRFQKPiA+ID4gPiA+ID4gYmlu ZGluZ3MsIG5vdCBpbiBrZXJuZWwgY29tbWl0IGxvZ3MuIEFsbCBJIGFtIHNheWluZyBpcyB0aGF0 IGZpcm13YXJlCj4gPiA+ID4gPiA+IGRldmVsb3BlcnMgc2hvdWxkIG5vdCBoYXZlIHRvIHJlYWQg dGhpcyBsb2cgdG8gd3JpdGUgZmlybXdhcmUuCj4gPiA+ID4gPiAKPiA+ID4gPiA+IEl0IHdhcyBu b3QgaW50ZW5kZWQgZm9yIGZpcm13YXJlIGRldmVsb3BlcnMsIGJ1dCBmb3IgcmV2aWV3ZXJzIG9m IHRoaXMKPiA+ID4gPiA+IHBhdGNoIHRvIHVuZGVyc3RhbmQsIHdoYXQgaXMgaGFwcGVuaW5nIGlu IGNvZGUgYW5kIHRoYXQgd2l0aCBvbGQgRFQKPiA+ID4gPiA+IGZpbGVzIHRoaXMgcGF0Y2ggZG9l cyBub3QgY2hhbmdlIGRyaXZlciBiZWhhdmlvciAoPSB3b3JrIGFzIGJlZm9yZSkuCj4gPiA+ID4g PiAKPiA+ID4gPiA+ID4gPiBTaWduZWQtb2ZmLWJ5OiBQYWxpIFJvaMOhciA8cGFsaUBrZXJuZWwu b3JnPgo+ID4gPiA+ID4gPiA+IC0tLQo+ID4gPiA+ID4gPiA+ICBkcml2ZXJzL3BjaS9jb250cm9s bGVyL3BjaS1tdmVidS5jIHwgMTg1ICsrKysrKysrKysrKysrKysrKysrKysrKysrKy0tCj4gPiA+ ID4gPiA+ID4gIDEgZmlsZSBjaGFuZ2VkLCAxNzcgaW5zZXJ0aW9ucygrKSwgOCBkZWxldGlvbnMo LSkKPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9wY2kv Y29udHJvbGxlci9wY2ktbXZlYnUuYyBiL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvcGNpLW12ZWJ1 LmMKPiA+ID4gPiA+ID4gPiBpbmRleCAxZTkwYWI4ODgwNzUuLmRiYjZlY2I0Y2I3MCAxMDA2NDQK PiA+ID4gPiA+ID4gPiAtLS0gYS9kcml2ZXJzL3BjaS9jb250cm9sbGVyL3BjaS1tdmVidS5jCj4g PiA+ID4gPiA+ID4gKysrIGIvZHJpdmVycy9wY2kvY29udHJvbGxlci9wY2ktbXZlYnUuYwo+ID4g PiA+ID4gPiA+IEBAIC01NCw5ICs1NCwxMCBAQAo+ID4gPiA+ID4gPiA+ICAJIFBDSUVfQ09ORl9B RERSX0VOKQo+ID4gPiA+ID4gPiA+ICAjZGVmaW5lIFBDSUVfQ09ORl9EQVRBX09GRgkweDE4ZmMK PiA+ID4gPiA+ID4gPiAgI2RlZmluZSBQQ0lFX0lOVF9DQVVTRV9PRkYJMHgxOTAwCj4gPiA+ID4g PiA+ID4gKyNkZWZpbmUgUENJRV9JTlRfVU5NQVNLX09GRgkweDE5MTAKPiA+ID4gPiA+ID4gCj4g PiA+ID4gPiA+IE5pdDogSSB1bmRlcnN0YW5kIGl0IGlzIHRlbXB0aW5nIGJ1dCBoZXJlIHlvdSBh cmUgcmVkZWZpbmluZyBvciBiZXR0ZXIKPiA+ID4gPiA+ID4gZ2l2aW5nIGEgcHJvcGVyIGxhYmVs IHRvIGEgcmVnaXN0ZXIuIFNlcGFyYXRlIHBhdGNoIHBsZWFzZS4KPiA+ID4gPiA+IAo+ID4gPiA+ ID4gT2shCj4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiArI2RlZmluZSAgUENJRV9JTlRfSU5UWChp KQkJQklUKDI0K2kpCj4gPiA+ID4gPiA+ID4gICNkZWZpbmUgIFBDSUVfSU5UX1BNX1BNRQkJQklU KDI4KQo+ID4gPiA+ID4gPiA+IC0jZGVmaW5lIFBDSUVfTUFTS19PRkYJCTB4MTkxMAo+ID4gPiA+ ID4gPiAKPiA+ID4gPiA+ID4gU2VlIGFib3ZlLgo+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiAt I2RlZmluZSAgUENJRV9NQVNLX0VOQUJMRV9JTlRTICAgICAgICAgIDB4MGYwMDAwMDAKPiA+ID4g PiA+ID4gPiArI2RlZmluZSAgUENJRV9JTlRfQUxMX01BU0sJCUdFTk1BU0soMzEsIDApCj4gPiA+ ID4gPiA+ID4gICNkZWZpbmUgUENJRV9DVFJMX09GRgkJMHgxYTAwCj4gPiA+ID4gPiA+ID4gICNk ZWZpbmUgIFBDSUVfQ1RSTF9YMV9NT0RFCQkweDAwMDEKPiA+ID4gPiA+ID4gPiAgI2RlZmluZSAg UENJRV9DVFJMX1JDX01PREUJCUJJVCgxKQo+ID4gPiA+ID4gPiA+IEBAIC0xMTAsNiArMTExLDkg QEAgc3RydWN0IG12ZWJ1X3BjaWVfcG9ydCB7Cj4gPiA+ID4gPiA+ID4gIAlzdHJ1Y3QgbXZlYnVf cGNpZV93aW5kb3cgaW93aW47Cj4gPiA+ID4gPiA+ID4gIAl1MzIgc2F2ZWRfcGNpZV9zdGF0Owo+ ID4gPiA+ID4gPiA+ICAJc3RydWN0IHJlc291cmNlIHJlZ3M7Cj4gPiA+ID4gPiA+ID4gKwlzdHJ1 Y3QgaXJxX2RvbWFpbiAqaW50eF9pcnFfZG9tYWluOwo+ID4gPiA+ID4gPiA+ICsJcmF3X3NwaW5s b2NrX3QgaXJxX2xvY2s7Cj4gPiA+ID4gPiA+ID4gKwlpbnQgaW50eF9pcnE7Cj4gPiA+ID4gPiA+ ID4gIH07Cj4gPiA+ID4gPiA+ID4gIAo+ID4gPiA+ID4gPiA+ICBzdGF0aWMgaW5saW5lIHZvaWQg bXZlYnVfd3JpdGVsKHN0cnVjdCBtdmVidV9wY2llX3BvcnQgKnBvcnQsIHUzMiB2YWwsIHUzMiBy ZWcpCj4gPiA+ID4gPiA+ID4gQEAgLTIzNSw3ICsyMzksNyBAQCBzdGF0aWMgdm9pZCBtdmVidV9w Y2llX3NldHVwX3dpbnMoc3RydWN0IG12ZWJ1X3BjaWVfcG9ydCAqcG9ydCkKPiA+ID4gPiA+ID4g PiAgCj4gPiA+ID4gPiA+ID4gIHN0YXRpYyB2b2lkIG12ZWJ1X3BjaWVfc2V0dXBfaHcoc3RydWN0 IG12ZWJ1X3BjaWVfcG9ydCAqcG9ydCkKPiA+ID4gPiA+ID4gPiAgewo+ID4gPiA+ID4gPiA+IC0J dTMyIGN0cmwsIGxua2NhcCwgY21kLCBkZXZfcmV2LCBtYXNrOwo+ID4gPiA+ID4gPiA+ICsJdTMy IGN0cmwsIGxua2NhcCwgY21kLCBkZXZfcmV2LCB1bm1hc2s7Cj4gPiA+ID4gPiA+ID4gIAo+ID4g PiA+ID4gPiA+ICAJLyogU2V0dXAgUENJZSBjb250cm9sbGVyIHRvIFJvb3QgQ29tcGxleCBtb2Rl LiAqLwo+ID4gPiA+ID4gPiA+ICAJY3RybCA9IG12ZWJ1X3JlYWRsKHBvcnQsIFBDSUVfQ1RSTF9P RkYpOwo+ID4gPiA+ID4gPiA+IEBAIC0yODgsMTAgKzI5MiwzMCBAQCBzdGF0aWMgdm9pZCBtdmVi dV9wY2llX3NldHVwX2h3KHN0cnVjdCBtdmVidV9wY2llX3BvcnQgKnBvcnQpCj4gPiA+ID4gPiA+ ID4gIAkvKiBQb2ludCBQQ0llIHVuaXQgTUJVUyBkZWNvZGUgd2luZG93cyB0byBEUkFNIHNwYWNl LiAqLwo+ID4gPiA+ID4gPiA+ICAJbXZlYnVfcGNpZV9zZXR1cF93aW5zKHBvcnQpOwo+ID4gPiA+ ID4gPiA+ICAKPiA+ID4gPiA+ID4gPiAtCS8qIEVuYWJsZSBpbnRlcnJ1cHQgbGluZXMgQS1ELiAq Lwo+ID4gPiA+ID4gPiA+IC0JbWFzayA9IG12ZWJ1X3JlYWRsKHBvcnQsIFBDSUVfTUFTS19PRkYp Owo+ID4gPiA+ID4gPiA+IC0JbWFzayB8PSBQQ0lFX01BU0tfRU5BQkxFX0lOVFM7Cj4gPiA+ID4g PiA+ID4gLQltdmVidV93cml0ZWwocG9ydCwgbWFzaywgUENJRV9NQVNLX09GRik7Cj4gPiA+ID4g PiA+ID4gKwkvKiBNYXNrIGFsbCBpbnRlcnJ1cHQgc291cmNlcy4gKi8KPiA+ID4gPiA+ID4gPiAr CW12ZWJ1X3dyaXRlbChwb3J0LCB+UENJRV9JTlRfQUxMX01BU0ssIFBDSUVfSU5UX1VOTUFTS19P RkYpOwo+ID4gPiA+ID4gPiA+ICsKPiA+ID4gPiA+ID4gPiArCS8qIENsZWFyIGFsbCBpbnRlcnJ1 cHQgY2F1c2VzLiAqLwo+ID4gPiA+ID4gPiA+ICsJbXZlYnVfd3JpdGVsKHBvcnQsIH5QQ0lFX0lO VF9BTExfTUFTSywgUENJRV9JTlRfQ0FVU0VfT0ZGKTsKPiA+ID4gPiA+ID4gPiArCj4gPiA+ID4g PiA+ID4gKwlpZiAocG9ydC0+aW50eF9pcnEgPD0gMCkgewo+ID4gPiA+ID4gPiA+ICsJCS8qCj4g PiA+ID4gPiA+ID4gKwkJICogV2hlbiBuZWl0aGVyICJzdW1tYXJ5IiBpbnRlcnJ1cHQsIG5vciAi aW50eCIgaW50ZXJydXB0IHdhcwo+ID4gPiA+ID4gPiA+ICsJCSAqIHNwZWNpZmllZCBpbiBEVCB0 aGVuIHVubWFzayBhbGwgbGVnYWN5IElOVHggaW50ZXJydXB0cyBhcyBpbgo+ID4gPiA+ID4gPiA+ ICsJCSAqIHRoaXMgY2FzZSBkcml2ZXIgZG9lcyBub3QgcHJvdmlkZSBhIHdheSBmb3IgbWFza2lu ZyBhbmQKPiA+ID4gPiA+ID4gPiArCQkgKiB1bm1hc2tpbmcgb2YgaW5kaXZpZHVhbCBsZWdhY3kg SU5UeCBpbnRlcnJ1cHRzLiBJbiB0aGlzIGNhc2UKPiA+ID4gPiA+ID4gPiArCQkgKiBhbGwgaW50 ZXJydXB0cywgaW5jbHVkaW5nIGxlZ2FjeSBJTlR4IGFyZSByZXBvcnRlZCB2aWEgb25lCj4gPiA+ ID4gPiA+ID4gKwkJICogc2hhcmVkIEdJQyBzb3VyY2UgYW5kIHRoZXJlZm9yZSBrZXJuZWwgY2Fu bm90IGRpc3Rpbmd1aXNoCj4gPiA+ID4gPiA+ID4gKwkJICogd2hpY2ggaW5kaXZpZHVhbCBsZWdh Y3kgSU5UeCB3YXMgdHJpZ2dlcmVkLiBUaGVzZSBpbnRlcnJ1cHRzCj4gPiA+ID4gPiA+ID4gKwkJ ICogYXJlIHNoYXJlZCwgc28gaXQgc2hvdWxkIG5vdCBjYXVzZSBhbnkgaXNzdWUuIEp1c3QKPiA+ ID4gPiA+ID4gPiArCQkgKiBwZXJmb3JtYW5jZSBwZW5hbHR5IGFzIGV2ZXJ5IFBDSWUgaW50ZXJy dXB0IGhhbmRsZXIgbmVlZHMgdG8KPiA+ID4gPiA+ID4gPiArCQkgKiBiZSBjYWxsZWQgd2hlbiBz b21lIGludGVycnVwdCBpcyB0cmlnZ2VyZWQuCj4gPiA+ID4gPiA+ID4gKwkJICovCj4gPiA+ID4g PiA+IAo+ID4gPiA+ID4gPiBUaGlzIGNvbW1lbnQgYXBwbGllcyB0byBjdXJyZW50IG1haW5saW5l IHJpZ2h0IChpZSBpdCBkZXNjcmliZXMgaG93Cj4gPiA+ID4gPiA+IGN1cnJlbnQgbWFpbmxpbmUg aGFuZGxlcyBJTlR4KSA/IElNTyB5b3Ugc2hvdWxkIHNwbGl0IGl0IG91dCBpbiBhCj4gPiA+ID4g PiA+IHNlcGFyYXRlIHBhdGNoLgo+ID4gPiA+ID4gCj4gPiA+ID4gPiBUaGlzIGFib3ZlIGNvbW1l bnQgZGVzY3JpYmUgd2hhdCBoYXBwZW5zIGluIGlmLWJyYW5jaCB3aGVuIGludHhfaXJxIGlzCj4g PiA+ID4gPiBub3Qgc2V0IChhcyB3cml0dGVuIGluIGNvbW1lbnQgIndoZW4gaW50eCBpbnRlcnJ1 cHQgd2FzIG5vdCBzcGVjaWZpZWQgaW4KPiA+ID4gPiA+IERUIikuIFlvdSBhcmUgcmlnaHQgdGhh dCB0aGlzIGlzIGFsc28gdGhlIGJlaGF2aW9yIGluIHRoZSBjdXJyZW50Cj4gPiA+ID4gPiBtYWlu bGluZS4KPiA+ID4gPiA+IAo+ID4gPiA+ID4gSSdtIG5vdCBzdXJlIGlmIHRoaXMgY29tbWVudCBj YW4gYmUgc3BsaXQgb3V0IGFzIHN1cHBvcnQgZm9yICJpbnR4Igo+ID4gPiA+ID4gaW50ZXJydXB0 IGlzIGluIHRoaXMgcGF0Y2guCj4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gSSB1bmRlcnN0YW5kIGl0 IGlzIGhhcmQgYnV0IGEgcGF0Y2ggaXMgYSBsb2dpY2FsIF9jaGFuZ2VfLCB0aGlzCj4gPiA+ID4g PiA+IGNvbW1lbnQgaXMgYSBjaGFuZ2UgcGVyIHNlLCBpdCBpcyBhIGNsYXJpZmljYXRpb24gb24g Y3VycmVudAo+ID4gPiA+ID4gPiBiZWhhdmlvdXIuCj4gPiA+ID4gPiAKPiA+ID4gPiA+IE9rLCBJ IGNvdWxkIHRyeSB0byBzcGxpdCB0aGlzIGNvbW1lbnQgaW50byB0d28gcGF0Y2hlcywgYnV0IHBh cnQgYWJvdXQKPiA+ID4gPiA+IGlmLWJyYW5jaCBjb21tZW50IG5lZWRzIHRvIHN0YXkgaW4gInRo aXMiIHBhdGNoLgo+ID4gPiA+IAo+ID4gPiA+IEkgaGF2ZSBkb25lIGl0IGxvY2FsbHkuCj4gPiA+ ID4gCj4gPiA+ID4gTGV0IG1lIGtub3cgd2hlbiBJIHNob3VsZCByZXNlbmQgdGhpcyBwYXRjaCBz ZXJpZXMgYW5kIEkgd2lsbCBpbmNsdWRlCj4gPiA+ID4gaW50byBpdCBhbHNvIHRoZXNlIGNoYW5n ZXMuCj4gPiA+IAo+ID4gPiBIaSwKPiA+ID4gCj4gPiA+IHllcyBwbGVhc2UgcmVzZW5kIGl0IGFu ZCBJIHdpbGwgbWVyZ2UgaXQuCj4gPiAKPiA+IERvbmUhCj4gPiBodHRwczovL2xvcmUua2VybmVs Lm9yZy9saW51eC1wY2kvMjAyMjAyMjIxMDQ2MjUuMjg0NjEtMS1wYWxpQGtlcm5lbC5vcmcvVC8j dQo+IAo+IENhbiB5b3UgcmViYXNlIGl0IHBsZWFzZSBvbiB0b3Agb2YgbXkgcGNpL212ZWJ1IGJy YW5jaCA/Cj4gCj4gaHR0cHM6Ly9naXQua2VybmVsLm9yZy9wdWIvc2NtL2xpbnV4L2tlcm5lbC9n aXQvbHBpZXJhbGlzaS9wY2kuZ2l0Lwo+IAo+IEZvcmdpdmUgbWUsIEkgZm9yZ290IHRvIG1lbnRp b24gdGhhdCwgdGhhbmtzLgo+IAo+IExvcmVuem8KCk9rISBJIHJlYmFzZWQgVjMgb24gdG9wIG9m IGMzYmQ3ZGM1NTNlZWE1YTM1OTVjYTNhYTBhZGVlOWJmODM2MjJhMWYKKHBjaS9tdmVidSBicmFu Y2ggaW4geW91ciByZXBvKSwgZml4ZWQgY29uZmxpY3RzIGFuZCBwdXNoZWQgdG8gbXkgZ2l0CnJl cG8gaHR0cHM6Ly9naXQua2VybmVsLm9yZy9wdWIvc2NtL2xpbnV4L2tlcm5lbC9naXQvcGFsaS9s aW51eC5naXQvCmFzIGNvbW1pdCA0MjQwMmYwY2ZjMzYyZmZiMGI3ZTQ2NGY0MjBkNmVhZDM0MmRh YjJiIChscGllcmFsaXNpLXBjaS1tdmVidQpicmFuY2gpLiBJdCBpcyBlbm91Z2g/IE9yIGRvIHlv dSB3YW50IG1lIHRvIHJlc2VuZCBpdCB2aWEgZW1haWxzPwoKX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QK bGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRl YWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo=