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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id d12sm4714329edt.23.2022.02.23.00.43.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Feb 2022 00:43:44 -0800 (PST) Date: Wed, 23 Feb 2022 09:43:43 +0100 From: Igor Mammedov To: Gerd Hoffmann Subject: Re: [PATCH RFCv2 2/4] i386/pc: relocate 4g start to 1T where applicable Message-ID: <20220223094343.2e600a22@redhat.com> In-Reply-To: <20220222094255.as2alzu65rhateml@sirius.home.kraxel.org> References: <20220207202422.31582-1-joao.m.martins@oracle.com> <20220207202422.31582-3-joao.m.martins@oracle.com> <20220214155318.3ce80da0@redhat.com> <20220214163158.4c4b210b@redhat.com> <20220215095358.5qcrgwlasheu63uj@sirius.home.kraxel.org> <20220222094602.66d55613@redhat.com> <20220222094255.as2alzu65rhateml@sirius.home.kraxel.org> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=imammedo@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Daniel P. =?UTF-8?B?QmVycmFuZ8Op?=" , Eduardo Habkost , "Michael S . Tsirkin" , Richard Henderson , qemu-devel@nongnu.org, "Dr. David Alan Gilbert" , David Edmondson , Alex Williamson , Suravee Suthikulpanit , Ani Sinha , Paolo Bonzini , Joao Martins , Daniel Jordan Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, 22 Feb 2022 10:42:55 +0100 Gerd Hoffmann wrote: > Hi, > > > > And the upstream code is now pretty much identical except for the > > > default; note that for TCG you do need to keep to 40 I think. > > > > will TCG work with 40bits on host that supports less than that? > > When I understand things correctly the problem is that the phys-bits > limit applies to the npt/ept tables too, effectively restricting guest > physical address space to host physical address space. > > TCG is not affected by that and should work just fine. > > Not sure what happens if you turn off npt/ept and run on softmmu. > Possibly that works fine too. > > > Also quick look at host-phys-bits shows that it affects only 'host' > > cpu model and is NOP for all other models. > > I don't think so. microvm forces host-phys-bits=on and that works with > all cpu models. I just don't see how host-phys-bits can work for other than 'host' cpu model. It's true that property is available for all cpu models, but the field it sets is only used in target/i386/host-cpu.c, the same applies to host-phys-bits-limit. Am I missing something? > > take care, > Gerd >