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From: Sudeep Holla <sudeep.holla@arm.com>
To: Shawn Guo <shawn.guo@linaro.org>
Cc: Marc Zyngier <maz@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Valentin Schneider <valentin.schneider@arm.com>,
	Sebastian Andrzej Siewior <bigeasy@linutronix.de>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Maulik Shah <quic_mkshah@quicinc.com>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Ulf Hansson <ulf.hansson@linaro.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 1/3] PM: cpu: Add CPU_LAST_PM_ENTER and CPU_FIRST_PM_EXIT support
Date: Wed, 23 Feb 2022 19:30:50 +0000	[thread overview]
Message-ID: <20220223193050.y7parhlmnspcyom3@bogus> (raw)
In-Reply-To: <20220223125536.230224-2-shawn.guo@linaro.org>

On Wed, Feb 23, 2022 at 08:55:34PM +0800, Shawn Guo wrote:
> It becomes a common situation on some platforms that certain hardware
> setup needs to be done on the last standing cpu, and rpmh-rsc[1] is such
> an existing example.  As figuring out the last standing cpu is really
> something generic, it adds CPU_LAST_PM_ENTER (and CPU_FIRST_PM_EXIT)
> event support to cpu_pm helper, so that individual driver can be
> notified when the last standing cpu is about to enter low power state.

Sorry for not getting back on the previous email thread.
When I meant I didn't want to use CPU_CLUSTER_PM_{ENTER,EXIT}, I wasn't
thinking new ones to be added as alternative. With this OSI cpuidle, we
have introduces the concept of power domains and I was check if we can
associate these requirements to them rather than introducing the first
and last cpu notion. The power domains already identify them in order
to turn on or off. Not sure if there is any notification mechanism in
genpd/power domains. I really don't like this addition. It is disintegrating
all the solutions for OSI and makes it hard to understand.

One solution I can think of(not sure if others like or if that is feasible)
is to create a parent power domain that encloses all the last level CPU
power domains, which means when the last one is getting powered off, you
will be asked to power off and you can take whatever action you want.

--
Regards,
Sudeep

  reply	other threads:[~2022-02-23 19:31 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-23 12:55 [PATCH v6 0/3] Add Qualcomm MPM irqchip driver support Shawn Guo
2022-02-23 12:55 ` [PATCH v6 1/3] PM: cpu: Add CPU_LAST_PM_ENTER and CPU_FIRST_PM_EXIT support Shawn Guo
2022-02-23 19:30   ` Sudeep Holla [this message]
2022-02-25  4:33     ` Shawn Guo
2022-02-25 14:20       ` Sudeep Holla
2022-02-23 12:55 ` [PATCH v6 2/3] dt-bindings: interrupt-controller: Add Qualcomm MPM support Shawn Guo
2022-02-23 12:55 ` [PATCH v6 3/3] irqchip: Add Qualcomm MPM controller driver Shawn Guo
2022-02-23 23:43   ` kernel test robot
2022-02-24  2:10     ` Shawn Guo
2022-02-24  2:10       ` Shawn Guo
2022-02-25  8:54       ` Marc Zyngier
2022-02-25  8:54         ` Marc Zyngier
2022-05-04 14:08 ` [PATCH v6 0/3] Add Qualcomm MPM irqchip driver support Ulf Hansson
2022-05-04 19:21   ` Sudeep Holla

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