From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8EFBC433FE for ; Fri, 25 Feb 2022 00:08:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233262AbiBYAIg (ORCPT ); Thu, 24 Feb 2022 19:08:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229479AbiBYAIe (ORCPT ); Thu, 24 Feb 2022 19:08:34 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7AF2512B765; Thu, 24 Feb 2022 16:08:03 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1136861CDA; Fri, 25 Feb 2022 00:08:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 31DB4C340EF; Fri, 25 Feb 2022 00:08:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645747682; bh=YHKuaw/M4cyd4TxRY4j95nETLKiuypiRsUpqY9ivG3I=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=egZaxVPgwqFESEvkAeyzXsdfr+7xqa2eZET0pEnR0MXyaInHyw4HfGBJUV6gTzmRo kR2UNxxDPkEc77FvYLd77Yk6AzCARd979GaSPQzlekKRYBi84SFzozsDQXuV0j+s+S lpYH3GLt74DBnTOnWgrKKueP2jc7ZIugWqADViVculXdgOtcgDkD8fgT9gVC6LAWQ8 3vSD9ky9dXUEtLALNhNfvxvtUnX5JMEidu7KSS3JY6ShObjxhbF3cM67DsQTMN+yyv SX+X0VYkFh8AbtEVV6UE50+V+OKq82/1pzhm5D1nO8d7v8Zc8PeRWV2PsgGURXRUdy hqZjYGWX8REng== Date: Thu, 24 Feb 2022 18:08:00 -0600 From: Bjorn Helgaas To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Lorenzo Pieralisi , Bjorn Helgaas , Rob Herring , Thomas Petazzoni , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?iso-8859-1?Q?Beh=FAn?= , Russell King , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 05/12] PCI: mvebu: Correctly configure x1/x4 mode Message-ID: <20220225000800.GA304526@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220222155030.988-6-pali@kernel.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 22, 2022 at 04:50:23PM +0100, Pali Rohár wrote: > If x1/x4 mode is not set correctly then link with endpoint card is not > established. > > Use DTS property 'num-lanes' to deteriminate x1/x4 mode. I know this is already merged, but if tweaking for any other reason, s/deteriminate/determine/ > + * Set Maximum Link Width to X1 or X4 in Root Port's PCIe Link > + * Capability register. This register is defined by PCIe specification > + * as read-only but this mvebu controller has it as read-write and must > + * be set to number of SerDes PCIe lanes (1 or 4). If this register is > + * not set correctly then link with endpoint card is not established. True, everything in Link Capability is RO or HwInit, but that's for the architected access via config space. I think a device-specific mechanism like this is fair game as long as you do it before anybody can read it via config space. > + */ > + lnkcap = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP); > + lnkcap &= ~PCI_EXP_LNKCAP_MLW; > + lnkcap |= (port->is_x4 ? 4 : 1) << 4; > + mvebu_writel(port, lnkcap, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP); From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DDC43C433EF for ; Fri, 25 Feb 2022 00:09:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=TrQXkMhgYs8oerwe42IqcUd+dNsdeGyEVe9lgAG+2dM=; b=W8V1hT0cAoAOoX oo4+xdZVx+oV2FfCWMq4hFQUbqJJmCdKBm06bapFUOSML65EHPMNUUYqPj9NDjTyt8fK502f+zkVk cq+9J1xH4wx5kTl7klHUNQV7sh92vfcTENBt0EdWtS6XCYS+UPpqXPYC7pp7sScvicqXto1ASZs8h QLEsYV4eH9PC4nrQirYX2T8577Y4jRJ9YCsJXmy+ZbM3biserohVbzGmUvgTh2uNk5ixqfXwXOCOd oN3fX9fBosGG7d2BquaeMCB+67A/7FF06xNLr2i51vKJbEn/gQlTqYKPPsrVmeoiIWaiDAMa81MW6 SP4iB1HZDNZaU7NhL5eQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nNO9X-002lCC-B8; Fri, 25 Feb 2022 00:08:07 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nNO9T-002lBY-Fh for linux-arm-kernel@lists.infradead.org; Fri, 25 Feb 2022 00:08:04 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0E1A361CD4; Fri, 25 Feb 2022 00:08:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 31DB4C340EF; Fri, 25 Feb 2022 00:08:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645747682; bh=YHKuaw/M4cyd4TxRY4j95nETLKiuypiRsUpqY9ivG3I=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=egZaxVPgwqFESEvkAeyzXsdfr+7xqa2eZET0pEnR0MXyaInHyw4HfGBJUV6gTzmRo kR2UNxxDPkEc77FvYLd77Yk6AzCARd979GaSPQzlekKRYBi84SFzozsDQXuV0j+s+S lpYH3GLt74DBnTOnWgrKKueP2jc7ZIugWqADViVculXdgOtcgDkD8fgT9gVC6LAWQ8 3vSD9ky9dXUEtLALNhNfvxvtUnX5JMEidu7KSS3JY6ShObjxhbF3cM67DsQTMN+yyv SX+X0VYkFh8AbtEVV6UE50+V+OKq82/1pzhm5D1nO8d7v8Zc8PeRWV2PsgGURXRUdy hqZjYGWX8REng== Date: Thu, 24 Feb 2022 18:08:00 -0600 From: Bjorn Helgaas To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Lorenzo Pieralisi , Bjorn Helgaas , Rob Herring , Thomas Petazzoni , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?iso-8859-1?Q?Beh=FAn?= , Russell King , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4 05/12] PCI: mvebu: Correctly configure x1/x4 mode Message-ID: <20220225000800.GA304526@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220222155030.988-6-pali@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220224_160803_590544_751D5A56 X-CRM114-Status: GOOD ( 13.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Feb 22, 2022 at 04:50:23PM +0100, Pali Roh=E1r wrote: > If x1/x4 mode is not set correctly then link with endpoint card is not > established. > = > Use DTS property 'num-lanes' to deteriminate x1/x4 mode. I know this is already merged, but if tweaking for any other reason, s/deteriminate/determine/ > + * Set Maximum Link Width to X1 or X4 in Root Port's PCIe Link > + * Capability register. This register is defined by PCIe specification > + * as read-only but this mvebu controller has it as read-write and must > + * be set to number of SerDes PCIe lanes (1 or 4). If this register is > + * not set correctly then link with endpoint card is not established. True, everything in Link Capability is RO or HwInit, but that's for the architected access via config space. I think a device-specific mechanism like this is fair game as long as you do it before anybody can read it via config space. > + */ > + lnkcap =3D mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP); > + lnkcap &=3D ~PCI_EXP_LNKCAP_MLW; > + lnkcap |=3D (port->is_x4 ? 4 : 1) << 4; > + mvebu_writel(port, lnkcap, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel