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Tsirkin" To: Igor Mammedov Subject: Re: [PATCH 2/4] pcie: update slot power status only is power control is enabled Message-ID: <20220225080628-mutt-send-email-mst@kernel.org> References: <20220224174411.3296848-1-imammedo@redhat.com> <20220224174411.3296848-3-imammedo@redhat.com> <20220225101259.begp7wy5o3jlafcf@sirius.home.kraxel.org> <20220225140231.16c13306@redhat.com> MIME-Version: 1.0 In-Reply-To: <20220225140231.16c13306@redhat.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=mst@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, Feb 25, 2022 at 02:02:31PM +0100, Igor Mammedov wrote: > On Fri, 25 Feb 2022 11:12:59 +0100 > Gerd Hoffmann wrote: > > > Hi, > > > > > pcie_cap_slot_post_load() > > > -> pcie_cap_update_power() > > > -> pcie_set_power_device() > > > -> pci_set_power() > > > -> pci_update_mappings() > > > > > Fix it by honoring PCI_EXP_SLTCAP_PCP and updating power status > > > only if capability is enabled. > > > > > diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c > > > index d7d73a31e4..2339729a7c 100644 > > > --- a/hw/pci/pcie.c > > > +++ b/hw/pci/pcie.c > > > @@ -383,10 +383,9 @@ static void pcie_cap_update_power(PCIDevice *hotplug_dev) > > > > > > if (sltcap & PCI_EXP_SLTCAP_PCP) { > > > power = (sltctl & PCI_EXP_SLTCTL_PCC) == PCI_EXP_SLTCTL_PWR_ON; > > > + pci_for_each_device(sec_bus, pci_bus_num(sec_bus), > > > + pcie_set_power_device, &power); > > > } > > > - > > > - pci_for_each_device(sec_bus, pci_bus_num(sec_bus), > > > - pcie_set_power_device, &power); > > > } > > > > The change makes sense, although I don't see how that changes qemu > > behavior. > > looks like I need to fix commit message > > > > > 'power' defaults to true, so when SLTCAP_PCP is off it should never > > ever try to power off the devices. And pci_set_power() should figure > > the state didn't change and instantly return without touching the > > device. > > > SLTCAP_PCP is on by default as well, so empty slot ends up with > power disabled PCC state [1]: > > sltctl & SLTCTL_PCC == 0x400 > > by the time machine is initialized. > > Then ACPI pcihp callbacks override native hotplug ones > so PCC remains stuck in this state since all power control > is out of picture in case of ACPI based hotplug. Guest OS > doesn't use/or ignore native PCC. So how about when ACPI pcihp overrides native with its callbacks we also set PCC power to on? > > After device hotplug, the device stays in has_power=on default > state as pci_qdev_realize() initialized it. [2] > > However when migrated SLTCTL_PCC is also migrated, and kick in > as described in commit message and turns power off [3] > > > > > take care, > > Gerd > > > > 1) > pci_qdev_realize > pci_set_power: extra_root0, d->has_power: 0, new power state: 1 > pci_set_power: extra_root0, set has_power to: 1 > pcie_cap_slot_reset > pcie_cap_update_power(extra_root0): sltcap & PCI_EXP_SLTCAP_PCP: 2, sltctl & SLTCTL_PCC: 400 > pcie_cap_update_power(extra_root0): updated power: 0 <== has no effect on children since there is none > > 2) > pci_qdev_realize > pci_set_power: nic, d->has_power: 0, new power state: 1 > pci_set_power: nic, set has_power to: 1 > > > 3) > pci_qdev_realize > pci_set_power: extra_root0, d->has_power: 0, new power state: 1 > pci_set_power: extra_root0, set has_power to: 1 > pci_qdev_realize > pci_set_power: nic, d->has_power: 0, new power state: 1 > pci_set_power: nic, set has_power to: 1 > pcie_cap_slot_reset > pcie_cap_update_power(extra_root0): sltcap & PCI_EXP_SLTCAP_PCP: 2, sltctl & SLTCTL_PCC: 0 > pcie_cap_update_power(extra_root0): updated power: 1 > pci_set_power: nic, d->has_power: 1, new power state: 1 > pcie_cap_slot_post_load(extra_root0) > pcie_cap_update_power(extra_root0): sltcap & PCI_EXP_SLTCAP_PCP: 2, sltctl & SLTCTL_PCC: 400 > pcie_cap_update_power(extra_root0): updated power: 0 > pci_set_power: nic, d->has_power: 1, new power state: 0 > pci_set_power: nic, set has_power to: 0