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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id n13-20020a170906724d00b006cedd6d7e24sm1144701ejk.119.2022.02.25.07.50.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Feb 2022 07:50:55 -0800 (PST) Date: Fri, 25 Feb 2022 16:50:54 +0100 From: Igor Mammedov To: "Michael S. Tsirkin" Subject: Re: [PATCH 0/4] Fix broken PCIe device after migration Message-ID: <20220225165054.184b1a3c@redhat.com> In-Reply-To: <20220225084957-mutt-send-email-mst@kernel.org> References: <20220224174411.3296848-1-imammedo@redhat.com> <20220225045327-mutt-send-email-mst@kernel.org> <20220225141823.5ee12954@redhat.com> <20220225084957-mutt-send-email-mst@kernel.org> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.31; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=imammedo@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, kraxel@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, 25 Feb 2022 08:50:43 -0500 "Michael S. Tsirkin" wrote: > On Fri, Feb 25, 2022 at 02:18:23PM +0100, Igor Mammedov wrote: > > On Fri, 25 Feb 2022 04:58:46 -0500 > > "Michael S. Tsirkin" wrote: > > > > > On Thu, Feb 24, 2022 at 12:44:07PM -0500, Igor Mammedov wrote: > > > > Currently ACPI PCI hotplug is enabled by default for Q35 machine > > > > type and overrides native PCIe hotplug. It works as expected when > > > > a PCIe device is hotplugged into slot, however the device becomes > > > > in-operational after migration. Which is caused by BARs being > > > > disabled on target due to powered off status of the slot. > > > > > > > > Proposed fix disables power control on PCIe slot when ACPI pcihp > > > > takes over hotplug control and makes PCIe slot check if power > > > > control is enabled before trying to change slot's power. Which > > > > leaves slot always powered on and that makes PCI core keep BARs > > > > enabled. > > > > > > > > > I thought some more about this. One of the reasons we > > > did not remove the hotplug capability is really so > > > it's easier to layer acpi on top of pcihp if we > > > want to do it down the road. And it would be quite annoying > > > if we had to add more hack to go back to having capability. > > > > > > How about instead of patch 3 we call pci_set_power(dev, true) for all > > > devices where ACPI is managing hotplug immediately on plug? This will > > > fix the bug avoiding headache with migration. > > > > true it would be more migration friendly (v6.2 still broken > > but that can't be helped), since we won't alter pci_config at all. > > Although it's still more hackish compared to disabling SLTCAP_PCP > > (though it seems guest OSes have no issues with SLTCAP_PCP being > > present but not really operational, at least for ~6months the thing > > was released (6.1-6.2-now)). > > > > Let me play with this idea and see if it works and at what cost, > > though I still prefer cleaner SLTCAP_PCP disabling to make sure > > guest OS won't get wrong idea about power control being present > > when it's not actually not. > > Well the control is present, isn't it? Can be used to e.g. reset the > device behind the bridge. can you point to how reset is supposed to work? > > > > > > Patch 2 does seem like a good idea. > > > > > > > PS: > > > > it's still hacky approach as all ACPI PCI hotplug is, but it's > > > > the least intrusive one. Alternative, I've considered, could be > > > > chaining hotplug callbacks and making pcihp ones call overriden > > > > native callbacks while inhibiting hotplug event in native callbacks > > > > somehow. But that were a bit more intrusive and spills over to SHPC > > > > if implemented systematically, so I ditched that for now. It could > > > > be resurrected later on if current approach turns out to be > > > > insufficient. > > > > > > > > RHBZ: https://bugzilla.redhat.com/show_bug.cgi?id=2053584 > > > > CC: mst@redhat.com > > > > CC: kraxel@redhat.com > > > > > > > > Igor Mammedov (4): > > > > pci: expose TYPE_XIO3130_DOWNSTREAM name > > > > pcie: update slot power status only is power control is enabled > > > > acpi: pcihp: disable power control on PCIe slot > > > > q35: compat: keep hotplugged PCIe device broken after migration for > > > > 6.2-older machine types > > > > > > > > include/hw/acpi/pcihp.h | 4 +++- > > > > include/hw/pci-bridge/xio3130_downstream.h | 15 +++++++++++++++ > > > > hw/acpi/acpi-pci-hotplug-stub.c | 3 ++- > > > > hw/acpi/ich9.c | 21 ++++++++++++++++++++- > > > > hw/acpi/pcihp.c | 16 +++++++++++++++- > > > > hw/acpi/piix4.c | 3 ++- > > > > hw/core/machine.c | 4 +++- > > > > hw/pci-bridge/xio3130_downstream.c | 3 ++- > > > > hw/pci/pcie.c | 5 ++--- > > > > 9 files changed, 64 insertions(+), 10 deletions(-) > > > > create mode 100644 include/hw/pci-bridge/xio3130_downstream.h > > > > > > > > -- > > > > 2.31.1 > > > >