From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39214C4332F for ; Fri, 25 Feb 2022 17:02:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243450AbiBYRDZ (ORCPT ); Fri, 25 Feb 2022 12:03:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243498AbiBYRDA (ORCPT ); Fri, 25 Feb 2022 12:03:00 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87BF63B546; Fri, 25 Feb 2022 09:02:27 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6E3A961D4E; Fri, 25 Feb 2022 17:02:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 94E44C340E7; Fri, 25 Feb 2022 17:02:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645808546; bh=dN2Bz1iygo2sIzesrF8govzJ+5QKuGfIYEDRIld0RBc=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=kNz+vf0XXx6YWRBHyghc9YOie2pR8cVyN/8NcKdyUPkLFTfzE0Eccuet4IqVWopnD WUpD1ykttsJFpRQSRH8wV7ysRpinVdd01d34pMOfhTOiV1uazBqaWJsWOlYTjSOev8 4JUqe/yCwUbMwWAkNIHlBnCDVtFGJqTajEtIyUbG4z1LOB2n9/cX13hR9l6vSDOSWC xsW8Un1/afxBL0SmeUdyGsmETQb/6xoFN0J1BWnvyp6UsEX+HQU9XXSSsT8Y5CSA/L RLHvnIFhHNRXovtG7GSY8suQKmzy2y83z1sFk6nt6ncaWxDbJ379TsDQZ7Nx0fWSJL qKme2ubhjDpFA== Date: Fri, 25 Feb 2022 11:02:25 -0600 From: Bjorn Helgaas To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Lorenzo Pieralisi , Bjorn Helgaas , Rob Herring , Andrew Lunn , Thomas Petazzoni , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?iso-8859-1?Q?Beh=FAn?= , Russell King , Gregory Clement , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 5/6] PCI: mvebu: Add support for sending Set_Slot_Power_Limit message Message-ID: <20220225170225.GA363593@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220225125407.wglplhyisgges3zk@pali> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Feb 25, 2022 at 01:54:07PM +0100, Pali Rohár wrote: > On Thursday 24 February 2022 15:28:11 Bjorn Helgaas wrote: > > On Tue, Feb 22, 2022 at 05:31:57PM +0100, Pali Rohár wrote: > > > This PCIe message is sent automatically by mvebu HW when link changes > > > status from down to up. > > PCIe r6.0, sec 2.2.8.5 and 7.5.3.9, also say Set_Slot_Power_Limit must > > be sent on a config write to Slot Capabilities. I don't really > > understand that, since AFAICS, everything in that register is > > read-only. But there must be some use case for forcing a message. > > I understood it in this way: Capabilities register is read-only hw-init > and so firmware / driver can write initialization values into this > register. And when firmware / driver is doing this write then Root port > should send that Set_Slot_Power_Limit message. Sec 7.5.3.9 describes the behavior of Slot Capabilities in config space, where it must be read-only. Firmware (or the mvebu driver) must use a different mechanism to initialize the values. FWIW, I found this implementation note in PCIe r6.0, sec 6.9 that explains why config writes to this read-only register would be useful: IMPLEMENTATION NOTE: AUTO SLOT POWER LIMIT DISABLE In some environments host software may wish to directly manage the transmission of a Set_Slot_Power_Limit message by performing a Configuration Write to the Slot Capabilities register rather than have the transmission automatically occur when the Link transitions from a non-DL_Up to a DL_Up status. This allows host software to limit power supply surge current by staggering the transition of Endpoints to a higher power state following a Link Down or when multiple Endpoints are simultaneously hot-added due to cable or adapter insertion. Bjorn From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F2E4FC433EF for ; Fri, 25 Feb 2022 17:04:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Owner; bh=HSZQTXGmfyujqepmgdaIOYfRiN3ollFMSoaSEPBnNyQ=; b=HG7phlVWFO3z59 tyzfxJhdyst4Ne0eMDIRcZsnanRx8HBNR3ya+F+PKweeRerbcguY4vCtJAQu2K2M3W4ojG+F8OthK p6wjDLx0lNwifIl1SPvr51jIwk66nQT9Dbs3R+3XAUY6OiryuJzcLHZ5/gKwv7dDtl081Fri+ioTb 5OISMmuWk7Dt4pN0RWxE+LPH9PhU3CJEnjxgJvePhCJvrq4nJodW2+knEHySGJorUy/AA9dZRLDO7 JITVD/GgV4a6XmwTozbSCDaxCWErr0JJAmxC25EpCODGej8Qts63UWlIFn1E+xGdLInQCiDlA/X8E mkB02LpyM3sAwcfb4bqQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nNe04-0067kk-6O; Fri, 25 Feb 2022 17:03:24 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nNdzA-0067Pl-Br for linux-arm-kernel@lists.infradead.org; Fri, 25 Feb 2022 17:02:29 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6705260C74; Fri, 25 Feb 2022 17:02:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 94E44C340E7; Fri, 25 Feb 2022 17:02:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645808546; bh=dN2Bz1iygo2sIzesrF8govzJ+5QKuGfIYEDRIld0RBc=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=kNz+vf0XXx6YWRBHyghc9YOie2pR8cVyN/8NcKdyUPkLFTfzE0Eccuet4IqVWopnD WUpD1ykttsJFpRQSRH8wV7ysRpinVdd01d34pMOfhTOiV1uazBqaWJsWOlYTjSOev8 4JUqe/yCwUbMwWAkNIHlBnCDVtFGJqTajEtIyUbG4z1LOB2n9/cX13hR9l6vSDOSWC xsW8Un1/afxBL0SmeUdyGsmETQb/6xoFN0J1BWnvyp6UsEX+HQU9XXSSsT8Y5CSA/L RLHvnIFhHNRXovtG7GSY8suQKmzy2y83z1sFk6nt6ncaWxDbJ379TsDQZ7Nx0fWSJL qKme2ubhjDpFA== Date: Fri, 25 Feb 2022 11:02:25 -0600 From: Bjorn Helgaas To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: Lorenzo Pieralisi , Bjorn Helgaas , Rob Herring , Andrew Lunn , Thomas Petazzoni , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Marek =?iso-8859-1?Q?Beh=FAn?= , Russell King , Gregory Clement , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 5/6] PCI: mvebu: Add support for sending Set_Slot_Power_Limit message Message-ID: <20220225170225.GA363593@bhelgaas> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220225125407.wglplhyisgges3zk@pali> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220225_090228_481458_A6D22FC1 X-CRM114-Status: GOOD ( 21.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Feb 25, 2022 at 01:54:07PM +0100, Pali Roh=E1r wrote: > On Thursday 24 February 2022 15:28:11 Bjorn Helgaas wrote: > > On Tue, Feb 22, 2022 at 05:31:57PM +0100, Pali Roh=E1r wrote: > > > This PCIe message is sent automatically by mvebu HW when link changes > > > status from down to up. = > > PCIe r6.0, sec 2.2.8.5 and 7.5.3.9, also say Set_Slot_Power_Limit must > > be sent on a config write to Slot Capabilities. I don't really > > understand that, since AFAICS, everything in that register is > > read-only. But there must be some use case for forcing a message. > = > I understood it in this way: Capabilities register is read-only hw-init > and so firmware / driver can write initialization values into this > register. And when firmware / driver is doing this write then Root port > should send that Set_Slot_Power_Limit message. Sec 7.5.3.9 describes the behavior of Slot Capabilities in config space, where it must be read-only. Firmware (or the mvebu driver) must use a different mechanism to initialize the values. FWIW, I found this implementation note in PCIe r6.0, sec 6.9 that explains why config writes to this read-only register would be useful: IMPLEMENTATION NOTE: AUTO SLOT POWER LIMIT DISABLE In some environments host software may wish to directly manage the transmission of a Set_Slot_Power_Limit message by performing a Configuration Write to the Slot Capabilities register rather than have the transmission automatically occur when the Link transitions from a non-DL_Up to a DL_Up status. This allows host software to limit power supply surge current by staggering the transition of Endpoints to a higher power state following a Link Down or when multiple Endpoints are simultaneously hot-added due to cable or adapter insertion. Bjorn _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel