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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id z5-20020a05600c0a0500b0037fa93193a8sm145776wmp.44.2022.03.02.13.11.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Mar 2022 13:11:31 -0800 (PST) From: Corentin Labbe To: heiko@sntech.de, herbert@gondor.apana.org.au, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, john@metanate.com, Corentin Labbe Subject: [PATCH v2 11/18] crypto: rockhip: do not handle dma clock Date: Wed, 2 Mar 2022 21:11:06 +0000 Message-Id: <20220302211113.4003816-12-clabbe@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220302211113.4003816-1-clabbe@baylibre.com> References: <20220302211113.4003816-1-clabbe@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The DMA clock is handled by the DMA controller, so the crypto does not have to touch it. Signed-off-by: Corentin Labbe --- drivers/crypto/rockchip/rk3288_crypto.c | 16 +--------------- drivers/crypto/rockchip/rk3288_crypto.h | 1 - 2 files changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c index 94ef1283789f..645855d2651b 100644 --- a/drivers/crypto/rockchip/rk3288_crypto.c +++ b/drivers/crypto/rockchip/rk3288_crypto.c @@ -40,15 +40,8 @@ static int rk_crypto_enable_clk(struct rk_crypto_info *dev) __func__, __LINE__); goto err_hclk; } - err = clk_prepare_enable(dev->dmaclk); - if (err) { - dev_err(dev->dev, "[%s:%d], Couldn't enable clock dmaclk\n", - __func__, __LINE__); - goto err_dmaclk; - } + return err; -err_dmaclk: - clk_disable_unprepare(dev->hclk); err_hclk: clk_disable_unprepare(dev->aclk); err_aclk: @@ -59,7 +52,6 @@ static int rk_crypto_enable_clk(struct rk_crypto_info *dev) static void rk_crypto_disable_clk(struct rk_crypto_info *dev) { - clk_disable_unprepare(dev->dmaclk); clk_disable_unprepare(dev->hclk); clk_disable_unprepare(dev->aclk); clk_disable_unprepare(dev->sclk); @@ -199,12 +191,6 @@ static int rk_crypto_probe(struct platform_device *pdev) goto err_crypto; } - crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk"); - if (IS_ERR(crypto_info->dmaclk)) { - err = PTR_ERR(crypto_info->dmaclk); - goto err_crypto; - } - crypto_info->irq = platform_get_irq(pdev, 0); if (crypto_info->irq < 0) { dev_err(&pdev->dev, "control Interrupt is not available.\n"); diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h index c741e97057dc..963fbfc4d14e 100644 --- a/drivers/crypto/rockchip/rk3288_crypto.h +++ b/drivers/crypto/rockchip/rk3288_crypto.h @@ -191,7 +191,6 @@ struct rk_crypto_info { struct clk *aclk; struct clk *hclk; struct clk *sclk; - struct clk *dmaclk; struct reset_control *rst; void __iomem *reg; int irq; -- 2.34.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 776FDC433F5 for ; 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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id z5-20020a05600c0a0500b0037fa93193a8sm145776wmp.44.2022.03.02.13.11.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Mar 2022 13:11:31 -0800 (PST) From: Corentin Labbe To: heiko@sntech.de, herbert@gondor.apana.org.au, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, john@metanate.com, Corentin Labbe Subject: [PATCH v2 11/18] crypto: rockhip: do not handle dma clock Date: Wed, 2 Mar 2022 21:11:06 +0000 Message-Id: <20220302211113.4003816-12-clabbe@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220302211113.4003816-1-clabbe@baylibre.com> References: <20220302211113.4003816-1-clabbe@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220302_131133_244474_0F19378D X-CRM114-Status: GOOD ( 13.87 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The DMA clock is handled by the DMA controller, so the crypto does not have to touch it. Signed-off-by: Corentin Labbe --- drivers/crypto/rockchip/rk3288_crypto.c | 16 +--------------- drivers/crypto/rockchip/rk3288_crypto.h | 1 - 2 files changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c index 94ef1283789f..645855d2651b 100644 --- a/drivers/crypto/rockchip/rk3288_crypto.c +++ b/drivers/crypto/rockchip/rk3288_crypto.c @@ -40,15 +40,8 @@ static int rk_crypto_enable_clk(struct rk_crypto_info *dev) __func__, __LINE__); goto err_hclk; } - err = clk_prepare_enable(dev->dmaclk); - if (err) { - dev_err(dev->dev, "[%s:%d], Couldn't enable clock dmaclk\n", - __func__, __LINE__); - goto err_dmaclk; - } + return err; -err_dmaclk: - clk_disable_unprepare(dev->hclk); err_hclk: clk_disable_unprepare(dev->aclk); err_aclk: @@ -59,7 +52,6 @@ static int rk_crypto_enable_clk(struct rk_crypto_info *dev) static void rk_crypto_disable_clk(struct rk_crypto_info *dev) { - clk_disable_unprepare(dev->dmaclk); clk_disable_unprepare(dev->hclk); clk_disable_unprepare(dev->aclk); clk_disable_unprepare(dev->sclk); @@ -199,12 +191,6 @@ static int rk_crypto_probe(struct platform_device *pdev) goto err_crypto; } - crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk"); - if (IS_ERR(crypto_info->dmaclk)) { - err = PTR_ERR(crypto_info->dmaclk); - goto err_crypto; - } - crypto_info->irq = platform_get_irq(pdev, 0); if (crypto_info->irq < 0) { dev_err(&pdev->dev, "control Interrupt is not available.\n"); diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h index c741e97057dc..963fbfc4d14e 100644 --- a/drivers/crypto/rockchip/rk3288_crypto.h +++ b/drivers/crypto/rockchip/rk3288_crypto.h @@ -191,7 +191,6 @@ struct rk_crypto_info { struct clk *aclk; struct clk *hclk; struct clk *sclk; - struct clk *dmaclk; struct reset_control *rst; void __iomem *reg; int irq; -- 2.34.1 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 05AC8C433F5 for ; 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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id z5-20020a05600c0a0500b0037fa93193a8sm145776wmp.44.2022.03.02.13.11.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Mar 2022 13:11:31 -0800 (PST) From: Corentin Labbe To: heiko@sntech.de, herbert@gondor.apana.org.au, robh+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, john@metanate.com, Corentin Labbe Subject: [PATCH v2 11/18] crypto: rockhip: do not handle dma clock Date: Wed, 2 Mar 2022 21:11:06 +0000 Message-Id: <20220302211113.4003816-12-clabbe@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220302211113.4003816-1-clabbe@baylibre.com> References: <20220302211113.4003816-1-clabbe@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220302_131133_301629_0216FDE0 X-CRM114-Status: GOOD ( 15.16 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The DMA clock is handled by the DMA controller, so the crypto does not have to touch it. Signed-off-by: Corentin Labbe --- drivers/crypto/rockchip/rk3288_crypto.c | 16 +--------------- drivers/crypto/rockchip/rk3288_crypto.h | 1 - 2 files changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/crypto/rockchip/rk3288_crypto.c b/drivers/crypto/rockchip/rk3288_crypto.c index 94ef1283789f..645855d2651b 100644 --- a/drivers/crypto/rockchip/rk3288_crypto.c +++ b/drivers/crypto/rockchip/rk3288_crypto.c @@ -40,15 +40,8 @@ static int rk_crypto_enable_clk(struct rk_crypto_info *dev) __func__, __LINE__); goto err_hclk; } - err = clk_prepare_enable(dev->dmaclk); - if (err) { - dev_err(dev->dev, "[%s:%d], Couldn't enable clock dmaclk\n", - __func__, __LINE__); - goto err_dmaclk; - } + return err; -err_dmaclk: - clk_disable_unprepare(dev->hclk); err_hclk: clk_disable_unprepare(dev->aclk); err_aclk: @@ -59,7 +52,6 @@ static int rk_crypto_enable_clk(struct rk_crypto_info *dev) static void rk_crypto_disable_clk(struct rk_crypto_info *dev) { - clk_disable_unprepare(dev->dmaclk); clk_disable_unprepare(dev->hclk); clk_disable_unprepare(dev->aclk); clk_disable_unprepare(dev->sclk); @@ -199,12 +191,6 @@ static int rk_crypto_probe(struct platform_device *pdev) goto err_crypto; } - crypto_info->dmaclk = devm_clk_get(&pdev->dev, "apb_pclk"); - if (IS_ERR(crypto_info->dmaclk)) { - err = PTR_ERR(crypto_info->dmaclk); - goto err_crypto; - } - crypto_info->irq = platform_get_irq(pdev, 0); if (crypto_info->irq < 0) { dev_err(&pdev->dev, "control Interrupt is not available.\n"); diff --git a/drivers/crypto/rockchip/rk3288_crypto.h b/drivers/crypto/rockchip/rk3288_crypto.h index c741e97057dc..963fbfc4d14e 100644 --- a/drivers/crypto/rockchip/rk3288_crypto.h +++ b/drivers/crypto/rockchip/rk3288_crypto.h @@ -191,7 +191,6 @@ struct rk_crypto_info { struct clk *aclk; struct clk *hclk; struct clk *sclk; - struct clk *dmaclk; struct reset_control *rst; void __iomem *reg; int irq; -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel