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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id r23-20020aa7da17000000b00415a1431488sm2047368eds.4.2022.03.04.04.25.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Mar 2022 04:25:03 -0800 (PST) From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 3/4] arm64: dts: exynos: add a specific compatible to MCT Date: Fri, 4 Mar 2022 13:24:23 +0100 Message-Id: <20220304122424.307885-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> References: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org One compatible is used for the Multi-Core Timer on most of the Samsung Exynos SoCs, which is correct but not specific enough. These MCT blocks have different number of interrupts, so add a second specific compatible to Exynos5433 and Exynos850. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynos850.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 661567d2dd7a..017ccc2f4650 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -806,7 +806,8 @@ tmu_isp: tmu@1007c000 { }; timer@101c0000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos5433-mct", + "samsung,exynos4210-mct"; reg = <0x101c0000 0x800>; interrupts = , , diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index d1700e96fee2..12f7ddc6fd0a 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -181,7 +181,8 @@ chipid@10000000 { }; timer@10040000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos850-mct", + "samsung,exynos4210-mct"; reg = <0x10040000 0x800>; interrupts = , , -- 2.32.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ABB34C433F5 for ; Fri, 4 Mar 2022 12:26:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id r23-20020aa7da17000000b00415a1431488sm2047368eds.4.2022.03.04.04.25.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Mar 2022 04:25:03 -0800 (PST) From: Krzysztof Kozlowski To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 3/4] arm64: dts: exynos: add a specific compatible to MCT Date: Fri, 4 Mar 2022 13:24:23 +0100 Message-Id: <20220304122424.307885-4-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> References: <20220304122424.307885-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220304_042507_508441_8687207E X-CRM114-Status: GOOD ( 16.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org One compatible is used for the Multi-Core Timer on most of the Samsung Exynos SoCs, which is correct but not specific enough. These MCT blocks have different number of interrupts, so add a second specific compatible to Exynos5433 and Exynos850. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alim Akhtar --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 3 ++- arch/arm64/boot/dts/exynos/exynos850.dtsi | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 661567d2dd7a..017ccc2f4650 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -806,7 +806,8 @@ tmu_isp: tmu@1007c000 { }; timer@101c0000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos5433-mct", + "samsung,exynos4210-mct"; reg = <0x101c0000 0x800>; interrupts = , , diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index d1700e96fee2..12f7ddc6fd0a 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -181,7 +181,8 @@ chipid@10000000 { }; timer@10040000 { - compatible = "samsung,exynos4210-mct"; + compatible = "samsung,exynos850-mct", + "samsung,exynos4210-mct"; reg = <0x10040000 0x800>; interrupts = , , -- 2.32.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel