From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6C42C433F5 for ; Fri, 4 Mar 2022 16:32:40 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F279383D0D; Fri, 4 Mar 2022 17:31:35 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id EF8B883CE9; Fri, 4 Mar 2022 17:30:57 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 0F0E583D03 for ; Fri, 4 Mar 2022 17:30:38 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 24A0F143D; Fri, 4 Mar 2022 08:30:37 -0800 (PST) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.196.172]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 021AB3F73D; Fri, 4 Mar 2022 08:30:35 -0800 (PST) From: Andre Przywara To: Liviu Dudau , Linus Walleij Cc: Peter Hoyes , Tom Rini , Simon Glass , u-boot@lists.denx.de, Sean Anderson Subject: [PATCH 10/11] vexpress64: pick DRAM size from DT Date: Fri, 4 Mar 2022 16:30:17 +0000 Message-Id: <20220304163018.3167841-11-andre.przywara@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220304163018.3167841-1-andre.przywara@arm.com> References: <20220304163018.3167841-1-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean So far the DRAM size for both the Juno and the FVP model were hardcoded in our config header file. For the Juno this is fine, as all models have 8 GiB of DRAM, but the DRAM size can be configured on the model command line. Drop the fixed DRAM size setup, instead look up the size in the device tree, that we now have for every board. This allows a user to inject a DT with the proper size, and be able to use the full amount of DRAM. Signed-off-by: Andre Przywara --- board/armltd/vexpress64/vexpress64.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index c3ad1fcc78..709ebf3fb0 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -88,20 +88,12 @@ int board_init(void) int dram_init(void) { - gd->ram_size = PHYS_SDRAM_1_SIZE; - return 0; + return fdtdec_setup_mem_size_base(); } int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -#ifdef PHYS_SDRAM_2 - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -#endif - - return 0; + return fdtdec_setup_memory_banksize(); } /* Assigned in lowlevel_init.S -- 2.25.1