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From: Ping-Ke Shih <pkshih@realtek.com>
To: <kvalo@kernel.org>
Cc: <linux-wireless@vger.kernel.org>, <leo.li@realtek.com>,
	<hsuan8331@realtek.com>, <yuanhan1020@realtek.com>
Subject: [PATCH 05/11] rtw89: add config_rf_reg_v1 to configure RF parameter tables
Date: Fri, 11 Mar 2022 11:02:55 +0800	[thread overview]
Message-ID: <20220311030301.33921-6-pkshih@realtek.com> (raw)
In-Reply-To: <20220311030301.33921-1-pkshih@realtek.com>

The format of RF parameter is changed; it doesn't encode delay parameters
into table, but the delay coding becomes regular pair of register address
and value.

To help firmware to recover RF register settings, we need to download
these parameters to firmware. For v1 format, only download partial
parameters (ignore them with addr < 0x100).

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
 drivers/net/wireless/realtek/rtw89/core.h |  2 ++
 drivers/net/wireless/realtek/rtw89/phy.c  | 25 +++++++++++++++++++----
 drivers/net/wireless/realtek/rtw89/phy.h  |  4 ++++
 3 files changed, 27 insertions(+), 4 deletions(-)

diff --git a/drivers/net/wireless/realtek/rtw89/core.h b/drivers/net/wireless/realtek/rtw89/core.h
index af73347c40b16..95f105232e807 100644
--- a/drivers/net/wireless/realtek/rtw89/core.h
+++ b/drivers/net/wireless/realtek/rtw89/core.h
@@ -2229,6 +2229,8 @@ struct rtw89_phy_table {
 	const struct rtw89_reg2_def *regs;
 	u32 n_regs;
 	enum rtw89_rf_path rf_path;
+	void (*config)(struct rtw89_dev *rtwdev, const struct rtw89_reg2_def *reg,
+		       enum rtw89_rf_path rf_path, void *data);
 };
 
 struct rtw89_txpwr_table {
diff --git a/drivers/net/wireless/realtek/rtw89/phy.c b/drivers/net/wireless/realtek/rtw89/phy.c
index 43d73ec3f7594..ac211d8973118 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.c
+++ b/drivers/net/wireless/realtek/rtw89/phy.c
@@ -862,6 +862,21 @@ static void rtw89_phy_config_rf_reg(struct rtw89_dev *rtwdev,
 	}
 }
 
+void rtw89_phy_config_rf_reg_v1(struct rtw89_dev *rtwdev,
+				const struct rtw89_reg2_def *reg,
+				enum rtw89_rf_path rf_path,
+				void *extra_data)
+{
+	rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data);
+
+	if (reg->addr < 0x100)
+		return;
+
+	rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path,
+				     (struct rtw89_fw_h2c_rf_reg_info *)extra_data);
+}
+EXPORT_SYMBOL(rtw89_phy_config_rf_reg_v1);
+
 static int rtw89_phy_sel_headline(struct rtw89_dev *rtwdev,
 				  const struct rtw89_phy_table *table,
 				  u32 *headline_size, u32 *headline_idx,
@@ -1033,6 +1048,8 @@ static u32 rtw89_phy_nctl_poll(struct rtw89_dev *rtwdev)
 
 void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev)
 {
+	void (*config)(struct rtw89_dev *rtwdev, const struct rtw89_reg2_def *reg,
+		       enum rtw89_rf_path rf_path, void *data);
 	const struct rtw89_chip_info *chip = rtwdev->chip;
 	const struct rtw89_phy_table *rf_table;
 	struct rtw89_fw_h2c_rf_reg_info *rf_reg_info;
@@ -1043,13 +1060,13 @@ void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev)
 		return;
 
 	for (path = RF_PATH_A; path < chip->rf_path_num; path++) {
-		rf_reg_info->rf_path = path;
 		rf_table = chip->rf_table[path];
-		rtw89_phy_init_reg(rtwdev, rf_table, rtw89_phy_config_rf_reg,
-				   (void *)rf_reg_info);
+		rf_reg_info->rf_path = rf_table->rf_path;
+		config = rf_table->config ? rf_table->config : rtw89_phy_config_rf_reg;
+		rtw89_phy_init_reg(rtwdev, rf_table, config, (void *)rf_reg_info);
 		if (rtw89_phy_config_rf_reg_fw(rtwdev, rf_reg_info))
 			rtw89_warn(rtwdev, "rf path %d reg h2c config failed\n",
-				   path);
+				   rf_reg_info->rf_path);
 	}
 	kfree(rf_reg_info);
 }
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index e600e01cbdd17..adcfcb4c24296 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -404,6 +404,10 @@ bool rtw89_phy_write_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path,
 			   u32 addr, u32 mask, u32 data);
 void rtw89_phy_init_bb_reg(struct rtw89_dev *rtwdev);
 void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev);
+void rtw89_phy_config_rf_reg_v1(struct rtw89_dev *rtwdev,
+				const struct rtw89_reg2_def *reg,
+				enum rtw89_rf_path rf_path,
+				void *extra_data);
 void rtw89_phy_dm_init(struct rtw89_dev *rtwdev);
 void rtw89_phy_write32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask,
 			   u32 data, enum rtw89_phy_idx phy_idx);
-- 
2.25.1


  parent reply	other threads:[~2022-03-11  3:04 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-11  3:02 [PATCH 00/11] rtw89: prepare more shared code to work with 8852c Ping-Ke Shih
2022-03-11  3:02 ` [PATCH 01/11] rtw89: modify dcfo_comp to share with chips Ping-Ke Shih
2022-03-11  3:02 ` [PATCH 02/11] rtw89: 8852c: add write/read crystal function in CFO tracking Ping-Ke Shih
2022-03-11  3:02 ` [PATCH 03/11] rtw89: 8852c: add setting of TB UL TX power offset Ping-Ke Shih
2022-03-11  3:02 ` [PATCH 04/11] rtw89: 8852c: add read/write rf register function Ping-Ke Shih
2022-03-11  3:02 ` Ping-Ke Shih [this message]
2022-03-11  3:02 ` [PATCH 06/11] rtw89: modify MAC enable functions Ping-Ke Shih
2022-03-11  3:02 ` [PATCH 07/11] rtw89: initialize preload window of D-MAC Ping-Ke Shih
2022-03-11  3:02 ` [PATCH 08/11] rtw89: disable FW and H2C function if CPU disabled Ping-Ke Shih
2022-03-11  3:02 ` [PATCH 09/11] rtw89: 8852c: add mac_ctrl_path and mac_cfg_gnt APIs Ping-Ke Shih
2022-03-16 15:48   ` Kalle Valo
2022-03-11  3:03 ` [PATCH 10/11] rtw89: extend mac tx_en bits from 16 to 32 Ping-Ke Shih
2022-03-11  3:03 ` [PATCH 11/11] rtw89: implement stop and resume channels transmission v1 Ping-Ke Shih

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