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[2603:6081:7b01:cbda:2ef0:5dff:fedb:a8ba]) by smtp.gmail.com with ESMTPSA id g200-20020a379dd1000000b0067d76e714f5sm5057881qke.35.2022.03.14.06.10.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 06:10:12 -0700 (PDT) Date: Mon, 14 Mar 2022 09:10:10 -0400 From: Tom Rini To: Jaehoon Chung Cc: Robert Marko , sr@denx.de, peng.fan@nxp.com, stcarlso@linux.microsoft.com, u-boot@lists.denx.de, pali@kernel.org Subject: Re: [PATCH] mmc: xenon_sdhci: remove wait_dat0 SDHCI OP Message-ID: <20220314131010.GY9986@bill-the-cat> References: <20220311181407.1930327-1-robert.marko@sartura.hr> <39424ebb-eac3-7c94-20e0-02a73fa538e1@samsung.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="KH9S6eoVXLBawpUJ" Content-Disposition: inline In-Reply-To: <39424ebb-eac3-7c94-20e0-02a73fa538e1@samsung.com> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean --KH9S6eoVXLBawpUJ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Mar 14, 2022 at 06:37:02PM +0900, Jaehoon Chung wrote: > On 3/12/22 03:14, Robert Marko wrote: > > Generic SDHCI driver received support for checking the busy status by > > polling the DAT[0] level instead of waiting for the worst MMC switch ti= me. > >=20 > > Unfortunately, it appears that this does not work for Xenon controllers > > despite being a part of the standard SDHCI registers and the Armada 3720 > > datasheet itself telling that BIT(20) is useful for detecting the DAT[0] > > busy signal. > >=20 > > I have tried increasing the timeout value, but I have newer managed to > > catch DAT_LEVEL bits change from 0 at all. > >=20 > > This issue appears to hit most if not all SoC-s supported by Xenon driv= er, > > at least A3720, A8040 and CN9130 have non working eMMC currently. > >=20 > > So, until a better solution is found drop the wait_dat0 OP for Xenon. > > I was able to only test it on A3720, but it should work for others as w= ell. > >=20 > > Fixes: 40e6f52454fc ("drivers: mmc: Add wait_dat0 support for sdhci dri= ver") > > Signed-off-by: Robert Marko >=20 > Reviewed-by: Jaehoon Chung Since this is a regression fix, will this be in the PR with the imx fix as well? Thanks! --=20 Tom --KH9S6eoVXLBawpUJ Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmIvPrIACgkQFHw5/5Y0 tyyrlAwAhlFzkSAARhj1Z62BX+ZsaNKGyMwfLA+Nj3N5jKWjwbBjEaI3Qz8iY3ER cX6kumPefCrAit02zbmd7n1wCLgcy6lQnRr1mulWP6cSEA8uWVxn3SwPrtdrWOSf vsEuwipswtGFAubMCaJlZfaLz6MU1zVtTXlq7BHz8UiFJasVg9HNhOrEHUQ8I0m4 NnyjzVyF3DHLU9hSWGFD2GvkAJc8n79ZbDq8eyfqeTHXbfI7wT6l4URBfRSNEDh9 vKL33nzSNmqkYStGbsMuSXt7h3NZsFCBEhNjxIFRIhY1byuuxfvb4r63pWnOcJM4 W2t3pCUbXAisdC//KZ0VHZGCtUaRe7dvAhveHwh1BfdaKAYCvmmVmRBtN5Jl6lbm YlqlfCZEI8GLF8ABoOxFUskdpmvjFCMILCqss47KPq/TlMBSq1r0j1sU7nS/d7nF /G+2jAr35m7JnvgFzeETesqk0CcpscpbS0f4ITEbdwNdbDSMD4xl6UzsECIoCjhy Ckklw6X/ =+oXU -----END PGP SIGNATURE----- --KH9S6eoVXLBawpUJ--