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From: Alan Previn <alan.previn.teres.alexis@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Subject: [Intel-gfx] [PATCH v9 09/13] drm/i915/guc: Check sizing of guc_capture output
Date: Mon, 14 Mar 2022 10:09:50 -0700	[thread overview]
Message-ID: <20220314170954.1537154-10-alan.previn.teres.alexis@intel.com> (raw)
In-Reply-To: <20220314170954.1537154-1-alan.previn.teres.alexis@intel.com>

Add intel_guc_capture_output_min_size_est function to
provide a reasonable minimum size for error-capture
region before allocating the shared buffer.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
 .../gpu/drm/i915/gt/uc/intel_guc_capture.c    | 48 +++++++++++++++++++
 .../gpu/drm/i915/gt/uc/intel_guc_capture.h    |  1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c    |  7 ++-
 3 files changed, 55 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index 249bad6b67ca..8dacd683087b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -663,6 +663,54 @@ intel_guc_capture_getnullheader(struct intel_guc *guc,
 	return 0;
 }
 
+#define GUC_CAPTURE_OVERBUFFER_MULTIPLIER 3
+int
+intel_guc_capture_output_min_size_est(struct intel_guc *guc)
+{
+	struct intel_gt *gt = guc_to_gt(guc);
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	int worst_min_size = 0, num_regs = 0;
+	size_t tmp = 0;
+
+	/*
+	 * If every single engine-instance suffered a failure in quick succession but
+	 * were all unrelated, then a burst of multiple error-capture events would dump
+	 * registers for every one engine instance, one at a time. In this case, GuC
+	 * would even dump the global-registers repeatedly.
+	 *
+	 * For each engine instance, there would be 1 x guc_state_capture_group_t output
+	 * followed by 3 x guc_state_capture_t lists. The latter is how the register
+	 * dumps are split across different register types (where the '3' are global vs class
+	 * vs instance). Finally, let's multiply the whole thing by 3x (just so we are
+	 * not limited to just 1 round of data in a worst case full register dump log)
+	 *
+	 * NOTE: intel_guc_log that allocates the log buffer would round this size up to
+	 * a power of two.
+	 */
+
+	for_each_engine(engine, gt, id) {
+		worst_min_size += sizeof(struct guc_state_capture_group_header_t) +
+				  (3 * sizeof(struct guc_state_capture_header_t));
+
+		if (!intel_guc_capture_getlistsize(guc, 0, GUC_CAPTURE_LIST_TYPE_GLOBAL, 0, &tmp))
+			num_regs += tmp;
+
+		if (!intel_guc_capture_getlistsize(guc, 0, GUC_CAPTURE_LIST_TYPE_ENGINE_CLASS,
+						   engine->class, &tmp)) {
+			num_regs += tmp;
+		}
+		if (!intel_guc_capture_getlistsize(guc, 0, GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE,
+						   engine->class, &tmp)) {
+			num_regs += tmp;
+		}
+	}
+
+	worst_min_size += (num_regs * sizeof(struct guc_mmio_reg));
+
+	return (worst_min_size * GUC_CAPTURE_OVERBUFFER_MULTIPLIER);
+}
+
 static void
 guc_capture_free_ads_cache(struct intel_guc_state_capture *gc)
 {
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
index 8de7704e12eb..540d72079462 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
@@ -11,6 +11,7 @@
 struct guc_gt_system_info;
 struct intel_guc;
 
+int intel_guc_capture_output_min_size_est(struct intel_guc *guc);
 int intel_guc_capture_getlist(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
 			      void **outptr);
 int intel_guc_capture_getlistsize(struct intel_guc *guc, u32 owner, u32 type, u32 classid,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index a2da3f6f2ba0..218d9603d3c5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
@@ -7,10 +7,11 @@
 #include <linux/string_helpers.h>
 
 #include "gt/intel_gt.h"
+#include "intel_guc_capture.h"
+#include "intel_guc_log.h"
 #include "i915_drv.h"
 #include "i915_irq.h"
 #include "i915_memcpy.h"
-#include "intel_guc_log.h"
 
 static void guc_log_copy_debuglogs_for_relay(struct intel_guc_log *log);
 
@@ -465,6 +466,10 @@ int intel_guc_log_create(struct intel_guc_log *log)
 	 *  |         Capture logs          |
 	 *  +===============================+ + CAPTURE_SIZE
 	 */
+	if (intel_guc_capture_output_min_size_est(guc) > CAPTURE_BUFFER_SIZE)
+		DRM_WARN("GuC log buffer for state_capture maybe too small. %d < %d\n",
+			 CAPTURE_BUFFER_SIZE, intel_guc_capture_output_min_size_est(guc));
+
 	guc_log_size = PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +
 		       CAPTURE_BUFFER_SIZE;
 
-- 
2.25.1


  parent reply	other threads:[~2022-03-14 17:07 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-14 17:09 [PATCH v9 00/13] Add GuC Error Capture Support Alan Previn
2022-03-14 17:09 ` [Intel-gfx] " Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 01/13] drm/i915/guc: Update GuC ADS size for error capture lists Alan Previn
2022-03-15 15:17   ` Matthew Brost
2022-03-15 16:06     ` Teres Alexis, Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 02/13] drm/i915/guc: Add XE_LP static registers for GuC error capture Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 03/13] drm/i915/guc: Add XE_LP steered register lists support Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 04/13] drm/i915/guc: Add DG2 registers for GuC error state capture Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 05/13] drm/i915/guc: Add Gen9 " Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 06/13] drm/i915/guc: Add GuC's error state capture output structures Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 07/13] drm/i915/guc: Update GuC-log relay function names Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 08/13] drm/i915/guc: Add capture region into intel_guc_log Alan Previn
2022-03-14 17:09 ` Alan Previn [this message]
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 10/13] drm/i915/guc: Extract GuC error capture lists on G2H notification Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 11/13] drm/i915/guc: Pre-allocate output nodes for extraction Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 12/13] drm/i915/guc: Plumb GuC-capture into gpu_coredump Alan Previn
2022-03-14 17:09 ` [Intel-gfx] [PATCH v9 13/13] drm/i915/guc: Print the GuC error capture output register list Alan Previn
2022-03-14 23:42   ` kernel test robot
2022-03-15  2:26   ` kernel test robot
2022-03-16  1:04     ` Teres Alexis, Alan Previn
2022-03-16  1:04       ` Teres Alexis, Alan Previn
2022-03-14 20:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add GuC Error Capture Support Patchwork
2022-03-14 20:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-14 20:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-15 18:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add GuC Error Capture Support (rev2) Patchwork
2022-03-16  1:24   ` Teres Alexis, Alan Previn
2022-03-15 18:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-15 18:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-15 22:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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