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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v2 4/9] arm64/sysreg: Provide a helper macro for defining sysreg bitmasks
Date: Wed, 16 Mar 2022 17:08:44 +0000	[thread overview]
Message-ID: <20220316170849.1183941-5-broonie@kernel.org> (raw)
In-Reply-To: <20220316170849.1183941-1-broonie@kernel.org>

To ease the generation of headers for the bitfields in the system registers
provide a macro for defining bitfields based on the top and bottom bit.

Ideally this should be provided along with the generic BIT() macros however
there are a bunch of existing places with such macros including some that
actually call their macro BITMASK() so rather than create a dependency on
a wider cleanup let's define something local for now, this can be improved
later. This also sidesteps the need to consider types other than u64.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 arch/arm64/include/asm/sysreg.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index abb1e0502e28..fa2ae02de465 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -15,6 +15,8 @@
 
 #include <asm/gpr-num.h>
 
+#define ARM64_SYSREG_BITMASK(h, l) ((BIT(ULL(h)) - BIT(ULL(l))) | BIT(ULL(h)))
+
 /*
  * ARMv8 ARM reserves the following encoding for system registers:
  * (Ref: ARMv8 ARM, Section: "System instruction class encoding overview",
-- 
2.30.2


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  parent reply	other threads:[~2022-03-16 17:11 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-16 17:08 [PATCH v2 0/9] arm64: Automatic system register definition generation Mark Brown
2022-03-16 17:08 ` [PATCH v2 1/9] arm64/mte: Move shift from definition of TCF0 enumeration values Mark Brown
2022-03-16 17:08 ` [PATCH v2 2/9] arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro names Mark Brown
2022-03-16 17:08 ` [PATCH v2 3/9] arm64/sysreg: Rename SCTLR_EL1_NTWE/TWI to SCTLR_EL1_nTWE/TWI Mark Brown
2022-03-16 17:08 ` Mark Brown [this message]
2022-03-23 17:58   ` [PATCH v2 4/9] arm64/sysreg: Provide a helper macro for defining sysreg bitmasks Mark Rutland
2022-03-23 19:15     ` Mark Brown
2022-03-16 17:08 ` [PATCH v2 5/9] arm64: Add sysreg header generation scripting Mark Brown
2022-03-16 17:08 ` [PATCH v2 6/9] arm64/sysreg: Enable automatic generation of system register definitions Mark Brown
2022-03-16 17:08 ` [PATCH v2 7/9] arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1 Mark Brown
2022-03-16 17:08 ` [PATCH v2 8/9] arm64/sysreg: Generate definitions for TTBRn_EL1 Mark Brown
2022-03-16 17:08 ` [PATCH v2 9/9] arm64/sysreg: Generate definitions for SCTLR_EL1 Mark Brown

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