From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 323A5C433FE for ; Sat, 19 Mar 2022 18:15:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235808AbiCSSQq (ORCPT ); Sat, 19 Mar 2022 14:16:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47556 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234687AbiCSSQp (ORCPT ); Sat, 19 Mar 2022 14:16:45 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B1371AA04C; Sat, 19 Mar 2022 11:15:23 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B2FCBB80D9B; Sat, 19 Mar 2022 18:15:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 14046C340EC; Sat, 19 Mar 2022 18:15:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1647713720; bh=Dhv4HLH1QHUCsAquZQFUITV9pIdJgaLXe9+CyyHB74c=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=H08MB0ENRogV7LsrFRueTqSGzFgC3+bvd8xOpGbvJFQ1lliTW9pAU+dHvKwIZoD1F qedZiVvB40INGtMHeJ5hbDzPHpS8Ty2I5IFHqS8zc6A5rHUYpHRiO951KaOfHjvTpF 9Af0c/w4VyR0n7wou7FJ7EFY3YNqt8u8a3zLQv18Tbf16PYOTsrVO9wHjfedKNSFUz VIMdowoJNCg2zYpkRCF/Lf43UbppJDI97C77XWXRqmaypCtqSz6B2n72dgavrJLxRO mGoO/8R+i9VSocykRCVrJcswg+i7lsgmvXOrQYVxqpNO6AIlxvpCk8n2oXeXlMPk0u oU9RC4ty2PaSQ== Date: Sat, 19 Mar 2022 18:22:40 +0000 From: Jonathan Cameron To: Uwe =?UTF-8?B?S2xlaW5lLUvDtm5pZw==?= Cc: Michael Turquette , Stephen Boyd , Russell King , Lars-Peter Clausen , Michael Hennerich , linux-clk@vger.kernel.org, kernel@pengutronix.de, Paul Cercueil , Vladimir Zapolskiy , Heiko Stuebner , Tomislav Denis , Anand Ashok Dumbre , Michal Simek , Nuno Sa , =?UTF-8?B?QW5kcsOp?= Gustavo Nakagomi Lopez , Cai Huoqing , linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v8 04/16] iio: Make use of devm_clk_get_enabled() Message-ID: <20220319182240.30456776@jic23-huawei> In-Reply-To: <20220314141643.22184-5-u.kleine-koenig@pengutronix.de> References: <20220314141643.22184-1-u.kleine-koenig@pengutronix.de> <20220314141643.22184-5-u.kleine-koenig@pengutronix.de> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On Mon, 14 Mar 2022 15:16:31 +0100 Uwe Kleine-K=C3=B6nig wrote: > Several drivers manually register a devm handler to disable their clk. > Convert them to devm_clk_get_enabled(). >=20 > Signed-off-by: Uwe Kleine-K=C3=B6nig Acked-by: Jonathan Cameron If this does get picked up, can who ever does it please provide an immutable branch. With some many drivers cleaned up, it's very likely to cause some merge fun somewhere otherwise. Thanks, Jonathan > --- > drivers/iio/adc/ad7124.c | 15 +--------- > drivers/iio/adc/ad7768-1.c | 17 +----------- > drivers/iio/adc/ad9467.c | 17 +----------- > drivers/iio/adc/ingenic-adc.c | 15 ++-------- > drivers/iio/adc/lpc18xx_adc.c | 18 +----------- > drivers/iio/adc/rockchip_saradc.c | 44 ++---------------------------- > drivers/iio/adc/ti-ads131e08.c | 19 +------------ > drivers/iio/adc/xilinx-ams.c | 15 +--------- > drivers/iio/adc/xilinx-xadc-core.c | 18 +----------- > drivers/iio/frequency/adf4371.c | 17 +----------- > drivers/iio/frequency/admv1013.c | 15 +--------- > drivers/iio/frequency/adrf6780.c | 16 +---------- > drivers/iio/imu/adis16475.c | 15 +--------- > 13 files changed, 15 insertions(+), 226 deletions(-) >=20 > diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c > index b400bbe291aa..fcfa4e0b41fb 100644 > --- a/drivers/iio/adc/ad7124.c > +++ b/drivers/iio/adc/ad7124.c > @@ -862,11 +862,6 @@ static void ad7124_reg_disable(void *r) > regulator_disable(r); > } > =20 > -static void ad7124_clk_disable(void *c) > -{ > - clk_disable_unprepare(c); > -} > - > static int ad7124_probe(struct spi_device *spi) > { > const struct ad7124_chip_info *info; > @@ -917,18 +912,10 @@ static int ad7124_probe(struct spi_device *spi) > return ret; > } > =20 > - st->mclk =3D devm_clk_get(&spi->dev, "mclk"); > + st->mclk =3D devm_clk_get_enabled(&spi->dev, "mclk"); > if (IS_ERR(st->mclk)) > return PTR_ERR(st->mclk); > =20 > - ret =3D clk_prepare_enable(st->mclk); > - if (ret < 0) > - return ret; > - > - ret =3D devm_add_action_or_reset(&spi->dev, ad7124_clk_disable, st->mcl= k); > - if (ret) > - return ret; > - > ret =3D ad7124_soft_reset(st); > if (ret < 0) > return ret; > diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c > index aa42ba759fa1..8ae34ed8fabd 100644 > --- a/drivers/iio/adc/ad7768-1.c > +++ b/drivers/iio/adc/ad7768-1.c > @@ -539,13 +539,6 @@ static void ad7768_regulator_disable(void *data) > regulator_disable(st->vref); > } > =20 > -static void ad7768_clk_disable(void *data) > -{ > - struct ad7768_state *st =3D data; > - > - clk_disable_unprepare(st->mclk); > -} > - > static int ad7768_set_channel_label(struct iio_dev *indio_dev, > int num_channels) > { > @@ -600,18 +593,10 @@ static int ad7768_probe(struct spi_device *spi) > if (ret) > return ret; > =20 > - st->mclk =3D devm_clk_get(&spi->dev, "mclk"); > + st->mclk =3D devm_clk_get_enabled(&spi->dev, "mclk"); > if (IS_ERR(st->mclk)) > return PTR_ERR(st->mclk); > =20 > - ret =3D clk_prepare_enable(st->mclk); > - if (ret < 0) > - return ret; > - > - ret =3D devm_add_action_or_reset(&spi->dev, ad7768_clk_disable, st); > - if (ret) > - return ret; > - > st->mclk_freq =3D clk_get_rate(st->mclk); > =20 > mutex_init(&st->lock); > diff --git a/drivers/iio/adc/ad9467.c b/drivers/iio/adc/ad9467.c > index dbfc8517cb8a..a07df0fd3329 100644 > --- a/drivers/iio/adc/ad9467.c > +++ b/drivers/iio/adc/ad9467.c > @@ -378,13 +378,6 @@ static int ad9467_preenable_setup(struct adi_axi_adc= _conv *conv) > return ad9467_outputmode_set(st->spi, st->output_mode); > } > =20 > -static void ad9467_clk_disable(void *data) > -{ > - struct ad9467_state *st =3D data; > - > - clk_disable_unprepare(st->clk); > -} > - > static int ad9467_probe(struct spi_device *spi) > { > const struct ad9467_chip_info *info; > @@ -404,18 +397,10 @@ static int ad9467_probe(struct spi_device *spi) > st =3D adi_axi_adc_conv_priv(conv); > st->spi =3D spi; > =20 > - st->clk =3D devm_clk_get(&spi->dev, "adc-clk"); > + st->clk =3D devm_clk_get_enabled(&spi->dev, "adc-clk"); > if (IS_ERR(st->clk)) > return PTR_ERR(st->clk); > =20 > - ret =3D clk_prepare_enable(st->clk); > - if (ret < 0) > - return ret; > - > - ret =3D devm_add_action_or_reset(&spi->dev, ad9467_clk_disable, st); > - if (ret) > - return ret; > - > st->pwrdown_gpio =3D devm_gpiod_get_optional(&spi->dev, "powerdown", > GPIOD_OUT_LOW); > if (IS_ERR(st->pwrdown_gpio)) > diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c > index 2b3912c6ca6b..b6433bcd53f5 100644 > --- a/drivers/iio/adc/ingenic-adc.c > +++ b/drivers/iio/adc/ingenic-adc.c > @@ -732,11 +732,6 @@ static int ingenic_adc_of_xlate(struct iio_dev *iio_= dev, > return -EINVAL; > } > =20 > -static void ingenic_adc_clk_cleanup(void *data) > -{ > - clk_unprepare(data); > -} > - > static const struct iio_info ingenic_adc_info =3D { > .write_raw =3D ingenic_adc_write_raw, > .read_raw =3D ingenic_adc_read_raw, > @@ -856,13 +851,13 @@ static int ingenic_adc_probe(struct platform_device= *pdev) > if (IS_ERR(adc->base)) > return PTR_ERR(adc->base); > =20 > - adc->clk =3D devm_clk_get(dev, "adc"); > + adc->clk =3D devm_clk_get_prepared(dev, "adc"); > if (IS_ERR(adc->clk)) { > dev_err(dev, "Unable to get clock\n"); > return PTR_ERR(adc->clk); > } > =20 > - ret =3D clk_prepare_enable(adc->clk); > + ret =3D clk_enable(adc->clk); > if (ret) { > dev_err(dev, "Failed to enable clock\n"); > return ret; > @@ -891,12 +886,6 @@ static int ingenic_adc_probe(struct platform_device = *pdev) > usleep_range(2000, 3000); /* Must wait at least 2ms. */ > clk_disable(adc->clk); > =20 > - ret =3D devm_add_action_or_reset(dev, ingenic_adc_clk_cleanup, adc->clk= ); > - if (ret) { > - dev_err(dev, "Unable to add action\n"); > - return ret; > - } > - > iio_dev->name =3D "jz-adc"; > iio_dev->modes =3D INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE; > iio_dev->setup_ops =3D &ingenic_buffer_setup_ops; > diff --git a/drivers/iio/adc/lpc18xx_adc.c b/drivers/iio/adc/lpc18xx_adc.c > index ae9c9384f23e..8bbc18aaa474 100644 > --- a/drivers/iio/adc/lpc18xx_adc.c > +++ b/drivers/iio/adc/lpc18xx_adc.c > @@ -122,11 +122,6 @@ static void lpc18xx_clear_cr_reg(void *data) > writel(0, adc->base + LPC18XX_ADC_CR); > } > =20 > -static void lpc18xx_clk_disable(void *clk) > -{ > - clk_disable_unprepare(clk); > -} > - > static void lpc18xx_regulator_disable(void *vref) > { > regulator_disable(vref); > @@ -152,7 +147,7 @@ static int lpc18xx_adc_probe(struct platform_device *= pdev) > if (IS_ERR(adc->base)) > return PTR_ERR(adc->base); > =20 > - adc->clk =3D devm_clk_get(&pdev->dev, NULL); > + adc->clk =3D devm_clk_get_enabled(&pdev->dev, NULL); > if (IS_ERR(adc->clk)) > return dev_err_probe(&pdev->dev, PTR_ERR(adc->clk), > "error getting clock\n"); > @@ -178,17 +173,6 @@ static int lpc18xx_adc_probe(struct platform_device = *pdev) > if (ret) > return ret; > =20 > - ret =3D clk_prepare_enable(adc->clk); > - if (ret) { > - dev_err(&pdev->dev, "unable to enable clock\n"); > - return ret; > - } > - > - ret =3D devm_add_action_or_reset(&pdev->dev, lpc18xx_clk_disable, > - adc->clk); > - if (ret) > - return ret; > - > rate =3D clk_get_rate(adc->clk); > clkdiv =3D DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET); > =20 > diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip= _saradc.c > index 14b8df4ca9c8..0a053e8b2483 100644 > --- a/drivers/iio/adc/rockchip_saradc.c > +++ b/drivers/iio/adc/rockchip_saradc.c > @@ -233,20 +233,6 @@ static void rockchip_saradc_reset_controller(struct = reset_control *reset) > reset_control_deassert(reset); > } > =20 > -static void rockchip_saradc_clk_disable(void *data) > -{ > - struct rockchip_saradc *info =3D data; > - > - clk_disable_unprepare(info->clk); > -} > - > -static void rockchip_saradc_pclk_disable(void *data) > -{ > - struct rockchip_saradc *info =3D data; > - > - clk_disable_unprepare(info->pclk); > -} > - > static void rockchip_saradc_regulator_disable(void *data) > { > struct rockchip_saradc *info =3D data; > @@ -380,12 +366,12 @@ static int rockchip_saradc_probe(struct platform_de= vice *pdev) > return ret; > } > =20 > - info->pclk =3D devm_clk_get(&pdev->dev, "apb_pclk"); > + info->pclk =3D devm_clk_get_enabled(&pdev->dev, "apb_pclk"); > if (IS_ERR(info->pclk)) > return dev_err_probe(&pdev->dev, PTR_ERR(info->pclk), > "failed to get pclk\n"); > =20 > - info->clk =3D devm_clk_get(&pdev->dev, "saradc"); > + info->clk =3D devm_clk_get_enabled(&pdev->dev, "saradc"); > if (IS_ERR(info->clk)) > return dev_err_probe(&pdev->dev, PTR_ERR(info->clk), > "failed to get adc clock\n"); > @@ -427,32 +413,6 @@ static int rockchip_saradc_probe(struct platform_dev= ice *pdev) > =20 > info->uv_vref =3D ret; > =20 > - ret =3D clk_prepare_enable(info->pclk); > - if (ret < 0) { > - dev_err(&pdev->dev, "failed to enable pclk\n"); > - return ret; > - } > - ret =3D devm_add_action_or_reset(&pdev->dev, > - rockchip_saradc_pclk_disable, info); > - if (ret) { > - dev_err(&pdev->dev, "failed to register devm action, %d\n", > - ret); > - return ret; > - } > - > - ret =3D clk_prepare_enable(info->clk); > - if (ret < 0) { > - dev_err(&pdev->dev, "failed to enable converter clock\n"); > - return ret; > - } > - ret =3D devm_add_action_or_reset(&pdev->dev, > - rockchip_saradc_clk_disable, info); > - if (ret) { > - dev_err(&pdev->dev, "failed to register devm action, %d\n", > - ret); > - return ret; > - } > - > platform_set_drvdata(pdev, indio_dev); > =20 > indio_dev->name =3D dev_name(&pdev->dev); > diff --git a/drivers/iio/adc/ti-ads131e08.c b/drivers/iio/adc/ti-ads131e0= 8.c > index 0c2025a22575..7d7a8f0d3ab5 100644 > --- a/drivers/iio/adc/ti-ads131e08.c > +++ b/drivers/iio/adc/ti-ads131e08.c > @@ -793,13 +793,6 @@ static void ads131e08_regulator_disable(void *data) > regulator_disable(st->vref_reg); > } > =20 > -static void ads131e08_clk_disable(void *data) > -{ > - struct ads131e08_state *st =3D data; > - > - clk_disable_unprepare(st->adc_clk); > -} > - > static int ads131e08_probe(struct spi_device *spi) > { > const struct ads131e08_info *info; > @@ -892,21 +885,11 @@ static int ads131e08_probe(struct spi_device *spi) > st->vref_reg =3D NULL; > } > =20 > - st->adc_clk =3D devm_clk_get(&spi->dev, "adc-clk"); > + st->adc_clk =3D devm_clk_get_enabled(&spi->dev, "adc-clk"); > if (IS_ERR(st->adc_clk)) > return dev_err_probe(&spi->dev, PTR_ERR(st->adc_clk), > "failed to get the ADC clock\n"); > =20 > - ret =3D clk_prepare_enable(st->adc_clk); > - if (ret) { > - dev_err(&spi->dev, "failed to prepare/enable the ADC clock\n"); > - return ret; > - } > - > - ret =3D devm_add_action_or_reset(&spi->dev, ads131e08_clk_disable, st); > - if (ret) > - return ret; > - > adc_clk_hz =3D clk_get_rate(st->adc_clk); > if (!adc_clk_hz) { > dev_err(&spi->dev, "failed to get the ADC clock rate\n"); > diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c > index 8343c5f74121..4e4f0c80db54 100644 > --- a/drivers/iio/adc/xilinx-ams.c > +++ b/drivers/iio/adc/xilinx-ams.c > @@ -1343,11 +1343,6 @@ static const struct of_device_id ams_of_match_tabl= e[] =3D { > }; > MODULE_DEVICE_TABLE(of, ams_of_match_table); > =20 > -static void ams_clk_disable_unprepare(void *data) > -{ > - clk_disable_unprepare(data); > -} > - > static void ams_cancel_delayed_work(void *data) > { > cancel_delayed_work(data); > @@ -1377,18 +1372,10 @@ static int ams_probe(struct platform_device *pdev) > if (IS_ERR(ams->base)) > return PTR_ERR(ams->base); > =20 > - ams->clk =3D devm_clk_get(&pdev->dev, NULL); > + ams->clk =3D devm_clk_get_enabled(&pdev->dev, NULL); > if (IS_ERR(ams->clk)) > return PTR_ERR(ams->clk); > =20 > - ret =3D clk_prepare_enable(ams->clk); > - if (ret < 0) > - return ret; > - > - ret =3D devm_add_action_or_reset(&pdev->dev, ams_clk_disable_unprepare,= ams->clk); > - if (ret < 0) > - return ret; > - > INIT_DELAYED_WORK(&ams->ams_unmask_work, ams_unmask_worker); > ret =3D devm_add_action_or_reset(&pdev->dev, ams_cancel_delayed_work, > &ams->ams_unmask_work); > diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-= xadc-core.c > index 823c8e5f9809..a520e07e4e08 100644 > --- a/drivers/iio/adc/xilinx-xadc-core.c > +++ b/drivers/iio/adc/xilinx-xadc-core.c > @@ -1299,13 +1299,6 @@ static const char * const xadc_type_names[] =3D { > [XADC_TYPE_US] =3D "xilinx-system-monitor", > }; > =20 > -static void xadc_clk_disable_unprepare(void *data) > -{ > - struct clk *clk =3D data; > - > - clk_disable_unprepare(clk); > -} > - > static void xadc_cancel_delayed_work(void *data) > { > struct delayed_work *work =3D data; > @@ -1383,19 +1376,10 @@ static int xadc_probe(struct platform_device *pde= v) > } > } > =20 > - xadc->clk =3D devm_clk_get(dev, NULL); > + xadc->clk =3D devm_clk_get_enabled(dev, NULL); > if (IS_ERR(xadc->clk)) > return PTR_ERR(xadc->clk); > =20 > - ret =3D clk_prepare_enable(xadc->clk); > - if (ret) > - return ret; > - > - ret =3D devm_add_action_or_reset(dev, > - xadc_clk_disable_unprepare, xadc->clk); > - if (ret) > - return ret; > - > /* > * Make sure not to exceed the maximum samplerate since otherwise the > * resulting interrupt storm will soft-lock the system. > diff --git a/drivers/iio/frequency/adf4371.c b/drivers/iio/frequency/adf4= 371.c > index ecd5e18995ad..54040b5fded0 100644 > --- a/drivers/iio/frequency/adf4371.c > +++ b/drivers/iio/frequency/adf4371.c > @@ -540,13 +540,6 @@ static int adf4371_setup(struct adf4371_state *st) > return regmap_bulk_write(st->regmap, ADF4371_REG(0x30), st->buf, 5); > } > =20 > -static void adf4371_clk_disable(void *data) > -{ > - struct adf4371_state *st =3D data; > - > - clk_disable_unprepare(st->clkin); > -} > - > static int adf4371_probe(struct spi_device *spi) > { > const struct spi_device_id *id =3D spi_get_device_id(spi); > @@ -579,18 +572,10 @@ static int adf4371_probe(struct spi_device *spi) > indio_dev->channels =3D st->chip_info->channels; > indio_dev->num_channels =3D st->chip_info->num_channels; > =20 > - st->clkin =3D devm_clk_get(&spi->dev, "clkin"); > + st->clkin =3D devm_clk_get_enabled(&spi->dev, "clkin"); > if (IS_ERR(st->clkin)) > return PTR_ERR(st->clkin); > =20 > - ret =3D clk_prepare_enable(st->clkin); > - if (ret < 0) > - return ret; > - > - ret =3D devm_add_action_or_reset(&spi->dev, adf4371_clk_disable, st); > - if (ret) > - return ret; > - > st->clkin_freq =3D clk_get_rate(st->clkin); > =20 > ret =3D adf4371_setup(st); > diff --git a/drivers/iio/frequency/admv1013.c b/drivers/iio/frequency/adm= v1013.c > index 3f3c478e9baa..b3e7eb322ade 100644 > --- a/drivers/iio/frequency/admv1013.c > +++ b/drivers/iio/frequency/admv1013.c > @@ -490,11 +490,6 @@ static int admv1013_init(struct admv1013_state *st) > st->input_mode); > } > =20 > -static void admv1013_clk_disable(void *data) > -{ > - clk_disable_unprepare(data); > -} > - > static void admv1013_reg_disable(void *data) > { > regulator_disable(data); > @@ -559,7 +554,7 @@ static int admv1013_properties_parse(struct admv1013_= state *st) > return dev_err_probe(&spi->dev, PTR_ERR(st->reg), > "failed to get the common-mode voltage\n"); > =20 > - st->clkin =3D devm_clk_get(&spi->dev, "lo_in"); > + st->clkin =3D devm_clk_get_enabled(&spi->dev, "lo_in"); > if (IS_ERR(st->clkin)) > return dev_err_probe(&spi->dev, PTR_ERR(st->clkin), > "failed to get the LO input clock\n"); > @@ -601,14 +596,6 @@ static int admv1013_probe(struct spi_device *spi) > if (ret) > return ret; > =20 > - ret =3D clk_prepare_enable(st->clkin); > - if (ret) > - return ret; > - > - ret =3D devm_add_action_or_reset(&spi->dev, admv1013_clk_disable, st->c= lkin); > - if (ret) > - return ret; > - > st->nb.notifier_call =3D admv1013_freq_change; > ret =3D devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb); > if (ret) > diff --git a/drivers/iio/frequency/adrf6780.c b/drivers/iio/frequency/adr= f6780.c > index 8255ffd174f6..d7bf34ceedd8 100644 > --- a/drivers/iio/frequency/adrf6780.c > +++ b/drivers/iio/frequency/adrf6780.c > @@ -441,11 +441,6 @@ static void adrf6780_properties_parse(struct adrf678= 0_state *st) > st->vdet_out_en =3D device_property_read_bool(&spi->dev, "adi,vdet-out-= en"); > } > =20 > -static void adrf6780_clk_disable(void *data) > -{ > - clk_disable_unprepare(data); > -} > - > static void adrf6780_powerdown(void *data) > { > /* Disable all components in the Enable Register */ > @@ -473,20 +468,11 @@ static int adrf6780_probe(struct spi_device *spi) > =20 > adrf6780_properties_parse(st); > =20 > - st->clkin =3D devm_clk_get(&spi->dev, "lo_in"); > + st->clkin =3D devm_clk_get_enabled(&spi->dev, "lo_in"); > if (IS_ERR(st->clkin)) > return dev_err_probe(&spi->dev, PTR_ERR(st->clkin), > "failed to get the LO input clock\n"); > =20 > - ret =3D clk_prepare_enable(st->clkin); > - if (ret) > - return ret; > - > - ret =3D devm_add_action_or_reset(&spi->dev, adrf6780_clk_disable, > - st->clkin); > - if (ret) > - return ret; > - > mutex_init(&st->lock); > =20 > ret =3D adrf6780_init(st); > diff --git a/drivers/iio/imu/adis16475.c b/drivers/iio/imu/adis16475.c > index ea91d127077d..45a8765d7c16 100644 > --- a/drivers/iio/imu/adis16475.c > +++ b/drivers/iio/imu/adis16475.c > @@ -1120,11 +1120,6 @@ static irqreturn_t adis16475_trigger_handler(int i= rq, void *p) > return IRQ_HANDLED; > } > =20 > -static void adis16475_disable_clk(void *data) > -{ > - clk_disable_unprepare((struct clk *)data); > -} > - > static int adis16475_config_sync_mode(struct adis16475 *st) > { > int ret; > @@ -1150,19 +1145,11 @@ static int adis16475_config_sync_mode(struct adis= 16475 *st) > =20 > /* All the other modes require external input signal */ > if (sync->sync_mode !=3D ADIS16475_SYNC_OUTPUT) { > - struct clk *clk =3D devm_clk_get(dev, NULL); > + struct clk *clk =3D devm_clk_get_enabled(dev, NULL); > =20 > if (IS_ERR(clk)) > return PTR_ERR(clk); > =20 > - ret =3D clk_prepare_enable(clk); > - if (ret) > - return ret; > - > - ret =3D devm_add_action_or_reset(dev, adis16475_disable_clk, clk); > - if (ret) > - return ret; > - > st->clk_freq =3D clk_get_rate(clk); > if (st->clk_freq < sync->min_rate || > st->clk_freq > sync->max_rate) { From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20E20C433F5 for ; Sat, 19 Mar 2022 18:17:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2ipgDXdPrS522urpL3kyfiMa5VocMYOoE3uh9C563J0=; b=IClC3UWDaJginT NALdZB1Bc/C9yDcnzLI28R7x4p47jVhUcmRvRG+tBNxwg9Fb3BpzkumxoHJaXF0vcC8cJ0GoSWvZZ Ro8W0hhtXHLFF3vmCLs6nblfXkrmWZd584DoG34t8Ei9w7D8k4VZi8PWNwFJPUDNbOKzkWu3adjFd KRzMhQCqNzebSU1NKGKi9OI9JORITCyh3Ua8N3Bd5gxo6BKvRFr5TlIGPb85TRJdGoMTXxWYuYQoz IuwdGxIac1ewQFgToa3EbkHcdDcDnwXBgxRQD+RMZ0jtU0arKiiDD5uYzMH/OUvPw8VyY+4JSsQeY Qm73IAippWur/OeV0cog==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nVdbs-004AUb-Qd; Sat, 19 Mar 2022 18:15:28 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nVdbo-004ATH-7L for linux-arm-kernel@lists.infradead.org; Sat, 19 Mar 2022 18:15:27 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B1A56B80D76; Sat, 19 Mar 2022 18:15:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 14046C340EC; Sat, 19 Mar 2022 18:15:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1647713720; bh=Dhv4HLH1QHUCsAquZQFUITV9pIdJgaLXe9+CyyHB74c=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=H08MB0ENRogV7LsrFRueTqSGzFgC3+bvd8xOpGbvJFQ1lliTW9pAU+dHvKwIZoD1F qedZiVvB40INGtMHeJ5hbDzPHpS8Ty2I5IFHqS8zc6A5rHUYpHRiO951KaOfHjvTpF 9Af0c/w4VyR0n7wou7FJ7EFY3YNqt8u8a3zLQv18Tbf16PYOTsrVO9wHjfedKNSFUz VIMdowoJNCg2zYpkRCF/Lf43UbppJDI97C77XWXRqmaypCtqSz6B2n72dgavrJLxRO mGoO/8R+i9VSocykRCVrJcswg+i7lsgmvXOrQYVxqpNO6AIlxvpCk8n2oXeXlMPk0u oU9RC4ty2PaSQ== Date: Sat, 19 Mar 2022 18:22:40 +0000 From: Jonathan Cameron To: Uwe =?UTF-8?B?S2xlaW5lLUvDtm5pZw==?= Cc: Michael Turquette , Stephen Boyd , Russell King , Lars-Peter Clausen , Michael Hennerich , linux-clk@vger.kernel.org, kernel@pengutronix.de, Paul Cercueil , Vladimir Zapolskiy , Heiko Stuebner , Tomislav Denis , Anand Ashok Dumbre , Michal Simek , Nuno Sa , =?UTF-8?B?QW5kcsOp?= Gustavo Nakagomi Lopez , Cai Huoqing , linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v8 04/16] iio: Make use of devm_clk_get_enabled() Message-ID: <20220319182240.30456776@jic23-huawei> In-Reply-To: <20220314141643.22184-5-u.kleine-koenig@pengutronix.de> References: <20220314141643.22184-1-u.kleine-koenig@pengutronix.de> <20220314141643.22184-5-u.kleine-koenig@pengutronix.de> X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220319_111524_619165_4AF7280D X-CRM114-Status: GOOD ( 23.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gTW9uLCAxNCBNYXIgMjAyMiAxNToxNjozMSArMDEwMApVd2UgS2xlaW5lLUvDtm5pZyA8dS5r bGVpbmUta29lbmlnQHBlbmd1dHJvbml4LmRlPiB3cm90ZToKCj4gU2V2ZXJhbCBkcml2ZXJzIG1h bnVhbGx5IHJlZ2lzdGVyIGEgZGV2bSBoYW5kbGVyIHRvIGRpc2FibGUgdGhlaXIgY2xrLgo+IENv bnZlcnQgdGhlbSB0byBkZXZtX2Nsa19nZXRfZW5hYmxlZCgpLgo+IAo+IFNpZ25lZC1vZmYtYnk6 IFV3ZSBLbGVpbmUtS8O2bmlnIDx1LmtsZWluZS1rb2VuaWdAcGVuZ3V0cm9uaXguZGU+CgpBY2tl ZC1ieTogSm9uYXRoYW4gQ2FtZXJvbiA8Sm9uYXRoYW4uQ2FtZXJvbkBodWF3ZWkuY29tPgoKSWYg dGhpcyBkb2VzIGdldCBwaWNrZWQgdXAsIGNhbiB3aG8gZXZlciBkb2VzIGl0IHBsZWFzZSBwcm92 aWRlCmFuIGltbXV0YWJsZSBicmFuY2guIFdpdGggc29tZSBtYW55IGRyaXZlcnMgY2xlYW5lZCB1 cCwgaXQncyB2ZXJ5Cmxpa2VseSB0byBjYXVzZSBzb21lIG1lcmdlIGZ1biBzb21ld2hlcmUgb3Ro ZXJ3aXNlLgoKVGhhbmtzLAoKSm9uYXRoYW4KCj4gLS0tCj4gIGRyaXZlcnMvaWlvL2FkYy9hZDcx MjQuYyAgICAgICAgICAgfCAxNSArLS0tLS0tLS0tCj4gIGRyaXZlcnMvaWlvL2FkYy9hZDc3Njgt MS5jICAgICAgICAgfCAxNyArLS0tLS0tLS0tLS0KPiAgZHJpdmVycy9paW8vYWRjL2FkOTQ2Ny5j ICAgICAgICAgICB8IDE3ICstLS0tLS0tLS0tLQo+ICBkcml2ZXJzL2lpby9hZGMvaW5nZW5pYy1h ZGMuYyAgICAgIHwgMTUgKystLS0tLS0tLQo+ICBkcml2ZXJzL2lpby9hZGMvbHBjMTh4eF9hZGMu YyAgICAgIHwgMTggKy0tLS0tLS0tLS0tCj4gIGRyaXZlcnMvaWlvL2FkYy9yb2NrY2hpcF9zYXJh ZGMuYyAgfCA0NCArKy0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0KPiAgZHJpdmVycy9paW8v YWRjL3RpLWFkczEzMWUwOC5jICAgICB8IDE5ICstLS0tLS0tLS0tLS0KPiAgZHJpdmVycy9paW8v YWRjL3hpbGlueC1hbXMuYyAgICAgICB8IDE1ICstLS0tLS0tLS0KPiAgZHJpdmVycy9paW8vYWRj L3hpbGlueC14YWRjLWNvcmUuYyB8IDE4ICstLS0tLS0tLS0tLQo+ICBkcml2ZXJzL2lpby9mcmVx dWVuY3kvYWRmNDM3MS5jICAgIHwgMTcgKy0tLS0tLS0tLS0tCj4gIGRyaXZlcnMvaWlvL2ZyZXF1 ZW5jeS9hZG12MTAxMy5jICAgfCAxNSArLS0tLS0tLS0tCj4gIGRyaXZlcnMvaWlvL2ZyZXF1ZW5j eS9hZHJmNjc4MC5jICAgfCAxNiArLS0tLS0tLS0tLQo+ICBkcml2ZXJzL2lpby9pbXUvYWRpczE2 NDc1LmMgICAgICAgIHwgMTUgKy0tLS0tLS0tLQo+ICAxMyBmaWxlcyBjaGFuZ2VkLCAxNSBpbnNl cnRpb25zKCspLCAyMjYgZGVsZXRpb25zKC0pCj4gCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvaWlv L2FkYy9hZDcxMjQuYyBiL2RyaXZlcnMvaWlvL2FkYy9hZDcxMjQuYwo+IGluZGV4IGI0MDBiYmUy OTFhYS4uZmNmYTRlMGI0MWZiIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvaWlvL2FkYy9hZDcxMjQu Ywo+ICsrKyBiL2RyaXZlcnMvaWlvL2FkYy9hZDcxMjQuYwo+IEBAIC04NjIsMTEgKzg2Miw2IEBA IHN0YXRpYyB2b2lkIGFkNzEyNF9yZWdfZGlzYWJsZSh2b2lkICpyKQo+ICAJcmVndWxhdG9yX2Rp c2FibGUocik7Cj4gIH0KPiAgCj4gLXN0YXRpYyB2b2lkIGFkNzEyNF9jbGtfZGlzYWJsZSh2b2lk ICpjKQo+IC17Cj4gLQljbGtfZGlzYWJsZV91bnByZXBhcmUoYyk7Cj4gLX0KPiAtCj4gIHN0YXRp YyBpbnQgYWQ3MTI0X3Byb2JlKHN0cnVjdCBzcGlfZGV2aWNlICpzcGkpCj4gIHsKPiAgCWNvbnN0 IHN0cnVjdCBhZDcxMjRfY2hpcF9pbmZvICppbmZvOwo+IEBAIC05MTcsMTggKzkxMiwxMCBAQCBz dGF0aWMgaW50IGFkNzEyNF9wcm9iZShzdHJ1Y3Qgc3BpX2RldmljZSAqc3BpKQo+ICAJCQlyZXR1 cm4gcmV0Owo+ICAJfQo+ICAKPiAtCXN0LT5tY2xrID0gZGV2bV9jbGtfZ2V0KCZzcGktPmRldiwg Im1jbGsiKTsKPiArCXN0LT5tY2xrID0gZGV2bV9jbGtfZ2V0X2VuYWJsZWQoJnNwaS0+ZGV2LCAi bWNsayIpOwo+ICAJaWYgKElTX0VSUihzdC0+bWNsaykpCj4gIAkJcmV0dXJuIFBUUl9FUlIoc3Qt Pm1jbGspOwo+ICAKPiAtCXJldCA9IGNsa19wcmVwYXJlX2VuYWJsZShzdC0+bWNsayk7Cj4gLQlp ZiAocmV0IDwgMCkKPiAtCQlyZXR1cm4gcmV0Owo+IC0KPiAtCXJldCA9IGRldm1fYWRkX2FjdGlv bl9vcl9yZXNldCgmc3BpLT5kZXYsIGFkNzEyNF9jbGtfZGlzYWJsZSwgc3QtPm1jbGspOwo+IC0J aWYgKHJldCkKPiAtCQlyZXR1cm4gcmV0Owo+IC0KPiAgCXJldCA9IGFkNzEyNF9zb2Z0X3Jlc2V0 KHN0KTsKPiAgCWlmIChyZXQgPCAwKQo+ICAJCXJldHVybiByZXQ7Cj4gZGlmZiAtLWdpdCBhL2Ry aXZlcnMvaWlvL2FkYy9hZDc3NjgtMS5jIGIvZHJpdmVycy9paW8vYWRjL2FkNzc2OC0xLmMKPiBp bmRleCBhYTQyYmE3NTlmYTEuLjhhZTM0ZWQ4ZmFiZCAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2lp by9hZGMvYWQ3NzY4LTEuYwo+ICsrKyBiL2RyaXZlcnMvaWlvL2FkYy9hZDc3NjgtMS5jCj4gQEAg LTUzOSwxMyArNTM5LDYgQEAgc3RhdGljIHZvaWQgYWQ3NzY4X3JlZ3VsYXRvcl9kaXNhYmxlKHZv aWQgKmRhdGEpCj4gIAlyZWd1bGF0b3JfZGlzYWJsZShzdC0+dnJlZik7Cj4gIH0KPiAgCj4gLXN0 YXRpYyB2b2lkIGFkNzc2OF9jbGtfZGlzYWJsZSh2b2lkICpkYXRhKQo+IC17Cj4gLQlzdHJ1Y3Qg YWQ3NzY4X3N0YXRlICpzdCA9IGRhdGE7Cj4gLQo+IC0JY2xrX2Rpc2FibGVfdW5wcmVwYXJlKHN0 LT5tY2xrKTsKPiAtfQo+IC0KPiAgc3RhdGljIGludCBhZDc3Njhfc2V0X2NoYW5uZWxfbGFiZWwo c3RydWN0IGlpb19kZXYgKmluZGlvX2RldiwKPiAgCQkJCQkJaW50IG51bV9jaGFubmVscykKPiAg ewo+IEBAIC02MDAsMTggKzU5MywxMCBAQCBzdGF0aWMgaW50IGFkNzc2OF9wcm9iZShzdHJ1Y3Qg c3BpX2RldmljZSAqc3BpKQo+ICAJaWYgKHJldCkKPiAgCQlyZXR1cm4gcmV0Owo+ICAKPiAtCXN0 LT5tY2xrID0gZGV2bV9jbGtfZ2V0KCZzcGktPmRldiwgIm1jbGsiKTsKPiArCXN0LT5tY2xrID0g ZGV2bV9jbGtfZ2V0X2VuYWJsZWQoJnNwaS0+ZGV2LCAibWNsayIpOwo+ICAJaWYgKElTX0VSUihz dC0+bWNsaykpCj4gIAkJcmV0dXJuIFBUUl9FUlIoc3QtPm1jbGspOwo+ICAKPiAtCXJldCA9IGNs a19wcmVwYXJlX2VuYWJsZShzdC0+bWNsayk7Cj4gLQlpZiAocmV0IDwgMCkKPiAtCQlyZXR1cm4g cmV0Owo+IC0KPiAtCXJldCA9IGRldm1fYWRkX2FjdGlvbl9vcl9yZXNldCgmc3BpLT5kZXYsIGFk Nzc2OF9jbGtfZGlzYWJsZSwgc3QpOwo+IC0JaWYgKHJldCkKPiAtCQlyZXR1cm4gcmV0Owo+IC0K PiAgCXN0LT5tY2xrX2ZyZXEgPSBjbGtfZ2V0X3JhdGUoc3QtPm1jbGspOwo+ICAKPiAgCW11dGV4 X2luaXQoJnN0LT5sb2NrKTsKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9paW8vYWRjL2FkOTQ2Ny5j IGIvZHJpdmVycy9paW8vYWRjL2FkOTQ2Ny5jCj4gaW5kZXggZGJmYzg1MTdjYjhhLi5hMDdkZjBm ZDMzMjkgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9paW8vYWRjL2FkOTQ2Ny5jCj4gKysrIGIvZHJp dmVycy9paW8vYWRjL2FkOTQ2Ny5jCj4gQEAgLTM3OCwxMyArMzc4LDYgQEAgc3RhdGljIGludCBh ZDk0NjdfcHJlZW5hYmxlX3NldHVwKHN0cnVjdCBhZGlfYXhpX2FkY19jb252ICpjb252KQo+ICAJ cmV0dXJuIGFkOTQ2N19vdXRwdXRtb2RlX3NldChzdC0+c3BpLCBzdC0+b3V0cHV0X21vZGUpOwo+ ICB9Cj4gIAo+IC1zdGF0aWMgdm9pZCBhZDk0NjdfY2xrX2Rpc2FibGUodm9pZCAqZGF0YSkKPiAt ewo+IC0Jc3RydWN0IGFkOTQ2N19zdGF0ZSAqc3QgPSBkYXRhOwo+IC0KPiAtCWNsa19kaXNhYmxl X3VucHJlcGFyZShzdC0+Y2xrKTsKPiAtfQo+IC0KPiAgc3RhdGljIGludCBhZDk0NjdfcHJvYmUo c3RydWN0IHNwaV9kZXZpY2UgKnNwaSkKPiAgewo+ICAJY29uc3Qgc3RydWN0IGFkOTQ2N19jaGlw X2luZm8gKmluZm87Cj4gQEAgLTQwNCwxOCArMzk3LDEwIEBAIHN0YXRpYyBpbnQgYWQ5NDY3X3By b2JlKHN0cnVjdCBzcGlfZGV2aWNlICpzcGkpCj4gIAlzdCA9IGFkaV9heGlfYWRjX2NvbnZfcHJp dihjb252KTsKPiAgCXN0LT5zcGkgPSBzcGk7Cj4gIAo+IC0Jc3QtPmNsayA9IGRldm1fY2xrX2dl dCgmc3BpLT5kZXYsICJhZGMtY2xrIik7Cj4gKwlzdC0+Y2xrID0gZGV2bV9jbGtfZ2V0X2VuYWJs ZWQoJnNwaS0+ZGV2LCAiYWRjLWNsayIpOwo+ICAJaWYgKElTX0VSUihzdC0+Y2xrKSkKPiAgCQly ZXR1cm4gUFRSX0VSUihzdC0+Y2xrKTsKPiAgCj4gLQlyZXQgPSBjbGtfcHJlcGFyZV9lbmFibGUo c3QtPmNsayk7Cj4gLQlpZiAocmV0IDwgMCkKPiAtCQlyZXR1cm4gcmV0Owo+IC0KPiAtCXJldCA9 IGRldm1fYWRkX2FjdGlvbl9vcl9yZXNldCgmc3BpLT5kZXYsIGFkOTQ2N19jbGtfZGlzYWJsZSwg c3QpOwo+IC0JaWYgKHJldCkKPiAtCQlyZXR1cm4gcmV0Owo+IC0KPiAgCXN0LT5wd3Jkb3duX2dw aW8gPSBkZXZtX2dwaW9kX2dldF9vcHRpb25hbCgmc3BpLT5kZXYsICJwb3dlcmRvd24iLAo+ICAJ CQkJCQkgICBHUElPRF9PVVRfTE9XKTsKPiAgCWlmIChJU19FUlIoc3QtPnB3cmRvd25fZ3Bpbykp Cj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvaWlvL2FkYy9pbmdlbmljLWFkYy5jIGIvZHJpdmVycy9p aW8vYWRjL2luZ2VuaWMtYWRjLmMKPiBpbmRleCAyYjM5MTJjNmNhNmIuLmI2NDMzYmNkNTNmNSAx MDA2NDQKPiAtLS0gYS9kcml2ZXJzL2lpby9hZGMvaW5nZW5pYy1hZGMuYwo+ICsrKyBiL2RyaXZl cnMvaWlvL2FkYy9pbmdlbmljLWFkYy5jCj4gQEAgLTczMiwxMSArNzMyLDYgQEAgc3RhdGljIGlu dCBpbmdlbmljX2FkY19vZl94bGF0ZShzdHJ1Y3QgaWlvX2RldiAqaWlvX2RldiwKPiAgCXJldHVy biAtRUlOVkFMOwo+ICB9Cj4gIAo+IC1zdGF0aWMgdm9pZCBpbmdlbmljX2FkY19jbGtfY2xlYW51 cCh2b2lkICpkYXRhKQo+IC17Cj4gLQljbGtfdW5wcmVwYXJlKGRhdGEpOwo+IC19Cj4gLQo+ICBz dGF0aWMgY29uc3Qgc3RydWN0IGlpb19pbmZvIGluZ2VuaWNfYWRjX2luZm8gPSB7Cj4gIAkud3Jp dGVfcmF3ID0gaW5nZW5pY19hZGNfd3JpdGVfcmF3LAo+ICAJLnJlYWRfcmF3ID0gaW5nZW5pY19h ZGNfcmVhZF9yYXcsCj4gQEAgLTg1NiwxMyArODUxLDEzIEBAIHN0YXRpYyBpbnQgaW5nZW5pY19h ZGNfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKPiAgCWlmIChJU19FUlIoYWRj LT5iYXNlKSkKPiAgCQlyZXR1cm4gUFRSX0VSUihhZGMtPmJhc2UpOwo+ICAKPiAtCWFkYy0+Y2xr ID0gZGV2bV9jbGtfZ2V0KGRldiwgImFkYyIpOwo+ICsJYWRjLT5jbGsgPSBkZXZtX2Nsa19nZXRf cHJlcGFyZWQoZGV2LCAiYWRjIik7Cj4gIAlpZiAoSVNfRVJSKGFkYy0+Y2xrKSkgewo+ICAJCWRl dl9lcnIoZGV2LCAiVW5hYmxlIHRvIGdldCBjbG9ja1xuIik7Cj4gIAkJcmV0dXJuIFBUUl9FUlIo YWRjLT5jbGspOwo+ICAJfQo+ICAKPiAtCXJldCA9IGNsa19wcmVwYXJlX2VuYWJsZShhZGMtPmNs ayk7Cj4gKwlyZXQgPSBjbGtfZW5hYmxlKGFkYy0+Y2xrKTsKPiAgCWlmIChyZXQpIHsKPiAgCQlk ZXZfZXJyKGRldiwgIkZhaWxlZCB0byBlbmFibGUgY2xvY2tcbiIpOwo+ICAJCXJldHVybiByZXQ7 Cj4gQEAgLTg5MSwxMiArODg2LDYgQEAgc3RhdGljIGludCBpbmdlbmljX2FkY19wcm9iZShzdHJ1 Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQo+ICAJdXNsZWVwX3JhbmdlKDIwMDAsIDMwMDApOyAv KiBNdXN0IHdhaXQgYXQgbGVhc3QgMm1zLiAqLwo+ICAJY2xrX2Rpc2FibGUoYWRjLT5jbGspOwo+ ICAKPiAtCXJldCA9IGRldm1fYWRkX2FjdGlvbl9vcl9yZXNldChkZXYsIGluZ2VuaWNfYWRjX2Ns a19jbGVhbnVwLCBhZGMtPmNsayk7Cj4gLQlpZiAocmV0KSB7Cj4gLQkJZGV2X2VycihkZXYsICJV bmFibGUgdG8gYWRkIGFjdGlvblxuIik7Cj4gLQkJcmV0dXJuIHJldDsKPiAtCX0KPiAtCj4gIAlp aW9fZGV2LT5uYW1lID0gImp6LWFkYyI7Cj4gIAlpaW9fZGV2LT5tb2RlcyA9IElORElPX0RJUkVD VF9NT0RFIHwgSU5ESU9fQlVGRkVSX1NPRlRXQVJFOwo+ICAJaWlvX2Rldi0+c2V0dXBfb3BzID0g JmluZ2VuaWNfYnVmZmVyX3NldHVwX29wczsKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9paW8vYWRj L2xwYzE4eHhfYWRjLmMgYi9kcml2ZXJzL2lpby9hZGMvbHBjMTh4eF9hZGMuYwo+IGluZGV4IGFl OWM5Mzg0ZjIzZS4uOGJiYzE4YWFhNDc0IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvaWlvL2FkYy9s cGMxOHh4X2FkYy5jCj4gKysrIGIvZHJpdmVycy9paW8vYWRjL2xwYzE4eHhfYWRjLmMKPiBAQCAt MTIyLDExICsxMjIsNiBAQCBzdGF0aWMgdm9pZCBscGMxOHh4X2NsZWFyX2NyX3JlZyh2b2lkICpk YXRhKQo+ICAJd3JpdGVsKDAsIGFkYy0+YmFzZSArIExQQzE4WFhfQURDX0NSKTsKPiAgfQo+ICAK PiAtc3RhdGljIHZvaWQgbHBjMTh4eF9jbGtfZGlzYWJsZSh2b2lkICpjbGspCj4gLXsKPiAtCWNs a19kaXNhYmxlX3VucHJlcGFyZShjbGspOwo+IC19Cj4gLQo+ICBzdGF0aWMgdm9pZCBscGMxOHh4 X3JlZ3VsYXRvcl9kaXNhYmxlKHZvaWQgKnZyZWYpCj4gIHsKPiAgCXJlZ3VsYXRvcl9kaXNhYmxl KHZyZWYpOwo+IEBAIC0xNTIsNyArMTQ3LDcgQEAgc3RhdGljIGludCBscGMxOHh4X2FkY19wcm9i ZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQo+ICAJaWYgKElTX0VSUihhZGMtPmJhc2Up KQo+ICAJCXJldHVybiBQVFJfRVJSKGFkYy0+YmFzZSk7Cj4gIAo+IC0JYWRjLT5jbGsgPSBkZXZt X2Nsa19nZXQoJnBkZXYtPmRldiwgTlVMTCk7Cj4gKwlhZGMtPmNsayA9IGRldm1fY2xrX2dldF9l bmFibGVkKCZwZGV2LT5kZXYsIE5VTEwpOwo+ICAJaWYgKElTX0VSUihhZGMtPmNsaykpCj4gIAkJ cmV0dXJuIGRldl9lcnJfcHJvYmUoJnBkZXYtPmRldiwgUFRSX0VSUihhZGMtPmNsayksCj4gIAkJ CQkgICAgICJlcnJvciBnZXR0aW5nIGNsb2NrXG4iKTsKPiBAQCAtMTc4LDE3ICsxNzMsNiBAQCBz dGF0aWMgaW50IGxwYzE4eHhfYWRjX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYp Cj4gIAlpZiAocmV0KQo+ICAJCXJldHVybiByZXQ7Cj4gIAo+IC0JcmV0ID0gY2xrX3ByZXBhcmVf ZW5hYmxlKGFkYy0+Y2xrKTsKPiAtCWlmIChyZXQpIHsKPiAtCQlkZXZfZXJyKCZwZGV2LT5kZXYs ICJ1bmFibGUgdG8gZW5hYmxlIGNsb2NrXG4iKTsKPiAtCQlyZXR1cm4gcmV0Owo+IC0JfQo+IC0K PiAtCXJldCA9IGRldm1fYWRkX2FjdGlvbl9vcl9yZXNldCgmcGRldi0+ZGV2LCBscGMxOHh4X2Ns a19kaXNhYmxlLAo+IC0JCQkJICAgICAgIGFkYy0+Y2xrKTsKPiAtCWlmIChyZXQpCj4gLQkJcmV0 dXJuIHJldDsKPiAtCj4gIAlyYXRlID0gY2xrX2dldF9yYXRlKGFkYy0+Y2xrKTsKPiAgCWNsa2Rp diA9IERJVl9ST1VORF9VUChyYXRlLCBMUEMxOFhYX0FEQ19DTEtfVEFSR0VUKTsKPiAgCj4gZGlm ZiAtLWdpdCBhL2RyaXZlcnMvaWlvL2FkYy9yb2NrY2hpcF9zYXJhZGMuYyBiL2RyaXZlcnMvaWlv L2FkYy9yb2NrY2hpcF9zYXJhZGMuYwo+IGluZGV4IDE0YjhkZjRjYTljOC4uMGEwNTNlOGIyNDgz IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvaWlvL2FkYy9yb2NrY2hpcF9zYXJhZGMuYwo+ICsrKyBi L2RyaXZlcnMvaWlvL2FkYy9yb2NrY2hpcF9zYXJhZGMuYwo+IEBAIC0yMzMsMjAgKzIzMyw2IEBA IHN0YXRpYyB2b2lkIHJvY2tjaGlwX3NhcmFkY19yZXNldF9jb250cm9sbGVyKHN0cnVjdCByZXNl dF9jb250cm9sICpyZXNldCkKPiAgCXJlc2V0X2NvbnRyb2xfZGVhc3NlcnQocmVzZXQpOwo+ICB9 Cj4gIAo+IC1zdGF0aWMgdm9pZCByb2NrY2hpcF9zYXJhZGNfY2xrX2Rpc2FibGUodm9pZCAqZGF0 YSkKPiAtewo+IC0Jc3RydWN0IHJvY2tjaGlwX3NhcmFkYyAqaW5mbyA9IGRhdGE7Cj4gLQo+IC0J Y2xrX2Rpc2FibGVfdW5wcmVwYXJlKGluZm8tPmNsayk7Cj4gLX0KPiAtCj4gLXN0YXRpYyB2b2lk IHJvY2tjaGlwX3NhcmFkY19wY2xrX2Rpc2FibGUodm9pZCAqZGF0YSkKPiAtewo+IC0Jc3RydWN0 IHJvY2tjaGlwX3NhcmFkYyAqaW5mbyA9IGRhdGE7Cj4gLQo+IC0JY2xrX2Rpc2FibGVfdW5wcmVw YXJlKGluZm8tPnBjbGspOwo+IC19Cj4gLQo+ICBzdGF0aWMgdm9pZCByb2NrY2hpcF9zYXJhZGNf cmVndWxhdG9yX2Rpc2FibGUodm9pZCAqZGF0YSkKPiAgewo+ICAJc3RydWN0IHJvY2tjaGlwX3Nh cmFkYyAqaW5mbyA9IGRhdGE7Cj4gQEAgLTM4MCwxMiArMzY2LDEyIEBAIHN0YXRpYyBpbnQgcm9j a2NoaXBfc2FyYWRjX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCj4gIAkJcmV0 dXJuIHJldDsKPiAgCX0KPiAgCj4gLQlpbmZvLT5wY2xrID0gZGV2bV9jbGtfZ2V0KCZwZGV2LT5k ZXYsICJhcGJfcGNsayIpOwo+ICsJaW5mby0+cGNsayA9IGRldm1fY2xrX2dldF9lbmFibGVkKCZw ZGV2LT5kZXYsICJhcGJfcGNsayIpOwo+ICAJaWYgKElTX0VSUihpbmZvLT5wY2xrKSkKPiAgCQly ZXR1cm4gZGV2X2Vycl9wcm9iZSgmcGRldi0+ZGV2LCBQVFJfRVJSKGluZm8tPnBjbGspLAo+ICAJ CQkJICAgICAiZmFpbGVkIHRvIGdldCBwY2xrXG4iKTsKPiAgCj4gLQlpbmZvLT5jbGsgPSBkZXZt X2Nsa19nZXQoJnBkZXYtPmRldiwgInNhcmFkYyIpOwo+ICsJaW5mby0+Y2xrID0gZGV2bV9jbGtf Z2V0X2VuYWJsZWQoJnBkZXYtPmRldiwgInNhcmFkYyIpOwo+ICAJaWYgKElTX0VSUihpbmZvLT5j bGspKQo+ICAJCXJldHVybiBkZXZfZXJyX3Byb2JlKCZwZGV2LT5kZXYsIFBUUl9FUlIoaW5mby0+ Y2xrKSwKPiAgCQkJCSAgICAgImZhaWxlZCB0byBnZXQgYWRjIGNsb2NrXG4iKTsKPiBAQCAtNDI3 LDMyICs0MTMsNiBAQCBzdGF0aWMgaW50IHJvY2tjaGlwX3NhcmFkY19wcm9iZShzdHJ1Y3QgcGxh dGZvcm1fZGV2aWNlICpwZGV2KQo+ICAKPiAgCWluZm8tPnV2X3ZyZWYgPSByZXQ7Cj4gIAo+IC0J cmV0ID0gY2xrX3ByZXBhcmVfZW5hYmxlKGluZm8tPnBjbGspOwo+IC0JaWYgKHJldCA8IDApIHsK PiAtCQlkZXZfZXJyKCZwZGV2LT5kZXYsICJmYWlsZWQgdG8gZW5hYmxlIHBjbGtcbiIpOwo+IC0J CXJldHVybiByZXQ7Cj4gLQl9Cj4gLQlyZXQgPSBkZXZtX2FkZF9hY3Rpb25fb3JfcmVzZXQoJnBk ZXYtPmRldiwKPiAtCQkJCSAgICAgICByb2NrY2hpcF9zYXJhZGNfcGNsa19kaXNhYmxlLCBpbmZv KTsKPiAtCWlmIChyZXQpIHsKPiAtCQlkZXZfZXJyKCZwZGV2LT5kZXYsICJmYWlsZWQgdG8gcmVn aXN0ZXIgZGV2bSBhY3Rpb24sICVkXG4iLAo+IC0JCQlyZXQpOwo+IC0JCXJldHVybiByZXQ7Cj4g LQl9Cj4gLQo+IC0JcmV0ID0gY2xrX3ByZXBhcmVfZW5hYmxlKGluZm8tPmNsayk7Cj4gLQlpZiAo cmV0IDwgMCkgewo+IC0JCWRldl9lcnIoJnBkZXYtPmRldiwgImZhaWxlZCB0byBlbmFibGUgY29u dmVydGVyIGNsb2NrXG4iKTsKPiAtCQlyZXR1cm4gcmV0Owo+IC0JfQo+IC0JcmV0ID0gZGV2bV9h ZGRfYWN0aW9uX29yX3Jlc2V0KCZwZGV2LT5kZXYsCj4gLQkJCQkgICAgICAgcm9ja2NoaXBfc2Fy YWRjX2Nsa19kaXNhYmxlLCBpbmZvKTsKPiAtCWlmIChyZXQpIHsKPiAtCQlkZXZfZXJyKCZwZGV2 LT5kZXYsICJmYWlsZWQgdG8gcmVnaXN0ZXIgZGV2bSBhY3Rpb24sICVkXG4iLAo+IC0JCQlyZXQp Owo+IC0JCXJldHVybiByZXQ7Cj4gLQl9Cj4gLQo+ICAJcGxhdGZvcm1fc2V0X2RydmRhdGEocGRl diwgaW5kaW9fZGV2KTsKPiAgCj4gIAlpbmRpb19kZXYtPm5hbWUgPSBkZXZfbmFtZSgmcGRldi0+ ZGV2KTsKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9paW8vYWRjL3RpLWFkczEzMWUwOC5jIGIvZHJp dmVycy9paW8vYWRjL3RpLWFkczEzMWUwOC5jCj4gaW5kZXggMGMyMDI1YTIyNTc1Li43ZDdhOGYw ZDNhYjUgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9paW8vYWRjL3RpLWFkczEzMWUwOC5jCj4gKysr IGIvZHJpdmVycy9paW8vYWRjL3RpLWFkczEzMWUwOC5jCj4gQEAgLTc5MywxMyArNzkzLDYgQEAg c3RhdGljIHZvaWQgYWRzMTMxZTA4X3JlZ3VsYXRvcl9kaXNhYmxlKHZvaWQgKmRhdGEpCj4gIAly ZWd1bGF0b3JfZGlzYWJsZShzdC0+dnJlZl9yZWcpOwo+ICB9Cj4gIAo+IC1zdGF0aWMgdm9pZCBh ZHMxMzFlMDhfY2xrX2Rpc2FibGUodm9pZCAqZGF0YSkKPiAtewo+IC0Jc3RydWN0IGFkczEzMWUw OF9zdGF0ZSAqc3QgPSBkYXRhOwo+IC0KPiAtCWNsa19kaXNhYmxlX3VucHJlcGFyZShzdC0+YWRj X2Nsayk7Cj4gLX0KPiAtCj4gIHN0YXRpYyBpbnQgYWRzMTMxZTA4X3Byb2JlKHN0cnVjdCBzcGlf ZGV2aWNlICpzcGkpCj4gIHsKPiAgCWNvbnN0IHN0cnVjdCBhZHMxMzFlMDhfaW5mbyAqaW5mbzsK PiBAQCAtODkyLDIxICs4ODUsMTEgQEAgc3RhdGljIGludCBhZHMxMzFlMDhfcHJvYmUoc3RydWN0 IHNwaV9kZXZpY2UgKnNwaSkKPiAgCQlzdC0+dnJlZl9yZWcgPSBOVUxMOwo+ICAJfQo+ICAKPiAt CXN0LT5hZGNfY2xrID0gZGV2bV9jbGtfZ2V0KCZzcGktPmRldiwgImFkYy1jbGsiKTsKPiArCXN0 LT5hZGNfY2xrID0gZGV2bV9jbGtfZ2V0X2VuYWJsZWQoJnNwaS0+ZGV2LCAiYWRjLWNsayIpOwo+ ICAJaWYgKElTX0VSUihzdC0+YWRjX2NsaykpCj4gIAkJcmV0dXJuIGRldl9lcnJfcHJvYmUoJnNw aS0+ZGV2LCBQVFJfRVJSKHN0LT5hZGNfY2xrKSwKPiAgCQkJCSAgICAgImZhaWxlZCB0byBnZXQg dGhlIEFEQyBjbG9ja1xuIik7Cj4gIAo+IC0JcmV0ID0gY2xrX3ByZXBhcmVfZW5hYmxlKHN0LT5h ZGNfY2xrKTsKPiAtCWlmIChyZXQpIHsKPiAtCQlkZXZfZXJyKCZzcGktPmRldiwgImZhaWxlZCB0 byBwcmVwYXJlL2VuYWJsZSB0aGUgQURDIGNsb2NrXG4iKTsKPiAtCQlyZXR1cm4gcmV0Owo+IC0J fQo+IC0KPiAtCXJldCA9IGRldm1fYWRkX2FjdGlvbl9vcl9yZXNldCgmc3BpLT5kZXYsIGFkczEz MWUwOF9jbGtfZGlzYWJsZSwgc3QpOwo+IC0JaWYgKHJldCkKPiAtCQlyZXR1cm4gcmV0Owo+IC0K PiAgCWFkY19jbGtfaHogPSBjbGtfZ2V0X3JhdGUoc3QtPmFkY19jbGspOwo+ICAJaWYgKCFhZGNf Y2xrX2h6KSB7Cj4gIAkJZGV2X2Vycigmc3BpLT5kZXYsICJmYWlsZWQgdG8gZ2V0IHRoZSBBREMg Y2xvY2sgcmF0ZVxuIik7Cj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvaWlvL2FkYy94aWxpbngtYW1z LmMgYi9kcml2ZXJzL2lpby9hZGMveGlsaW54LWFtcy5jCj4gaW5kZXggODM0M2M1Zjc0MTIxLi40 ZTRmMGM4MGRiNTQgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9paW8vYWRjL3hpbGlueC1hbXMuYwo+ ICsrKyBiL2RyaXZlcnMvaWlvL2FkYy94aWxpbngtYW1zLmMKPiBAQCAtMTM0MywxMSArMTM0Myw2 IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3Qgb2ZfZGV2aWNlX2lkIGFtc19vZl9tYXRjaF90YWJsZVtd ID0gewo+ICB9Owo+ICBNT0RVTEVfREVWSUNFX1RBQkxFKG9mLCBhbXNfb2ZfbWF0Y2hfdGFibGUp Owo+ICAKPiAtc3RhdGljIHZvaWQgYW1zX2Nsa19kaXNhYmxlX3VucHJlcGFyZSh2b2lkICpkYXRh KQo+IC17Cj4gLQljbGtfZGlzYWJsZV91bnByZXBhcmUoZGF0YSk7Cj4gLX0KPiAtCj4gIHN0YXRp YyB2b2lkIGFtc19jYW5jZWxfZGVsYXllZF93b3JrKHZvaWQgKmRhdGEpCj4gIHsKPiAgCWNhbmNl bF9kZWxheWVkX3dvcmsoZGF0YSk7Cj4gQEAgLTEzNzcsMTggKzEzNzIsMTAgQEAgc3RhdGljIGlu dCBhbXNfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKPiAgCWlmIChJU19FUlIo YW1zLT5iYXNlKSkKPiAgCQlyZXR1cm4gUFRSX0VSUihhbXMtPmJhc2UpOwo+ICAKPiAtCWFtcy0+ Y2xrID0gZGV2bV9jbGtfZ2V0KCZwZGV2LT5kZXYsIE5VTEwpOwo+ICsJYW1zLT5jbGsgPSBkZXZt X2Nsa19nZXRfZW5hYmxlZCgmcGRldi0+ZGV2LCBOVUxMKTsKPiAgCWlmIChJU19FUlIoYW1zLT5j bGspKQo+ICAJCXJldHVybiBQVFJfRVJSKGFtcy0+Y2xrKTsKPiAgCj4gLQlyZXQgPSBjbGtfcHJl cGFyZV9lbmFibGUoYW1zLT5jbGspOwo+IC0JaWYgKHJldCA8IDApCj4gLQkJcmV0dXJuIHJldDsK PiAtCj4gLQlyZXQgPSBkZXZtX2FkZF9hY3Rpb25fb3JfcmVzZXQoJnBkZXYtPmRldiwgYW1zX2Ns a19kaXNhYmxlX3VucHJlcGFyZSwgYW1zLT5jbGspOwo+IC0JaWYgKHJldCA8IDApCj4gLQkJcmV0 dXJuIHJldDsKPiAtCj4gIAlJTklUX0RFTEFZRURfV09SSygmYW1zLT5hbXNfdW5tYXNrX3dvcmss IGFtc191bm1hc2tfd29ya2VyKTsKPiAgCXJldCA9IGRldm1fYWRkX2FjdGlvbl9vcl9yZXNldCgm cGRldi0+ZGV2LCBhbXNfY2FuY2VsX2RlbGF5ZWRfd29yaywKPiAgCQkJCSAgICAgICAmYW1zLT5h bXNfdW5tYXNrX3dvcmspOwo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2lpby9hZGMveGlsaW54LXhh ZGMtY29yZS5jIGIvZHJpdmVycy9paW8vYWRjL3hpbGlueC14YWRjLWNvcmUuYwo+IGluZGV4IDgy M2M4ZTVmOTgwOS4uYTUyMGUwN2U0ZTA4IDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvaWlvL2FkYy94 aWxpbngteGFkYy1jb3JlLmMKPiArKysgYi9kcml2ZXJzL2lpby9hZGMveGlsaW54LXhhZGMtY29y ZS5jCj4gQEAgLTEyOTksMTMgKzEyOTksNiBAQCBzdGF0aWMgY29uc3QgY2hhciAqIGNvbnN0IHhh ZGNfdHlwZV9uYW1lc1tdID0gewo+ICAJW1hBRENfVFlQRV9VU10gPSAieGlsaW54LXN5c3RlbS1t b25pdG9yIiwKPiAgfTsKPiAgCj4gLXN0YXRpYyB2b2lkIHhhZGNfY2xrX2Rpc2FibGVfdW5wcmVw YXJlKHZvaWQgKmRhdGEpCj4gLXsKPiAtCXN0cnVjdCBjbGsgKmNsayA9IGRhdGE7Cj4gLQo+IC0J Y2xrX2Rpc2FibGVfdW5wcmVwYXJlKGNsayk7Cj4gLX0KPiAtCj4gIHN0YXRpYyB2b2lkIHhhZGNf Y2FuY2VsX2RlbGF5ZWRfd29yayh2b2lkICpkYXRhKQo+ICB7Cj4gIAlzdHJ1Y3QgZGVsYXllZF93 b3JrICp3b3JrID0gZGF0YTsKPiBAQCAtMTM4MywxOSArMTM3NiwxMCBAQCBzdGF0aWMgaW50IHhh ZGNfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKPiAgCQl9Cj4gIAl9Cj4gIAo+ IC0JeGFkYy0+Y2xrID0gZGV2bV9jbGtfZ2V0KGRldiwgTlVMTCk7Cj4gKwl4YWRjLT5jbGsgPSBk ZXZtX2Nsa19nZXRfZW5hYmxlZChkZXYsIE5VTEwpOwo+ICAJaWYgKElTX0VSUih4YWRjLT5jbGsp KQo+ICAJCXJldHVybiBQVFJfRVJSKHhhZGMtPmNsayk7Cj4gIAo+IC0JcmV0ID0gY2xrX3ByZXBh cmVfZW5hYmxlKHhhZGMtPmNsayk7Cj4gLQlpZiAocmV0KQo+IC0JCXJldHVybiByZXQ7Cj4gLQo+ IC0JcmV0ID0gZGV2bV9hZGRfYWN0aW9uX29yX3Jlc2V0KGRldiwKPiAtCQkJCSAgICAgICB4YWRj X2Nsa19kaXNhYmxlX3VucHJlcGFyZSwgeGFkYy0+Y2xrKTsKPiAtCWlmIChyZXQpCj4gLQkJcmV0 dXJuIHJldDsKPiAtCj4gIAkvKgo+ICAJICogTWFrZSBzdXJlIG5vdCB0byBleGNlZWQgdGhlIG1h eGltdW0gc2FtcGxlcmF0ZSBzaW5jZSBvdGhlcndpc2UgdGhlCj4gIAkgKiByZXN1bHRpbmcgaW50 ZXJydXB0IHN0b3JtIHdpbGwgc29mdC1sb2NrIHRoZSBzeXN0ZW0uCj4gZGlmZiAtLWdpdCBhL2Ry aXZlcnMvaWlvL2ZyZXF1ZW5jeS9hZGY0MzcxLmMgYi9kcml2ZXJzL2lpby9mcmVxdWVuY3kvYWRm NDM3MS5jCj4gaW5kZXggZWNkNWUxODk5NWFkLi41NDA0MGI1ZmRlZDAgMTAwNjQ0Cj4gLS0tIGEv ZHJpdmVycy9paW8vZnJlcXVlbmN5L2FkZjQzNzEuYwo+ICsrKyBiL2RyaXZlcnMvaWlvL2ZyZXF1 ZW5jeS9hZGY0MzcxLmMKPiBAQCAtNTQwLDEzICs1NDAsNiBAQCBzdGF0aWMgaW50IGFkZjQzNzFf c2V0dXAoc3RydWN0IGFkZjQzNzFfc3RhdGUgKnN0KQo+ICAJcmV0dXJuIHJlZ21hcF9idWxrX3dy aXRlKHN0LT5yZWdtYXAsIEFERjQzNzFfUkVHKDB4MzApLCBzdC0+YnVmLCA1KTsKPiAgfQo+ICAK PiAtc3RhdGljIHZvaWQgYWRmNDM3MV9jbGtfZGlzYWJsZSh2b2lkICpkYXRhKQo+IC17Cj4gLQlz dHJ1Y3QgYWRmNDM3MV9zdGF0ZSAqc3QgPSBkYXRhOwo+IC0KPiAtCWNsa19kaXNhYmxlX3VucHJl cGFyZShzdC0+Y2xraW4pOwo+IC19Cj4gLQo+ICBzdGF0aWMgaW50IGFkZjQzNzFfcHJvYmUoc3Ry dWN0IHNwaV9kZXZpY2UgKnNwaSkKPiAgewo+ICAJY29uc3Qgc3RydWN0IHNwaV9kZXZpY2VfaWQg KmlkID0gc3BpX2dldF9kZXZpY2VfaWQoc3BpKTsKPiBAQCAtNTc5LDE4ICs1NzIsMTAgQEAgc3Rh dGljIGludCBhZGY0MzcxX3Byb2JlKHN0cnVjdCBzcGlfZGV2aWNlICpzcGkpCj4gIAlpbmRpb19k ZXYtPmNoYW5uZWxzID0gc3QtPmNoaXBfaW5mby0+Y2hhbm5lbHM7Cj4gIAlpbmRpb19kZXYtPm51 bV9jaGFubmVscyA9IHN0LT5jaGlwX2luZm8tPm51bV9jaGFubmVsczsKPiAgCj4gLQlzdC0+Y2xr aW4gPSBkZXZtX2Nsa19nZXQoJnNwaS0+ZGV2LCAiY2xraW4iKTsKPiArCXN0LT5jbGtpbiA9IGRl dm1fY2xrX2dldF9lbmFibGVkKCZzcGktPmRldiwgImNsa2luIik7Cj4gIAlpZiAoSVNfRVJSKHN0 LT5jbGtpbikpCj4gIAkJcmV0dXJuIFBUUl9FUlIoc3QtPmNsa2luKTsKPiAgCj4gLQlyZXQgPSBj bGtfcHJlcGFyZV9lbmFibGUoc3QtPmNsa2luKTsKPiAtCWlmIChyZXQgPCAwKQo+IC0JCXJldHVy biByZXQ7Cj4gLQo+IC0JcmV0ID0gZGV2bV9hZGRfYWN0aW9uX29yX3Jlc2V0KCZzcGktPmRldiwg YWRmNDM3MV9jbGtfZGlzYWJsZSwgc3QpOwo+IC0JaWYgKHJldCkKPiAtCQlyZXR1cm4gcmV0Owo+ IC0KPiAgCXN0LT5jbGtpbl9mcmVxID0gY2xrX2dldF9yYXRlKHN0LT5jbGtpbik7Cj4gIAo+ICAJ cmV0ID0gYWRmNDM3MV9zZXR1cChzdCk7Cj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvaWlvL2ZyZXF1 ZW5jeS9hZG12MTAxMy5jIGIvZHJpdmVycy9paW8vZnJlcXVlbmN5L2FkbXYxMDEzLmMKPiBpbmRl eCAzZjNjNDc4ZTliYWEuLmIzZTdlYjMyMmFkZSAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2lpby9m cmVxdWVuY3kvYWRtdjEwMTMuYwo+ICsrKyBiL2RyaXZlcnMvaWlvL2ZyZXF1ZW5jeS9hZG12MTAx My5jCj4gQEAgLTQ5MCwxMSArNDkwLDYgQEAgc3RhdGljIGludCBhZG12MTAxM19pbml0KHN0cnVj dCBhZG12MTAxM19zdGF0ZSAqc3QpCj4gIAkJCQkJICBzdC0+aW5wdXRfbW9kZSk7Cj4gIH0KPiAg Cj4gLXN0YXRpYyB2b2lkIGFkbXYxMDEzX2Nsa19kaXNhYmxlKHZvaWQgKmRhdGEpCj4gLXsKPiAt CWNsa19kaXNhYmxlX3VucHJlcGFyZShkYXRhKTsKPiAtfQo+IC0KPiAgc3RhdGljIHZvaWQgYWRt djEwMTNfcmVnX2Rpc2FibGUodm9pZCAqZGF0YSkKPiAgewo+ICAJcmVndWxhdG9yX2Rpc2FibGUo ZGF0YSk7Cj4gQEAgLTU1OSw3ICs1NTQsNyBAQCBzdGF0aWMgaW50IGFkbXYxMDEzX3Byb3BlcnRp ZXNfcGFyc2Uoc3RydWN0IGFkbXYxMDEzX3N0YXRlICpzdCkKPiAgCQlyZXR1cm4gZGV2X2Vycl9w cm9iZSgmc3BpLT5kZXYsIFBUUl9FUlIoc3QtPnJlZyksCj4gIAkJCQkgICAgICJmYWlsZWQgdG8g Z2V0IHRoZSBjb21tb24tbW9kZSB2b2x0YWdlXG4iKTsKPiAgCj4gLQlzdC0+Y2xraW4gPSBkZXZt X2Nsa19nZXQoJnNwaS0+ZGV2LCAibG9faW4iKTsKPiArCXN0LT5jbGtpbiA9IGRldm1fY2xrX2dl dF9lbmFibGVkKCZzcGktPmRldiwgImxvX2luIik7Cj4gIAlpZiAoSVNfRVJSKHN0LT5jbGtpbikp Cj4gIAkJcmV0dXJuIGRldl9lcnJfcHJvYmUoJnNwaS0+ZGV2LCBQVFJfRVJSKHN0LT5jbGtpbiks Cj4gIAkJCQkgICAgICJmYWlsZWQgdG8gZ2V0IHRoZSBMTyBpbnB1dCBjbG9ja1xuIik7Cj4gQEAg LTYwMSwxNCArNTk2LDYgQEAgc3RhdGljIGludCBhZG12MTAxM19wcm9iZShzdHJ1Y3Qgc3BpX2Rl dmljZSAqc3BpKQo+ICAJaWYgKHJldCkKPiAgCQlyZXR1cm4gcmV0Owo+ICAKPiAtCXJldCA9IGNs a19wcmVwYXJlX2VuYWJsZShzdC0+Y2xraW4pOwo+IC0JaWYgKHJldCkKPiAtCQlyZXR1cm4gcmV0 Owo+IC0KPiAtCXJldCA9IGRldm1fYWRkX2FjdGlvbl9vcl9yZXNldCgmc3BpLT5kZXYsIGFkbXYx MDEzX2Nsa19kaXNhYmxlLCBzdC0+Y2xraW4pOwo+IC0JaWYgKHJldCkKPiAtCQlyZXR1cm4gcmV0 Owo+IC0KPiAgCXN0LT5uYi5ub3RpZmllcl9jYWxsID0gYWRtdjEwMTNfZnJlcV9jaGFuZ2U7Cj4g IAlyZXQgPSBkZXZtX2Nsa19ub3RpZmllcl9yZWdpc3Rlcigmc3BpLT5kZXYsIHN0LT5jbGtpbiwg JnN0LT5uYik7Cj4gIAlpZiAocmV0KQo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2lpby9mcmVxdWVu Y3kvYWRyZjY3ODAuYyBiL2RyaXZlcnMvaWlvL2ZyZXF1ZW5jeS9hZHJmNjc4MC5jCj4gaW5kZXgg ODI1NWZmZDE3NGY2Li5kN2JmMzRjZWVkZDggMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9paW8vZnJl cXVlbmN5L2FkcmY2NzgwLmMKPiArKysgYi9kcml2ZXJzL2lpby9mcmVxdWVuY3kvYWRyZjY3ODAu Ywo+IEBAIC00NDEsMTEgKzQ0MSw2IEBAIHN0YXRpYyB2b2lkIGFkcmY2NzgwX3Byb3BlcnRpZXNf cGFyc2Uoc3RydWN0IGFkcmY2NzgwX3N0YXRlICpzdCkKPiAgCXN0LT52ZGV0X291dF9lbiA9IGRl dmljZV9wcm9wZXJ0eV9yZWFkX2Jvb2woJnNwaS0+ZGV2LCAiYWRpLHZkZXQtb3V0LWVuIik7Cj4g IH0KPiAgCj4gLXN0YXRpYyB2b2lkIGFkcmY2NzgwX2Nsa19kaXNhYmxlKHZvaWQgKmRhdGEpCj4g LXsKPiAtCWNsa19kaXNhYmxlX3VucHJlcGFyZShkYXRhKTsKPiAtfQo+IC0KPiAgc3RhdGljIHZv aWQgYWRyZjY3ODBfcG93ZXJkb3duKHZvaWQgKmRhdGEpCj4gIHsKPiAgCS8qIERpc2FibGUgYWxs IGNvbXBvbmVudHMgaW4gdGhlIEVuYWJsZSBSZWdpc3RlciAqLwo+IEBAIC00NzMsMjAgKzQ2OCwx MSBAQCBzdGF0aWMgaW50IGFkcmY2NzgwX3Byb2JlKHN0cnVjdCBzcGlfZGV2aWNlICpzcGkpCj4g IAo+ICAJYWRyZjY3ODBfcHJvcGVydGllc19wYXJzZShzdCk7Cj4gIAo+IC0Jc3QtPmNsa2luID0g ZGV2bV9jbGtfZ2V0KCZzcGktPmRldiwgImxvX2luIik7Cj4gKwlzdC0+Y2xraW4gPSBkZXZtX2Ns a19nZXRfZW5hYmxlZCgmc3BpLT5kZXYsICJsb19pbiIpOwo+ICAJaWYgKElTX0VSUihzdC0+Y2xr aW4pKQo+ICAJCXJldHVybiBkZXZfZXJyX3Byb2JlKCZzcGktPmRldiwgUFRSX0VSUihzdC0+Y2xr aW4pLAo+ICAJCQkJICAgICAiZmFpbGVkIHRvIGdldCB0aGUgTE8gaW5wdXQgY2xvY2tcbiIpOwo+ ICAKPiAtCXJldCA9IGNsa19wcmVwYXJlX2VuYWJsZShzdC0+Y2xraW4pOwo+IC0JaWYgKHJldCkK PiAtCQlyZXR1cm4gcmV0Owo+IC0KPiAtCXJldCA9IGRldm1fYWRkX2FjdGlvbl9vcl9yZXNldCgm c3BpLT5kZXYsIGFkcmY2NzgwX2Nsa19kaXNhYmxlLAo+IC0JCQkJICAgICAgIHN0LT5jbGtpbik7 Cj4gLQlpZiAocmV0KQo+IC0JCXJldHVybiByZXQ7Cj4gLQo+ICAJbXV0ZXhfaW5pdCgmc3QtPmxv Y2spOwo+ICAKPiAgCXJldCA9IGFkcmY2NzgwX2luaXQoc3QpOwo+IGRpZmYgLS1naXQgYS9kcml2 ZXJzL2lpby9pbXUvYWRpczE2NDc1LmMgYi9kcml2ZXJzL2lpby9pbXUvYWRpczE2NDc1LmMKPiBp bmRleCBlYTkxZDEyNzA3N2QuLjQ1YTg3NjVkN2MxNiAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2lp by9pbXUvYWRpczE2NDc1LmMKPiArKysgYi9kcml2ZXJzL2lpby9pbXUvYWRpczE2NDc1LmMKPiBA QCAtMTEyMCwxMSArMTEyMCw2IEBAIHN0YXRpYyBpcnFyZXR1cm5fdCBhZGlzMTY0NzVfdHJpZ2dl cl9oYW5kbGVyKGludCBpcnEsIHZvaWQgKnApCj4gIAlyZXR1cm4gSVJRX0hBTkRMRUQ7Cj4gIH0K PiAgCj4gLXN0YXRpYyB2b2lkIGFkaXMxNjQ3NV9kaXNhYmxlX2Nsayh2b2lkICpkYXRhKQo+IC17 Cj4gLQljbGtfZGlzYWJsZV91bnByZXBhcmUoKHN0cnVjdCBjbGsgKilkYXRhKTsKPiAtfQo+IC0K PiAgc3RhdGljIGludCBhZGlzMTY0NzVfY29uZmlnX3N5bmNfbW9kZShzdHJ1Y3QgYWRpczE2NDc1 ICpzdCkKPiAgewo+ICAJaW50IHJldDsKPiBAQCAtMTE1MCwxOSArMTE0NSwxMSBAQCBzdGF0aWMg aW50IGFkaXMxNjQ3NV9jb25maWdfc3luY19tb2RlKHN0cnVjdCBhZGlzMTY0NzUgKnN0KQo+ICAK PiAgCS8qIEFsbCB0aGUgb3RoZXIgbW9kZXMgcmVxdWlyZSBleHRlcm5hbCBpbnB1dCBzaWduYWwg Ki8KPiAgCWlmIChzeW5jLT5zeW5jX21vZGUgIT0gQURJUzE2NDc1X1NZTkNfT1VUUFVUKSB7Cj4g LQkJc3RydWN0IGNsayAqY2xrID0gZGV2bV9jbGtfZ2V0KGRldiwgTlVMTCk7Cj4gKwkJc3RydWN0 IGNsayAqY2xrID0gZGV2bV9jbGtfZ2V0X2VuYWJsZWQoZGV2LCBOVUxMKTsKPiAgCj4gIAkJaWYg KElTX0VSUihjbGspKQo+ICAJCQlyZXR1cm4gUFRSX0VSUihjbGspOwo+ICAKPiAtCQlyZXQgPSBj bGtfcHJlcGFyZV9lbmFibGUoY2xrKTsKPiAtCQlpZiAocmV0KQo+IC0JCQlyZXR1cm4gcmV0Owo+ IC0KPiAtCQlyZXQgPSBkZXZtX2FkZF9hY3Rpb25fb3JfcmVzZXQoZGV2LCBhZGlzMTY0NzVfZGlz YWJsZV9jbGssIGNsayk7Cj4gLQkJaWYgKHJldCkKPiAtCQkJcmV0dXJuIHJldDsKPiAtCj4gIAkJ c3QtPmNsa19mcmVxID0gY2xrX2dldF9yYXRlKGNsayk7Cj4gIAkJaWYgKHN0LT5jbGtfZnJlcSA8 IHN5bmMtPm1pbl9yYXRlIHx8Cj4gIAkJICAgIHN0LT5jbGtfZnJlcSA+IHN5bmMtPm1heF9yYXRl KSB7CgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGlu dXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRl YWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgt YXJtLWtlcm5lbAo=