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[2.137.188.124]) by smtp.gmail.com with ESMTPSA id w8-20020a1cf608000000b0038c8fdc93d6sm3996771wmc.28.2022.03.23.07.27.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Mar 2022 07:27:47 -0700 (PDT) From: "Jorge Ramirez-Ortiz, Foundries" X-Google-Original-From: "Jorge Ramirez-Ortiz, Foundries" Date: Wed, 23 Mar 2022 15:27:46 +0100 To: Jorge Ramirez-Ortiz Cc: michal.simek@xilinx.com, t.karthik.reddy@xilinx.com, ashok.reddy.soma@xilinx.com, adrian.fiergolski@fastree3d.com, igor.opaniuk@foundries.io, ricardo@foundries.io, u-boot@lists.denx.de Subject: Re: [PATCH] arm64: zynqmp: enable the PMUFW watchdog Message-ID: <20220323142746.GA1093552@trex> References: <20220323140458.1087767-1-jorge@foundries.io> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220323140458.1087767-1-jorge@foundries.io> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On 23/03/22, Jorge Ramirez-Ortiz wrote: > From 528b3117a36b7b4eea1839afbea7191d60638b0c Mon Sep 17 00:00:00 2001 > From: Jorge Ramirez-Ortiz > Date: Wed, 23 Mar 2022 14:41:15 +0100 > Subject: [PATCH] arm64: zynqmp: enable the PMUFW watchdog um, seems my sendpatch script is a bit off. please let me know if I should send a v2. > > If the PMUFW was built with support for the CSU watchdog we must let the > firmware know that it can be started. > > We do this by faking the FSBL done state. > > Reference code in PMUFW: > https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_apps/zynqmp_pmufw/src/xpfw_mod_common.c#L36 > > It needs this fix on the PMUFW > https://github.com/Xilinx/embeddedsw/pull/190 > > Signed-off-by: Jorge Ramirez-Ortiz > --- > arch/arm/mach-zynqmp/include/mach/hardware.h | 5 ++++- > board/xilinx/zynqmp/zynqmp.c | 4 ++++ > 2 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h > index a70d6d611b..24c3ef3d7d 100644 > --- a/arch/arm/mach-zynqmp/include/mach/hardware.h > +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h > @@ -174,8 +174,11 @@ struct csu_regs { > > #define ZYNQMP_PMU_BASEADDR 0xFFD80000 > > +#define FSBL_COMPLETION 0x1 > + > struct pmu_regs { > - u32 reserved[18]; > + u32 reserved[17]; > + u32 gen_storage5; /* 0x44 */ > u32 gen_storage6; /* 0x48 */ > }; > > diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c > index 70b3c81f12..c88c5fb8ea 100644 > --- a/board/xilinx/zynqmp/zynqmp.c > +++ b/board/xilinx/zynqmp/zynqmp.c > @@ -419,6 +419,10 @@ int board_init(void) > zynqmp_pm_cfg_obj_size); > printf("Silicon version:\t%d\n", zynqmp_get_silicon_version()); > > + /* fake FSBL completion to start the PMUFW watchdog when enabled */ > + writel(readl(&pmu_base->gen_storage5) | FSBL_COMPLETION, > + &pmu_base->gen_storage5); > + > /* the CSU disables the JTAG interface when secure boot is enabled */ > if (CONFIG_IS_ENABLED(ZYNQMP_RESTORE_JTAG)) > restore_jtag(); > -- > 2.34.1 >