From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 19F23C433EF for ; Thu, 24 Mar 2022 10:55:51 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2980D8407C; Thu, 24 Mar 2022 11:55:49 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="JAT4jO+k"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 79A6584091; Thu, 24 Mar 2022 11:55:46 +0100 (CET) Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8EC198407A for ; Thu, 24 Mar 2022 11:55:42 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tommaso.merciai@amarulasolutions.com Received: by mail-ed1-x52c.google.com with SMTP id t1so5149246edc.3 for ; Thu, 24 Mar 2022 03:55:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=55RlC3n8UteIPDY28gA1nToPwSUFCFF7bprEzXjPguE=; b=JAT4jO+k0HAfJyvxqwOJNyzu5FfUogAi8ID/ppMG6XCRC9RnrLIcwvLGGHQlL8WroQ GTwHNy3YpQu3OKFiTP6Lxk2lzR8lsGDWdAhX8P+CihiY76GjIvzFdVJvMyDO6k1qeC55 TOogmu6LeMos0Xvxc/dsx02ufU1ryscVioSlU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=55RlC3n8UteIPDY28gA1nToPwSUFCFF7bprEzXjPguE=; b=RPsrSGMUxdtHyWsrhMhtGkWNqlhaxNwsImEeJFm0lWODtimoR1eFeKr3U2ftRP1qfC eneSqF/ZTGbCxEeL0NAZbOzn1h+KxD76FjOwnrtu3RcPm5DimQXk+JwznoTBJUdVlBIO F1Z89hGhZuUuGLCSGR0E+YOPbJRYEWnk4ex0CaHw2fO8mOEQB5ZOtPcsO+rjFuIqFykR Qg9eTS02wx8SgCo+nrjzP8uYJmmyu06TmNyBTcVkbkB1DAYUl7HTmX4u/DnthcqAbQoC I5QZwWvVLLaVaHAul4L5OvmeHxZ0mlXtaRL78NjFSUHV/n+bTOvBQWIdF7WyIjHzQtFg +VAw== X-Gm-Message-State: AOAM5330hd66U+h2A2F6cms/aEfAPwvFU81jxO1JUEkaHI/vUtxucGPD NIpV4qCsd6QyMZkudX+2rTw+DA== X-Google-Smtp-Source: ABdhPJxS+U/0n8x7axGJUOoSUPv36V7wnJexn4dEhKcWTYa3ePh6lPFNd34O+fx/0mo06McfahM9oQ== X-Received: by 2002:aa7:d1ce:0:b0:419:19ed:725a with SMTP id g14-20020aa7d1ce000000b0041919ed725amr6007805edp.270.1648119341831; Thu, 24 Mar 2022 03:55:41 -0700 (PDT) Received: from tom-ThinkPad-T14s-Gen-2i ([151.40.120.69]) by smtp.gmail.com with ESMTPSA id o14-20020a170906774e00b006d5b915f27dsm983216ejn.169.2022.03.24.03.55.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Mar 2022 03:55:41 -0700 (PDT) Date: Thu, 24 Mar 2022 11:55:39 +0100 From: Tommaso Merciai To: Marek Vasut Cc: Stefano Babic , Fabio Estevam , "NXP i.MX U-Boot Team" , Peng Fan , Ye Li , Alice Guo , Andrey Zhizhikin , Marek =?iso-8859-1?Q?Beh=FAn?= , u-boot@lists.denx.de Subject: Re: [PATCH v2 4/9] arm: imx: imx8mm: add enable_pwm_clk function Message-ID: <20220324105539.GA2412@tom-ThinkPad-T14s-Gen-2i> References: <20220316152746.47768-1-tommaso.merciai@amarulasolutions.com> <20220316152746.47768-5-tommaso.merciai@amarulasolutions.com> <1225773a-10e9-d90b-d1b1-0b749c96129d@denx.de> <20220317073927.GC29139@tom-ThinkPad-T14s-Gen-2i> <1ed2f6d2-1bd7-4737-dcd5-10d7b6eb9542@denx.de> <20220317123818.GE29139@tom-ThinkPad-T14s-Gen-2i> <20220317151328.GG29139@tom-ThinkPad-T14s-Gen-2i> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Thu, Mar 17, 2022 at 04:31:15PM +0100, Marek Vasut wrote: > On 3/17/22 16:13, Tommaso Merciai wrote: > > On Thu, Mar 17, 2022 at 01:38:18PM +0100, Tommaso Merciai wrote: > > > On Thu, Mar 17, 2022 at 12:58:31PM +0100, Marek Vasut wrote: > > > > On 3/17/22 08:39, Tommaso Merciai wrote: > > > > > On Wed, Mar 16, 2022 at 09:54:34PM +0100, Marek Vasut wrote: > > > > > > On 3/16/22 16:27, Tommaso Merciai wrote: > > > > > > > Add function enable_pwm_clk into in clock_imx8mm.c. This > > > > > > > function first configure, then enable pwm clock from clock control > > > > > > > register. The following configuration is used: > > > > > > > > > > > > > > source(0) -> 24 MHz ref clock > > > > > > > div(0) -> no division for this clock > > > > > > > > > > > > > > References: > > > > > > > - iMX8MMRM.pdf p 303 > > > > > > > > > > > > > > Signed-off-by: Tommaso Merciai > > > > > > > --- > > > > > > > Changes since v1: > > > > > > > - Fix enable_pwm_clk function implementation. Now is generic for all pwm clks > > > > > > > > > > > > > > arch/arm/mach-imx/imx8m/clock_imx8mm.c | 53 ++++++++++++++++++++++++++ > > > > > > > 1 file changed, 53 insertions(+) > > > > > > > > > > > > Why is this not in drivers/clk/imx/ DM driver ? > > > > > > > > > > Hi Marek, > > > > > All function that enable/configure clk from CCGR are in arch/arm/mach-imx/imx8m/clock_imx8mm.c. > > > > > > > > These seems to be CCGR: > > > > > > > > $ grep -C 2 '0x4[0-9a-f]\{3\}' drivers/clk/imx/clk-imx8mm.c | sed "s@^.@@" > > > > > > > > clk_dm(IMX8MM_CLK_ECSPI1_ROOT, > > > > imx_clk_gate4("ecspi1_root_clk", "ecspi1", base + 0x4070, 0)); > > > > clk_dm(IMX8MM_CLK_ECSPI2_ROOT, > > > > imx_clk_gate4("ecspi2_root_clk", "ecspi2", base + 0x4080, 0)); > > > > clk_dm(IMX8MM_CLK_ECSPI3_ROOT, > > > > imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0)); > > > > clk_dm(IMX8MM_CLK_I2C1_ROOT, > > > > imx_clk_gate4("i2c1_root_clk", "i2c1", base + 0x4170, 0)); > > > > clk_dm(IMX8MM_CLK_I2C2_ROOT, > > > > imx_clk_gate4("i2c2_root_clk", "i2c2", base + 0x4180, 0)); > > > > clk_dm(IMX8MM_CLK_I2C3_ROOT, > > > > imx_clk_gate4("i2c3_root_clk", "i2c3", base + 0x4190, 0)); > > > > clk_dm(IMX8MM_CLK_I2C4_ROOT, > > > > imx_clk_gate4("i2c4_root_clk", "i2c4", base + 0x41a0, 0)); > > > > clk_dm(IMX8MM_CLK_OCOTP_ROOT, > > > > imx_clk_gate4("ocotp_root_clk", "ipg_root", base + 0x4220, 0)); > > > > clk_dm(IMX8MM_CLK_USDHC1_ROOT, > > > > imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0)); > > > > clk_dm(IMX8MM_CLK_USDHC2_ROOT, > > > > imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0)); > > > > clk_dm(IMX8MM_CLK_WDOG1_ROOT, > > > > imx_clk_gate4("wdog1_root_clk", "wdog", base + 0x4530, 0)); > > > > clk_dm(IMX8MM_CLK_WDOG2_ROOT, > > > > imx_clk_gate4("wdog2_root_clk", "wdog", base + 0x4540, 0)); > > > > clk_dm(IMX8MM_CLK_WDOG3_ROOT, > > > > imx_clk_gate4("wdog3_root_clk", "wdog", base + 0x4550, 0)); > > > > clk_dm(IMX8MM_CLK_USDHC3_ROOT, > > > > imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0)); > > > > clk_dm(IMX8MM_CLK_QSPI_ROOT, > > > > imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0)); > > > > clk_dm(IMX8MM_CLK_USB1_CTRL_ROOT, > > > > imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0)); > > > > > > > > /* clks not needed in SPL stage */ > > > > - > > > > clk_dm(IMX8MM_CLK_ENET1_ROOT, > > > > imx_clk_gate4("enet1_root_clk", "enet_axi", > > > > base + 0x40a0, 0)); > > > > endif > > > > > > > > > For that I continue to put here the implementation. After we can port > > > > > the clk dm part to manipulate clock in drivers/clk/imx/ DM driver. > > > > > What do you think about? Let me know. > > > > > > > > Seems like the clk_dm part is already in place and all you have to do is > > > > extend it. > > > > Hi Marek, > > I test the solution using DM model, it work: > > > > u-boot=> clk dump > > > > 24000000 2 | |-- pwm1 > > 24000000 3 | | `-- pwm1_root_clk > > 24000000 0 | |-- pwm2 > > 24000000 0 | | `-- pwm2_root_clk > > 24000000 0 | |-- pwm3 > > 24000000 0 | | `-- pwm3_root_clk > > 24000000 0 | |-- pwm4 > > 24000000 0 | | `-- pwm4_root_clk > > > > > > I test it using the following call on a dummy driver: > > > > ret = uclass_get_device_by_name(UCLASS_PWM, "pwm@30660000", &pwm); > > if (ret) > > printk("Failed to get pwm dev\n"); > > > > ret = clk_get_by_name(pwm, "per", &per_clk); > > if (ret) { > > printf("Failed to get per_clk\n"); > > return ret; > > } > > ret = clk_enable(&per_clk); > > if (ret) { > > printf("Failed to enable per_clk\n"); > > return ret; > > } > > > > ret = clk_get_by_name(pwm, "ipg", &ipg_clk); > > if (ret) { > > printf("Failed to get ipg_clk\n"); > > return ret; > > } > > ret = clk_enable(&ipg_clk); > > if (ret) { > > printf("Failed to enable ipg_clk\n"); > > return ret; > > } > > > > It's better to keep both the solutions or only > > based on DM model? I think we can put this initialization into > > drivers/pwm/pwm-imx.c imx_pwm_of_to_plat function. > > What do you think about? > > Let me know. > > DM is the preferred way, non-DM is fading away. Hi All, I'm working on pwm-imx drv, what do you think about move pwm-imx-utils and put all the 2 function inside pwm-imx.c under an ifndef CONFIG_DM_PWM. Using DM on pwm-imx make pwm-imx-utils.c no sense to exist. Example: #ifndef CONFIG_DM_PWM int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c, unsigned long *duty_c, unsigned long *prescale){ .... struct pwm_regs *pwm_id_to_reg(int pwm_id) { ... + all non dm implementation #else struct imx_pwm_priv { struct pwm_regs *regs; bool invert; struct clk *per_clk; struct clk *ipg_clk; }; int pwm_dm_imx_get_parms(struct imx_pwm_priv *priv, int period_ns, int duty_ns, unsigned long *period_c, unsigned long *duty_c, unsigned long *prescale) { .... + all dm implementation #endif What do you think about? Let me know. Thanks Tommaso -- Tommaso Merciai Embedded Linux Engineer tommaso.merciai@amarulasolutions.com __________________________________ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 info@amarulasolutions.com www.amarulasolutions.com