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From: Ping-Ke Shih <pkshih@realtek.com>
To: <kvalo@kernel.org>
Cc: <linux-wireless@vger.kernel.org>, <leo.li@realtek.com>
Subject: [PATCH 09/16] rtw89: update STA scheduler parameters for v1 chip
Date: Fri, 25 Mar 2022 14:00:48 +0800	[thread overview]
Message-ID: <20220325060055.58482-10-pkshih@realtek.com> (raw)
In-Reply-To: <20220325060055.58482-1-pkshih@realtek.com>

The v1 chip has additional setting of STA scheduler, so add it.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
 drivers/net/wireless/realtek/rtw89/mac.c | 16 +++++++++++++++-
 drivers/net/wireless/realtek/rtw89/reg.h |  9 +++++++++
 2 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c
index 92ab86144ea94..e729da8446d52 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.c
+++ b/drivers/net/wireless/realtek/rtw89/mac.c
@@ -1636,6 +1636,17 @@ static bool dle_is_txq_empty(struct rtw89_dev *rtwdev)
 	return false;
 }
 
+static void _patch_ss2f_path(struct rtw89_dev *rtwdev)
+{
+	const struct rtw89_chip_info *chip = rtwdev->chip;
+
+	if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B)
+		return;
+
+	rtw89_write32_mask(rtwdev, R_AX_SS2FINFO_PATH, B_AX_SS_DEST_QUEUE_MASK,
+			   SS2F_PATH_WLCPU);
+}
+
 static int sta_sch_init(struct rtw89_dev *rtwdev)
 {
 	u32 p_val;
@@ -1657,7 +1668,10 @@ static int sta_sch_init(struct rtw89_dev *rtwdev)
 		return ret;
 	}
 
-	rtw89_write32_set(rtwdev, R_AX_SS_CTRL, B_AX_SS_WARM_INIT_FLG);
+	rtw89_write32_set(rtwdev, R_AX_SS_CTRL, B_AX_SS_WARM_INIT_FLG |
+						B_AX_SS_NONEMPTY_SS2FINFO_EN);
+
+	_patch_ss2f_path(rtwdev);
 
 	return 0;
 }
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index 9d9554d28ab6a..fd9874137af72 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -801,8 +801,17 @@
 #define R_AX_SS_CTRL 0x9E10
 #define B_AX_SS_INIT_DONE_1 BIT(31)
 #define B_AX_SS_WARM_INIT_FLG BIT(29)
+#define B_AX_SS_NONEMPTY_SS2FINFO_EN BIT(28)
 #define B_AX_SS_EN BIT(0)
 
+#define R_AX_SS2FINFO_PATH 0x9E50
+#define B_AX_SS_UL_REL BIT(31)
+#define B_AX_SS_REL_QUEUE_MASK GENMASK(29, 24)
+#define B_AX_SS_REL_PORT_MASK GENMASK(18, 16)
+#define B_AX_SS_DEST_QUEUE_MASK GENMASK(13, 8)
+#define SS2F_PATH_WLCPU 0x0A
+#define B_AX_SS_DEST_PORT_MASK GENMASK(2, 0)
+
 #define R_AX_SS_MACID_PAUSE_0 0x9EB0
 #define B_AX_SS_MACID31_0_PAUSE_SH 0
 #define B_AX_SS_MACID31_0_PAUSE_MASK GENMASK(31, 0)
-- 
2.25.1


  parent reply	other threads:[~2022-03-25  6:02 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-25  6:00 [PATCH 00/16] rtw89: refine PCI and MAC codes into function with attributes Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 01/16] rtw89: pci: add register definition to rtw89_pci_info to generalize pci code Ping-Ke Shih
2022-04-06  8:55   ` Kalle Valo
2022-03-25  6:00 ` [PATCH 02/16] rtw89: pci: add pci attributes to configure operating mode Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 03/16] rtw89: pci: refine pci pre_init function Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 04/16] rtw89: pci: add LTR setting for v1 chip Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 05/16] rtw89: pci: set address info registers depends on chips Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 06/16] rtw89: pci: add deglitch setting Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 07/16] rtw89: pci: add L1 settings Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 08/16] rtw89: extend dmac_pre_init to support 8852C Ping-Ke Shih
2022-03-25  6:00 ` Ping-Ke Shih [this message]
2022-03-25  6:00 ` [PATCH 10/16] rtw89: add chip_ops::{enable,disable}_bb_rf to support v1 chip Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 11/16] rtw89: Turn on CR protection of CMAC Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 12/16] rtw89: 8852c: update security engine setting Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 13/16] rtw89: update scheduler setting Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 14/16] rtw89: initialize NAV control Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 15/16] rtw89: update TMAC parameters Ping-Ke Shih
2022-03-25  6:00 ` [PATCH 16/16] rtw89: update ptcl_init Ping-Ke Shih
2022-03-25 11:11 ` [PATCH 00/16] rtw89: refine PCI and MAC codes into function with attributes Kalle Valo
2022-03-25 12:01   ` Pkshih

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