From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9861AC433F5 for ; Tue, 29 Mar 2022 17:02:21 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 571258405E; Tue, 29 Mar 2022 19:00:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="hOmjHDzV"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 772FA8403D; Tue, 29 Mar 2022 18:59:57 +0200 (CEST) Received: from mail-wm1-x34a.google.com (mail-wm1-x34a.google.com [IPv6:2a00:1450:4864:20::34a]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6703E84012 for ; Tue, 29 Mar 2022 18:59:50 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=3BTtDYgYKBqAASCULLGOOGLE.COMU-BOOTLISTS.DENX.DE@flex--ascull.bounces.google.com Received: by mail-wm1-x34a.google.com with SMTP id t124-20020a1c4682000000b0038c8e8f8212so7011901wma.2 for ; Tue, 29 Mar 2022 09:59:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=zWP7R1AWPtaumfDC3XagNgpuQgWA671uAV0thr8BsM0=; b=hOmjHDzVkRrbpDUQ/9xj1co69HDKml6nf/qEvzqIcnW3pU8I6pVNJQGT3I1DwsQdah dFNabfZeJCkqjBCOZnIWEH/E0IhyU1Tm3k6LMyElMGcuLwrNMe2rMs/Dh0+nWLBh2nj8 1t/0Q+k8Sy5GgPGj99Nm18bVaI+xKKtE9TkwrBJ1KG2/La6vZVf8FNrpR4f2srySIBiT 0wb3rZT+6l15et9arhx5PSp0Riix3qV63JYcbGDRQnxWZuyg8fkAofDmftB4V5BVrUSw zeL6tIKOIyKc1OECsAtecFaSvx3+diapc7+Y1TmnJnVC99ACcK+a4PvDRpDO35ZM/25/ cvUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=zWP7R1AWPtaumfDC3XagNgpuQgWA671uAV0thr8BsM0=; b=hfdheqZCpvzQN2GqIOt8Hi+55bBEdpHR8UBwEZwik4UASHfy4PetGlcv2Newr/du5+ DzWKFD1hmj5TOC6dp8rbhu/t3utrbEVecPMYlpMZieaENbMdvFJIsm1rSB+tNdmq0yxg QMbfwAa9UGp6Qj0W7mhhYfH0OSOmwxyQZ2Clr3XogyEjTvcX8YtZio+I62l92LSjZnby VTqelNseOUcsCq9VECZa5U+gY+KADSjp7V5+QEvzbyM3U39iZEIjtqbswriuehHZgI85 rUuqeb9azGs/JtOMSxGSI+fJAww8f5RKirqIhz3IMUMTxQ6BVOwOro20SQzyCiPI4qfg dNhg== X-Gm-Message-State: AOAM5334gR37HwEJETtGc52fSJNzxvhYHqsmJ4Qjk59yFn5Qp2nQnV24 Q1vwLBJ267XpF2O56vdb6G6DyUvyx2989sA0rbkVtsKkVbU+QobbDgwpii9KtVa/oOWcXkhefqp 61veWd18qyTDWmZQ4OHg0/LNnozOeaOu1DqwUxC+hHy3vP6yvk+4har9HKu4= X-Google-Smtp-Source: ABdhPJz2V6V1lyTgeixEKufPDDI9LtTzfOp1BZcBQYdatZFdE/pzDF+OnSgA7aqhVDKx3PR/rEFXV1MGGaw= X-Received: from ascull.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:1510]) (user=ascull job=sendgmr) by 2002:a1c:7308:0:b0:38c:7b63:e385 with SMTP id d8-20020a1c7308000000b0038c7b63e385mr170426wmb.116.1648573189963; Tue, 29 Mar 2022 09:59:49 -0700 (PDT) Date: Tue, 29 Mar 2022 16:58:56 +0000 In-Reply-To: <20220329165900.1139885-1-ascull@google.com> Message-Id: <20220329165900.1139885-15-ascull@google.com> Mime-Version: 1.0 References: <20220329165900.1139885-1-ascull@google.com> X-Mailer: git-send-email 2.35.1.1021.g381101b075-goog Subject: [PATCH v2 14/18] pci: Match region flags using a mask From: Andrew Scull To: u-boot@lists.denx.de Cc: sjg@chromium.org, bmeng.cn@gmail.com, adelva@google.com, keirf@google.com, ptosi@google.com, Andrew Scull Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean When converting addresses, apply a mask to the region flags during lookup. This allows the caller to specify which flags are important and which are not, for example to exclude system memory regions. The behaviour of the function is changed such that they don't preferentially search for a non-system memory region. However, system memory regions are added after other regions in decode_regions() leading to a similar outcome. Signed-off-by: Andrew Scull --- drivers/pci/pci-uclass.c | 110 +++++++++------------------------------ include/pci.h | 18 ++++--- test/dm/pci.c | 60 +++++++++++---------- 3 files changed, 67 insertions(+), 121 deletions(-) diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 033c52bb4e..5069ada66d 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -1394,27 +1394,27 @@ void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr) dm_pci_write_config32(dev, bar, addr); } -static int _dm_pci_bus_to_phys(struct udevice *ctlr, pci_addr_t bus_addr, - size_t len, unsigned long flags, - unsigned long skip_mask, phys_addr_t *pa) +phys_addr_t dm_pci_bus_to_phys(struct udevice *dev, pci_addr_t bus_addr, + size_t len, unsigned long mask, + unsigned long flags) { - struct pci_controller *hose = dev_get_uclass_priv(ctlr); + struct udevice *ctlr; + struct pci_controller *hose; struct pci_region *res; pci_addr_t offset; int i; - if (hose->region_count == 0) { - *pa = bus_addr; - return 0; - } + /* The root controller has the region information */ + ctlr = pci_get_controller(dev); + hose = dev_get_uclass_priv(ctlr); + + if (hose->region_count == 0) + return bus_addr; for (i = 0; i < hose->region_count; i++) { res = &hose->regions[i]; - if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0) - continue; - - if (res->flags & skip_mask) + if ((res->flags & mask) != flags) continue; if (bus_addr < res->bus_start) @@ -1427,69 +1427,34 @@ static int _dm_pci_bus_to_phys(struct udevice *ctlr, pci_addr_t bus_addr, if (len > res->size - offset) continue; - *pa = res->phys_start + offset; - return 0; + return res->phys_start + offset; } - return 1; + puts("pci_hose_bus_to_phys: invalid physical address\n"); + return 0; } -phys_addr_t dm_pci_bus_to_phys(struct udevice *dev, pci_addr_t bus_addr, - size_t len, unsigned long flags) +pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr, + size_t len, unsigned long mask, + unsigned long flags) { - phys_addr_t phys_addr = 0; struct udevice *ctlr; - int ret; - - /* The root controller has the region information */ - ctlr = pci_get_controller(dev); - - /* - * if PCI_REGION_MEM is set we do a two pass search with preference - * on matches that don't have PCI_REGION_SYS_MEMORY set - */ - if ((flags & PCI_REGION_TYPE) == PCI_REGION_MEM) { - ret = _dm_pci_bus_to_phys(ctlr, bus_addr, len, - flags, PCI_REGION_SYS_MEMORY, - &phys_addr); - if (!ret) - return phys_addr; - } - - ret = _dm_pci_bus_to_phys(ctlr, bus_addr, len, flags, 0, &phys_addr); - - if (ret) - puts("pci_hose_bus_to_phys: invalid physical address\n"); - - return phys_addr; -} - -static int _dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr, - size_t len, unsigned long flags, - unsigned long skip_mask, pci_addr_t *ba) -{ + struct pci_controller *hose; struct pci_region *res; - struct udevice *ctlr; phys_addr_t offset; int i; - struct pci_controller *hose; /* The root controller has the region information */ ctlr = pci_get_controller(dev); hose = dev_get_uclass_priv(ctlr); - if (hose->region_count == 0) { - *ba = phys_addr; - return 0; - } + if (hose->region_count == 0) + return phys_addr; for (i = 0; i < hose->region_count; i++) { res = &hose->regions[i]; - if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0) - continue; - - if (res->flags & skip_mask) + if ((res->flags & mask) != flags) continue; if (phys_addr < res->phys_start) @@ -1502,36 +1467,11 @@ static int _dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr, if (len > res->size - offset) continue; - *ba = res->bus_start + offset; - return 0; - } - - return 1; -} - -pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr, - size_t len, unsigned long flags) -{ - pci_addr_t bus_addr = 0; - int ret; - - /* - * if PCI_REGION_MEM is set we do a two pass search with preference - * on matches that don't have PCI_REGION_SYS_MEMORY set - */ - if ((flags & PCI_REGION_TYPE) == PCI_REGION_MEM) { - ret = _dm_pci_phys_to_bus(dev, phys_addr, len, flags, - PCI_REGION_SYS_MEMORY, &bus_addr); - if (!ret) - return bus_addr; + return res->bus_start + offset; } - ret = _dm_pci_phys_to_bus(dev, phys_addr, len, flags, 0, &bus_addr); - - if (ret) - puts("pci_hose_phys_to_bus: invalid physical address\n"); - - return bus_addr; + puts("pci_hose_phys_to_bus: invalid physical address\n"); + return 0; } static phys_addr_t dm_pci_map_ea_virt(struct udevice *dev, int ea_off, diff --git a/include/pci.h b/include/pci.h index d137debb68..8198265269 100644 --- a/include/pci.h +++ b/include/pci.h @@ -1441,11 +1441,12 @@ u32 dm_pci_read_bar32(const struct udevice *dev, int barnum); * @dev: Device containing the PCI address * @addr: PCI address to convert * @len: Length of the address range + * @mask: Mask to match flags for the region type * @flags: Flags for the region type (PCI_REGION_...) * Return: physical address corresponding to that PCI bus address */ phys_addr_t dm_pci_bus_to_phys(struct udevice *dev, pci_addr_t addr, size_t len, - unsigned long flags); + unsigned long mask, unsigned long flags); /** * dm_pci_phys_to_bus() - convert a physical address to a PCI bus address @@ -1453,11 +1454,12 @@ phys_addr_t dm_pci_bus_to_phys(struct udevice *dev, pci_addr_t addr, size_t len, * @dev: Device containing the bus address * @addr: Physical address to convert * @len: Length of the address range + * @mask: Mask to match flags for the region type * @flags: Flags for the region type (PCI_REGION_...) * Return: PCI bus address corresponding to that physical address */ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t addr, size_t len, - unsigned long flags); + unsigned long mask, unsigned long flags); /** * dm_pci_map_bar() - get a virtual address associated with a BAR region @@ -1581,19 +1583,19 @@ int dm_pci_find_ext_capability(struct udevice *dev, int cap); int dm_pci_flr(struct udevice *dev); #define dm_pci_virt_to_bus(dev, addr, flags) \ - dm_pci_phys_to_bus(dev, (virt_to_phys(addr)), 0, (flags)) + dm_pci_phys_to_bus(dev, (virt_to_phys(addr)), 0, PCI_REGION_TYPE, (flags)) #define dm_pci_bus_to_virt(dev, addr, flags, len, map_flags) \ - map_physmem(dm_pci_bus_to_phys(dev, (addr), (len), (flags)), \ + map_physmem(dm_pci_bus_to_phys(dev, (addr), (len), PCI_REGION_TYPE, (flags)), \ (len), (map_flags)) #define dm_pci_phys_to_mem(dev, addr) \ - dm_pci_phys_to_bus((dev), (addr), 0, PCI_REGION_MEM) + dm_pci_phys_to_bus((dev), (addr), 0, PCI_REGION_TYPE, PCI_REGION_MEM) #define dm_pci_mem_to_phys(dev, addr) \ - dm_pci_bus_to_phys((dev), (addr), 0, PCI_REGION_MEM) + dm_pci_bus_to_phys((dev), (addr), 0, PCI_REGION_TYPE, PCI_REGION_MEM) #define dm_pci_phys_to_io(dev, addr) \ - dm_pci_phys_to_bus((dev), (addr), 0, PCI_REGION_IO) + dm_pci_phys_to_bus((dev), (addr), 0, PCI_REGION_TYPE, PCI_REGION_IO) #define dm_pci_io_to_phys(dev, addr) \ - dm_pci_bus_to_phys((dev), (addr), 0, PCI_REGION_IO) + dm_pci_bus_to_phys((dev), (addr), 0, PCI_REGION_TYPE, PCI_REGION_IO) #define dm_pci_virt_to_mem(dev, addr) \ dm_pci_virt_to_bus((dev), (addr), PCI_REGION_MEM) diff --git a/test/dm/pci.c b/test/dm/pci.c index c8598e4c17..edc407f9d3 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -383,45 +383,47 @@ DM_TEST(dm_test_pci_region_multi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); */ static int dm_test_pci_bus_to_phys(struct unit_test_state *uts) { + unsigned long mask = PCI_REGION_TYPE; + unsigned long flags = PCI_REGION_MEM; struct udevice *dev; phys_addr_t phys_addr; ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &dev)); /* Before any of the ranges. */ - phys_addr = dm_pci_bus_to_phys(dev, 0x20000000, 0x400, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x20000000, 0x400, mask, flags); ut_asserteq(0, phys_addr); /* Identity range: whole, start, mid, end */ - phys_addr = dm_pci_bus_to_phys(dev, 0x2fff0000, 0x2000, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x2fff0000, 0x2000, mask, flags); ut_asserteq(0, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x2000, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x2000, mask, flags); ut_asserteq(0x30000000, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x1000, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x1000, mask, flags); ut_asserteq(0x30000000, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x30000abc, 0x12, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x30000abc, 0x12, mask, flags); ut_asserteq(0x30000abc, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x30000800, 0x1800, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x30000800, 0x1800, mask, flags); ut_asserteq(0x30000800, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x30008000, 0x1801, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x30008000, 0x1801, mask, flags); ut_asserteq(0, phys_addr); /* Translated range: whole, start, mid, end */ - phys_addr = dm_pci_bus_to_phys(dev, 0x30ff0000, 0x2000, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x30ff0000, 0x2000, mask, flags); ut_asserteq(0, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x2000, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x2000, mask, flags); ut_asserteq(0x3e000000, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x1000, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x1000, mask, flags); ut_asserteq(0x3e000000, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x31000abc, 0x12, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x31000abc, 0x12, mask, flags); ut_asserteq(0x3e000abc, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x31000800, 0x1800, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x31000800, 0x1800, mask, flags); ut_asserteq(0x3e000800, phys_addr); - phys_addr = dm_pci_bus_to_phys(dev, 0x31008000, 0x1801, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x31008000, 0x1801, mask, flags); ut_asserteq(0, phys_addr); /* Beyond all of the ranges. */ - phys_addr = dm_pci_bus_to_phys(dev, 0x32000000, 0x400, PCI_REGION_MEM); + phys_addr = dm_pci_bus_to_phys(dev, 0x32000000, 0x400, mask, flags); ut_asserteq(0, phys_addr); return 0; @@ -434,45 +436,47 @@ DM_TEST(dm_test_pci_bus_to_phys, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); */ static int dm_test_pci_phys_to_bus(struct unit_test_state *uts) { + unsigned long mask = PCI_REGION_TYPE; + unsigned long flags = PCI_REGION_MEM; struct udevice *dev; phys_addr_t phys_addr; ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &dev)); /* Before any of the ranges. */ - phys_addr = dm_pci_phys_to_bus(dev, 0x20000000, 0x400, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x20000000, 0x400, mask, flags); ut_asserteq(0, phys_addr); /* Identity range: whole, start, mid, end */ - phys_addr = dm_pci_phys_to_bus(dev, 0x2fff0000, 0x2000, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x2fff0000, 0x2000, mask, flags); ut_asserteq(0, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x2000, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x2000, mask, flags); ut_asserteq(0x30000000, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x1000, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x1000, mask, flags); ut_asserteq(0x30000000, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x30000abc, 0x12, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x30000abc, 0x12, mask, flags); ut_asserteq(0x30000abc, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x30000800, 0x1800, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x30000800, 0x1800, mask, flags); ut_asserteq(0x30000800, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x30008000, 0x1801, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x30008000, 0x1801, mask, flags); ut_asserteq(0, phys_addr); /* Translated range: whole, start, mid, end */ - phys_addr = dm_pci_phys_to_bus(dev, 0x3dff0000, 0x2000, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x3dff0000, 0x2000, mask, flags); ut_asserteq(0, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x2000, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x2000, mask, flags); ut_asserteq(0x31000000, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x1000, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x1000, mask, flags); ut_asserteq(0x31000000, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x3e000abc, 0x12, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x3e000abc, 0x12, mask, flags); ut_asserteq(0x31000abc, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x3e000800, 0x1800, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x3e000800, 0x1800, mask, flags); ut_asserteq(0x31000800, phys_addr); - phys_addr = dm_pci_phys_to_bus(dev, 0x3e008000, 0x1801, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x3e008000, 0x1801, mask, flags); ut_asserteq(0, phys_addr); /* Beyond all of the ranges. */ - phys_addr = dm_pci_phys_to_bus(dev, 0x3f000000, 0x400, PCI_REGION_MEM); + phys_addr = dm_pci_phys_to_bus(dev, 0x3f000000, 0x400, mask, flags); ut_asserteq(0, phys_addr); return 0; -- 2.35.1.1021.g381101b075-goog