[PATCH 0/3] Add initial support for MA35D1 SoC

[PATCH 0/3] Add initial support for MA35D1 SoC

[Jacky Huang]

This patch series adds initial support for Nuvoton MA35D1 SoC,
include initial dts and clock controller binding.

Jacky Huang (3):
  dt-bindings: clock: add binding for MA35D1 clock controller
  dt-bindings: clock: Document MA35D1 clock controller bindings
  arm64: dts: nuvoton: Add initial support for MA35D1

 .../bindings/clock/nuvoton,ma35d1-clk.yaml    |  59 ++++
 arch/arm64/boot/dts/Makefile                  |   1 +
 arch/arm64/boot/dts/nuvoton/Makefile          |   2 +
 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts    |  23 ++
 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi       | 106 +++++++
 .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
 6 files changed, 453 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
 create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
 create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h

-- 
2.30.2

[PATCH 0/3] Add initial support for MA35D1 SoC

[Jacky Huang]

This patch series adds initial support for Nuvoton MA35D1 SoC,
include initial dts and clock controller binding.

Jacky Huang (3):
  dt-bindings: clock: add binding for MA35D1 clock controller
  dt-bindings: clock: Document MA35D1 clock controller bindings
  arm64: dts: nuvoton: Add initial support for MA35D1

 .../bindings/clock/nuvoton,ma35d1-clk.yaml    |  59 ++++
 arch/arm64/boot/dts/Makefile                  |   1 +
 arch/arm64/boot/dts/nuvoton/Makefile          |   2 +
 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts    |  23 ++
 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi       | 106 +++++++
 .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
 6 files changed, 453 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
 create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
 create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h

-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Jacky Huang]

Add the dt-bindings header for Nuvoton MA35D1, that gets shared
between the clock controller and clock references in the dts.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
 .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
 1 file changed, 262 insertions(+)
 create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h

diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
new file mode 100644
index 000000000000..3634e5edcac5
--- /dev/null
+++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
@@ -0,0 +1,262 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
+/*
+ * Copyright (c) 2022 Nuvoton Technology Corporation.
+ */
+
+#ifndef __DT_BINDINGS_MA35D1_CLK_H
+#define __DT_BINDINGS_MA35D1_CLK_H
+
+/* Clock Sources */
+/* External and Internal oscillator clocks */
+#define	HXT		0
+#define	HXT_GATE	1
+#define	LXT		2
+#define	LXT_GATE	3
+#define	HIRC		4
+#define	HIRC_GATE	5
+#define	LIRC		6
+#define	LIRC_GATE	7
+
+/* PLLs */
+#define	CAPLL		8
+#define	SYSPLL		9
+#define	DDRPLL		10
+#define	APLL		11
+#define	EPLL		12
+#define	VPLL		13
+
+/* EPLL Divider */
+#define	EPLL_DIV2	14
+#define	EPLL_DIV4	15
+#define	EPLL_DIV8	16
+
+/* CA35 CPU Clock, System Clock, AXI, HCLK and PCLK */
+#define	CA35CLK_MUX	17
+#define	AXICLK_DIV2	18
+#define	AXICLK_DIV4	19
+#define	AXICLK_MUX	20
+#define	SYSCLK0_MUX	21
+#define	SYSCLK1_MUX	22
+#define	SYSCLK1_DIV2	23
+#define	HCLK0		24
+#define	HCLK1		25
+#define	HCLK2		26
+#define	PCLK0		27
+#define	PCLK1		28
+#define	PCLK2		29
+#define	HCLK3		30
+#define	PCLK3		31
+#define	PCLK4		32
+
+/* Peripheral clocks */
+/* AXI and AHB Clocks */
+#define	USBPHY0		33
+#define	USBPHY1		34
+#define	DDR0_GATE	35
+#define	DDR6_GATE	36
+#define	CAN0_MUX	37
+#define	CAN0_DIV	38
+#define	CAN0_GATE	39
+#define	CAN1_MUX	40
+#define	CAN1_DIV	41
+#define	CAN1_GATE	42
+#define	CAN2_MUX	43
+#define	CAN2_DIV	44
+#define	CAN2_GATE	45
+#define	CAN3_MUX	46
+#define	CAN3_DIV	47
+#define	CAN3_GATE	48
+#define	SDH0_MUX	49
+#define	SDH0_GATE	50
+#define	SDH1_MUX	51
+#define	SDH1_GATE	52
+#define	NAND_GATE	53
+#define	USBD_GATE	54
+#define	USBH_GATE	55
+#define	HUSBH0_GATE	56
+#define	HUSBH1_GATE	57
+#define	GFX_MUX		58
+#define	GFX_GATE	59
+#define	VC8K_GATE	60
+#define	DCU_MUX		61
+#define	DCU_GATE	62
+#define	DCUP_DIV	63
+#define	EMAC0_GATE	64
+#define	EMAC1_GATE	65
+#define	CCAP0_MUX	66
+#define	CCAP0_DIV	67
+#define	CCAP0_GATE	68
+#define	CCAP1_MUX	69
+#define	CCAP1_DIV	70
+#define	CCAP1_GATE	71
+#define	PDMA0_GATE	72
+#define	PDMA1_GATE	73
+#define	PDMA2_GATE	74
+#define	PDMA3_GATE	75
+#define	WH0_GATE	76
+#define	WH1_GATE	77
+#define	HWS_GATE	78
+#define	EBI_GATE	79
+#define	SRAM0_GATE	80
+#define	SRAM1_GATE	81
+#define	ROM_GATE	82
+#define	TRA_GATE	83
+#define	DBG_MUX		84
+#define	DBG_GATE	85
+#define	CKO_MUX		86
+#define	CKO_DIV		87
+#define	CKO_GATE	88
+#define	GTMR_GATE	89
+#define	GPA_GATE	90
+#define	GPB_GATE	91
+#define	GPC_GATE	92
+#define	GPD_GATE	93
+#define	GPE_GATE	94
+#define	GPF_GATE	95
+#define	GPG_GATE	96
+#define	GPH_GATE	97
+#define	GPI_GATE	98
+#define	GPJ_GATE	99
+#define	GPK_GATE	100
+#define	GPL_GATE	101
+#define	GPM_GATE	102
+#define	GPN_GATE	103
+
+/* APB Clocks */
+#define	TMR0_MUX	104
+#define	TMR0_GATE	105
+#define	TMR1_MUX	106
+#define	TMR1_GATE	107
+#define	TMR2_MUX	108
+#define	TMR2_GATE	109
+#define	TMR3_MUX	110
+#define	TMR3_GATE	111
+#define	TMR4_MUX	112
+#define	TMR4_GATE	113
+#define	TMR5_MUX	114
+#define	TMR5_GATE	115
+#define	TMR6_MUX	116
+#define	TMR6_GATE	117
+#define	TMR7_MUX	118
+#define	TMR7_GATE	119
+#define	TMR8_MUX	120
+#define	TMR8_GATE	121
+#define	TMR9_MUX	122
+#define	TMR9_GATE	123
+#define	TMR10_MUX	124
+#define	TMR10_GATE	125
+#define	TMR11_MUX	126
+#define	TMR11_GATE	127
+#define	UART0_MUX	128
+#define	UART0_DIV	129
+#define	UART0_GATE	130
+#define	UART1_MUX	131
+#define	UART1_DIV	132
+#define	UART1_GATE	133
+#define	UART2_MUX	134
+#define	UART2_DIV	135
+#define	UART2_GATE	136
+#define	UART3_MUX	137
+#define	UART3_DIV	138
+#define	UART3_GATE	139
+#define	UART4_MUX	140
+#define	UART4_DIV	141
+#define	UART4_GATE	142
+#define	UART5_MUX	143
+#define	UART5_DIV	144
+#define	UART5_GATE	145
+#define	UART6_MUX	146
+#define	UART6_DIV	147
+#define	UART6_GATE	148
+#define	UART7_MUX	149
+#define	UART7_DIV	150
+#define	UART7_GATE	151
+#define	UART8_MUX	152
+#define	UART8_DIV	153
+#define	UART8_GATE	154
+#define	UART9_MUX	155
+#define	UART9_DIV	156
+#define	UART9_GATE	157
+#define	UART10_MUX	158
+#define	UART10_DIV	159
+#define	UART10_GATE	160
+#define	UART11_MUX	161
+#define	UART11_DIV	162
+#define	UART11_GATE	163
+#define	UART12_MUX	164
+#define	UART12_DIV	165
+#define	UART12_GATE	166
+#define	UART13_MUX	167
+#define	UART13_DIV	168
+#define	UART13_GATE	169
+#define	UART14_MUX	170
+#define	UART14_DIV	171
+#define	UART14_GATE	172
+#define	UART15_MUX	173
+#define	UART15_DIV	174
+#define	UART15_GATE	175
+#define	UART16_MUX	176
+#define	UART16_DIV	177
+#define	UART16_GATE	178
+#define	RTC_GATE	179
+#define	DDR_GATE	180
+#define	KPI_MUX		181
+#define	KPI_DIV		182
+#define	KPI_GATE	183
+#define	I2C0_GATE	184
+#define	I2C1_GATE	185
+#define	I2C2_GATE	186
+#define	I2C3_GATE	187
+#define	I2C4_GATE	188
+#define	I2C5_GATE	189
+#define	QSPI0_MUX	190
+#define	QSPI0_GATE	191
+#define	QSPI1_MUX	192
+#define	QSPI1_GATE	193
+#define	SMC0_MUX	194
+#define	SMC0_DIV	195
+#define	SMC0_GATE	196
+#define	SMC1_MUX	197
+#define	SMC1_DIV	198
+#define	SMC1_GATE	199
+#define	WDT0_MUX	200
+#define	WDT0_GATE	201
+#define	WDT1_MUX	202
+#define	WDT1_GATE	203
+#define	WDT2_MUX	204
+#define	WDT2_GATE	205
+#define	WWDT0_MUX	206
+#define	WWDT1_MUX	207
+#define	WWDT2_MUX	208
+#define	EPWM0_GATE	209
+#define	EPWM1_GATE	210
+#define	EPWM2_GATE	211
+#define	I2S0_MUX	212
+#define	I2S0_GATE	213
+#define	I2S1_MUX	214
+#define	I2S1_GATE	215
+#define	SSMCC_GATE	216
+#define	SSPCC_GATE	217
+#define	SPI0_MUX	218
+#define	SPI0_GATE	219
+#define	SPI1_MUX	220
+#define	SPI1_GATE	221
+#define	SPI2_MUX	222
+#define	SPI2_GATE	223
+#define	SPI3_MUX	224
+#define	SPI3_GATE	225
+#define	ECAP0_GATE	226
+#define	ECAP1_GATE	227
+#define	ECAP2_GATE	228
+#define	QEI0_GATE	229
+#define	QEI1_GATE	230
+#define	QEI2_GATE	231
+#define	ADC_DIV		232
+#define	ADC_GATE	233
+#define	EADC_DIV	234
+#define	EADC_GATE	235
+#define	CLK_MAX		236
+
+#define	MA35D1_CLK_MAX_IDX	236
+
+#endif /* __DT_BINDINGS_MA35D1_CLK_H */
-- 
2.30.2

[PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Jacky Huang]

Add the dt-bindings header for Nuvoton MA35D1, that gets shared
between the clock controller and clock references in the dts.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
 .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
 1 file changed, 262 insertions(+)
 create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h

diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
new file mode 100644
index 000000000000..3634e5edcac5
--- /dev/null
+++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
@@ -0,0 +1,262 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
+/*
+ * Copyright (c) 2022 Nuvoton Technology Corporation.
+ */
+
+#ifndef __DT_BINDINGS_MA35D1_CLK_H
+#define __DT_BINDINGS_MA35D1_CLK_H
+
+/* Clock Sources */
+/* External and Internal oscillator clocks */
+#define	HXT		0
+#define	HXT_GATE	1
+#define	LXT		2
+#define	LXT_GATE	3
+#define	HIRC		4
+#define	HIRC_GATE	5
+#define	LIRC		6
+#define	LIRC_GATE	7
+
+/* PLLs */
+#define	CAPLL		8
+#define	SYSPLL		9
+#define	DDRPLL		10
+#define	APLL		11
+#define	EPLL		12
+#define	VPLL		13
+
+/* EPLL Divider */
+#define	EPLL_DIV2	14
+#define	EPLL_DIV4	15
+#define	EPLL_DIV8	16
+
+/* CA35 CPU Clock, System Clock, AXI, HCLK and PCLK */
+#define	CA35CLK_MUX	17
+#define	AXICLK_DIV2	18
+#define	AXICLK_DIV4	19
+#define	AXICLK_MUX	20
+#define	SYSCLK0_MUX	21
+#define	SYSCLK1_MUX	22
+#define	SYSCLK1_DIV2	23
+#define	HCLK0		24
+#define	HCLK1		25
+#define	HCLK2		26
+#define	PCLK0		27
+#define	PCLK1		28
+#define	PCLK2		29
+#define	HCLK3		30
+#define	PCLK3		31
+#define	PCLK4		32
+
+/* Peripheral clocks */
+/* AXI and AHB Clocks */
+#define	USBPHY0		33
+#define	USBPHY1		34
+#define	DDR0_GATE	35
+#define	DDR6_GATE	36
+#define	CAN0_MUX	37
+#define	CAN0_DIV	38
+#define	CAN0_GATE	39
+#define	CAN1_MUX	40
+#define	CAN1_DIV	41
+#define	CAN1_GATE	42
+#define	CAN2_MUX	43
+#define	CAN2_DIV	44
+#define	CAN2_GATE	45
+#define	CAN3_MUX	46
+#define	CAN3_DIV	47
+#define	CAN3_GATE	48
+#define	SDH0_MUX	49
+#define	SDH0_GATE	50
+#define	SDH1_MUX	51
+#define	SDH1_GATE	52
+#define	NAND_GATE	53
+#define	USBD_GATE	54
+#define	USBH_GATE	55
+#define	HUSBH0_GATE	56
+#define	HUSBH1_GATE	57
+#define	GFX_MUX		58
+#define	GFX_GATE	59
+#define	VC8K_GATE	60
+#define	DCU_MUX		61
+#define	DCU_GATE	62
+#define	DCUP_DIV	63
+#define	EMAC0_GATE	64
+#define	EMAC1_GATE	65
+#define	CCAP0_MUX	66
+#define	CCAP0_DIV	67
+#define	CCAP0_GATE	68
+#define	CCAP1_MUX	69
+#define	CCAP1_DIV	70
+#define	CCAP1_GATE	71
+#define	PDMA0_GATE	72
+#define	PDMA1_GATE	73
+#define	PDMA2_GATE	74
+#define	PDMA3_GATE	75
+#define	WH0_GATE	76
+#define	WH1_GATE	77
+#define	HWS_GATE	78
+#define	EBI_GATE	79
+#define	SRAM0_GATE	80
+#define	SRAM1_GATE	81
+#define	ROM_GATE	82
+#define	TRA_GATE	83
+#define	DBG_MUX		84
+#define	DBG_GATE	85
+#define	CKO_MUX		86
+#define	CKO_DIV		87
+#define	CKO_GATE	88
+#define	GTMR_GATE	89
+#define	GPA_GATE	90
+#define	GPB_GATE	91
+#define	GPC_GATE	92
+#define	GPD_GATE	93
+#define	GPE_GATE	94
+#define	GPF_GATE	95
+#define	GPG_GATE	96
+#define	GPH_GATE	97
+#define	GPI_GATE	98
+#define	GPJ_GATE	99
+#define	GPK_GATE	100
+#define	GPL_GATE	101
+#define	GPM_GATE	102
+#define	GPN_GATE	103
+
+/* APB Clocks */
+#define	TMR0_MUX	104
+#define	TMR0_GATE	105
+#define	TMR1_MUX	106
+#define	TMR1_GATE	107
+#define	TMR2_MUX	108
+#define	TMR2_GATE	109
+#define	TMR3_MUX	110
+#define	TMR3_GATE	111
+#define	TMR4_MUX	112
+#define	TMR4_GATE	113
+#define	TMR5_MUX	114
+#define	TMR5_GATE	115
+#define	TMR6_MUX	116
+#define	TMR6_GATE	117
+#define	TMR7_MUX	118
+#define	TMR7_GATE	119
+#define	TMR8_MUX	120
+#define	TMR8_GATE	121
+#define	TMR9_MUX	122
+#define	TMR9_GATE	123
+#define	TMR10_MUX	124
+#define	TMR10_GATE	125
+#define	TMR11_MUX	126
+#define	TMR11_GATE	127
+#define	UART0_MUX	128
+#define	UART0_DIV	129
+#define	UART0_GATE	130
+#define	UART1_MUX	131
+#define	UART1_DIV	132
+#define	UART1_GATE	133
+#define	UART2_MUX	134
+#define	UART2_DIV	135
+#define	UART2_GATE	136
+#define	UART3_MUX	137
+#define	UART3_DIV	138
+#define	UART3_GATE	139
+#define	UART4_MUX	140
+#define	UART4_DIV	141
+#define	UART4_GATE	142
+#define	UART5_MUX	143
+#define	UART5_DIV	144
+#define	UART5_GATE	145
+#define	UART6_MUX	146
+#define	UART6_DIV	147
+#define	UART6_GATE	148
+#define	UART7_MUX	149
+#define	UART7_DIV	150
+#define	UART7_GATE	151
+#define	UART8_MUX	152
+#define	UART8_DIV	153
+#define	UART8_GATE	154
+#define	UART9_MUX	155
+#define	UART9_DIV	156
+#define	UART9_GATE	157
+#define	UART10_MUX	158
+#define	UART10_DIV	159
+#define	UART10_GATE	160
+#define	UART11_MUX	161
+#define	UART11_DIV	162
+#define	UART11_GATE	163
+#define	UART12_MUX	164
+#define	UART12_DIV	165
+#define	UART12_GATE	166
+#define	UART13_MUX	167
+#define	UART13_DIV	168
+#define	UART13_GATE	169
+#define	UART14_MUX	170
+#define	UART14_DIV	171
+#define	UART14_GATE	172
+#define	UART15_MUX	173
+#define	UART15_DIV	174
+#define	UART15_GATE	175
+#define	UART16_MUX	176
+#define	UART16_DIV	177
+#define	UART16_GATE	178
+#define	RTC_GATE	179
+#define	DDR_GATE	180
+#define	KPI_MUX		181
+#define	KPI_DIV		182
+#define	KPI_GATE	183
+#define	I2C0_GATE	184
+#define	I2C1_GATE	185
+#define	I2C2_GATE	186
+#define	I2C3_GATE	187
+#define	I2C4_GATE	188
+#define	I2C5_GATE	189
+#define	QSPI0_MUX	190
+#define	QSPI0_GATE	191
+#define	QSPI1_MUX	192
+#define	QSPI1_GATE	193
+#define	SMC0_MUX	194
+#define	SMC0_DIV	195
+#define	SMC0_GATE	196
+#define	SMC1_MUX	197
+#define	SMC1_DIV	198
+#define	SMC1_GATE	199
+#define	WDT0_MUX	200
+#define	WDT0_GATE	201
+#define	WDT1_MUX	202
+#define	WDT1_GATE	203
+#define	WDT2_MUX	204
+#define	WDT2_GATE	205
+#define	WWDT0_MUX	206
+#define	WWDT1_MUX	207
+#define	WWDT2_MUX	208
+#define	EPWM0_GATE	209
+#define	EPWM1_GATE	210
+#define	EPWM2_GATE	211
+#define	I2S0_MUX	212
+#define	I2S0_GATE	213
+#define	I2S1_MUX	214
+#define	I2S1_GATE	215
+#define	SSMCC_GATE	216
+#define	SSPCC_GATE	217
+#define	SPI0_MUX	218
+#define	SPI0_GATE	219
+#define	SPI1_MUX	220
+#define	SPI1_GATE	221
+#define	SPI2_MUX	222
+#define	SPI2_GATE	223
+#define	SPI3_MUX	224
+#define	SPI3_GATE	225
+#define	ECAP0_GATE	226
+#define	ECAP1_GATE	227
+#define	ECAP2_GATE	228
+#define	QEI0_GATE	229
+#define	QEI1_GATE	230
+#define	QEI2_GATE	231
+#define	ADC_DIV		232
+#define	ADC_GATE	233
+#define	EADC_DIV	234
+#define	EADC_GATE	235
+#define	CLK_MAX		236
+
+#define	MA35D1_CLK_MAX_IDX	236
+
+#endif /* __DT_BINDINGS_MA35D1_CLK_H */
-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Jacky Huang]

Add documentation to describe Nuvoton MA35D1 clock driver bindings.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
 .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml

diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
new file mode 100644
index 000000000000..bf5474b10420
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton MA35D1 Clock Control Module Binding
+
+maintainers:
+  - Chi-Fang Li <cfli0@nuvoton.com>
+  - Jacky Huang <ychuang3@nuvoton.com>
+
+description: |
+  The MA35D1 clock controller generates clocks for the whole chip,
+  including system clocks and all peripheral clocks.
+
+  See also:
+    dt-bindings/clock/ma35d1-clk.h
+
+properties:
+  compatible:
+    const: nuvoton,ma35d1-clk
+
+  reg:
+    maxItems: 1
+
+  "#clock-cells":
+    const: 1
+
+  clocks:
+    maxItems: 1
+
+  assigned-clocks:
+    maxItems: 4
+
+  assigned-clock-rates:
+    maxItems: 4
+
+  clock-pll-mode:
+    maxItems: 4
+
+required:
+  - compatible
+  - reg
+  - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+  # clock control module node:
+  - |
+    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+
+    clk: clock-controller@40460200 {
+        compatible = "nuvoton,ma35d1-clk";
+        reg = <0x40460200 0x100>;
+        #clock-cells = <1>;
+    };
+...
-- 
2.30.2

[PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Jacky Huang]

Add documentation to describe Nuvoton MA35D1 clock driver bindings.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
 .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
 1 file changed, 59 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml

diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
new file mode 100644
index 000000000000..bf5474b10420
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton MA35D1 Clock Control Module Binding
+
+maintainers:
+  - Chi-Fang Li <cfli0@nuvoton.com>
+  - Jacky Huang <ychuang3@nuvoton.com>
+
+description: |
+  The MA35D1 clock controller generates clocks for the whole chip,
+  including system clocks and all peripheral clocks.
+
+  See also:
+    dt-bindings/clock/ma35d1-clk.h
+
+properties:
+  compatible:
+    const: nuvoton,ma35d1-clk
+
+  reg:
+    maxItems: 1
+
+  "#clock-cells":
+    const: 1
+
+  clocks:
+    maxItems: 1
+
+  assigned-clocks:
+    maxItems: 4
+
+  assigned-clock-rates:
+    maxItems: 4
+
+  clock-pll-mode:
+    maxItems: 4
+
+required:
+  - compatible
+  - reg
+  - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+  # clock control module node:
+  - |
+    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+
+    clk: clock-controller@40460200 {
+        compatible = "nuvoton,ma35d1-clk";
+        reg = <0x40460200 0x100>;
+        #clock-cells = <1>;
+    };
+...
-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Jacky Huang]

Add the initial device tree files for Nuvoton MA35D1 Soc.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
 arch/arm64/boot/dts/Makefile               |   1 +
 arch/arm64/boot/dts/nuvoton/Makefile       |   2 +
 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts |  23 +++++
 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi    | 106 +++++++++++++++++++++
 4 files changed, 132 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 1ba04e31a438..87e9bda91276 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -31,3 +31,4 @@ subdir-y += tesla
 subdir-y += ti
 subdir-y += toshiba
 subdir-y += xilinx
+subdir-y += nuvoton
diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
new file mode 100644
index 000000000000..e1e0c466bf5e
--- /dev/null
+++ b/arch/arm64/boot/dts/nuvoton/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
new file mode 100644
index 000000000000..38e4f734da0f
--- /dev/null
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree Source for MA35D1 Evaluation Board (EVB)
+ *
+ * Copyright (C) 2021 Nuvoton Technology Corp.
+ */
+
+/dts-v1/;
+#include "ma35d1.dtsi"
+
+/ {
+	model = "Nuvoton MA35D1-EVB";
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8";
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x00000000 0x80000000 0 0x10000000>;
+	};
+};
+
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
new file mode 100644
index 000000000000..76e47517d80d
--- /dev/null
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Nuvoton Technology Corp.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+
+/ {
+	compatible = "nuvoton,ma35d1";
+	interrupt-parent = <&gic>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+			};
+		};
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35";
+			reg = <0x0>;
+			enable-method = "psci";
+			next-level-cache = <&L2_0>;
+		};
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35";
+			reg = <0x1>;
+			enable-method = "psci";
+			next-level-cache = <&L2_0>;
+		};
+		L2_0: l2-cache0 {
+			compatible = "cache";
+			cache-level = <2>;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>;
+		clock-frequency = <12000000>;
+	};
+
+	sys: system-controller@40460000 {
+		compatible = "nuvoton,ma35d1-sys", "syscon", "simple-mfd";
+		reg = <0x40460000 0x400>;
+	};
+
+	reset: reset-controller {
+		compatible = "nuvoton,ma35d1-reset";
+		nuvoton,ma35d1-sys = <&sys>;
+		#reset-cells = <1>;
+	};
+
+	clk: clock-controller@40460200 {
+		compatible = "nuvoton,ma35d1-clk";
+		reg = <0x40460200 0x100>;
+		#clock-cells = <1>;
+		assigned-clocks = <&clk DDRPLL>,
+				  <&clk APLL>,
+				  <&clk EPLL>,
+				  <&clk VPLL>;
+		assigned-clock-rates = <266000000>,
+				       <180000000>,
+				       <500000000>,
+				       <102000000>;
+		clock-pll-mode = <1>, <0>, <0>, <0>;
+	};
+
+	gic: interrupt-controller@50800000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		interrupt-parent = <&gic>;
+		interrupt-controller;
+		reg = <0x50801000 0x1000>,
+		      <0x50802000 0x2000>,
+		      <0x50804000 0x2000>,
+		      <0x50806000 0x2000>;
+		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0x13) |
+					 IRQ_TYPE_LEVEL_HIGH)>;
+	};
+};
-- 
2.30.2

[PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Jacky Huang]

Add the initial device tree files for Nuvoton MA35D1 Soc.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
 arch/arm64/boot/dts/Makefile               |   1 +
 arch/arm64/boot/dts/nuvoton/Makefile       |   2 +
 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts |  23 +++++
 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi    | 106 +++++++++++++++++++++
 4 files changed, 132 insertions(+)
 create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi

diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
index 1ba04e31a438..87e9bda91276 100644
--- a/arch/arm64/boot/dts/Makefile
+++ b/arch/arm64/boot/dts/Makefile
@@ -31,3 +31,4 @@ subdir-y += tesla
 subdir-y += ti
 subdir-y += toshiba
 subdir-y += xilinx
+subdir-y += nuvoton
diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
new file mode 100644
index 000000000000..e1e0c466bf5e
--- /dev/null
+++ b/arch/arm64/boot/dts/nuvoton/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts b/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
new file mode 100644
index 000000000000..38e4f734da0f
--- /dev/null
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree Source for MA35D1 Evaluation Board (EVB)
+ *
+ * Copyright (C) 2021 Nuvoton Technology Corp.
+ */
+
+/dts-v1/;
+#include "ma35d1.dtsi"
+
+/ {
+	model = "Nuvoton MA35D1-EVB";
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8";
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x00000000 0x80000000 0 0x10000000>;
+	};
+};
+
diff --git a/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
new file mode 100644
index 000000000000..76e47517d80d
--- /dev/null
+++ b/arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Nuvoton Technology Corp.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
+
+/ {
+	compatible = "nuvoton,ma35d1";
+	interrupt-parent = <&gic>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&cpu0>;
+				};
+				core1 {
+					cpu = <&cpu1>;
+				};
+			};
+		};
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35";
+			reg = <0x0>;
+			enable-method = "psci";
+			next-level-cache = <&L2_0>;
+		};
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a35";
+			reg = <0x1>;
+			enable-method = "psci";
+			next-level-cache = <&L2_0>;
+		};
+		L2_0: l2-cache0 {
+			compatible = "cache";
+			cache-level = <2>;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+					  IRQ_TYPE_LEVEL_LOW)>;
+		clock-frequency = <12000000>;
+	};
+
+	sys: system-controller@40460000 {
+		compatible = "nuvoton,ma35d1-sys", "syscon", "simple-mfd";
+		reg = <0x40460000 0x400>;
+	};
+
+	reset: reset-controller {
+		compatible = "nuvoton,ma35d1-reset";
+		nuvoton,ma35d1-sys = <&sys>;
+		#reset-cells = <1>;
+	};
+
+	clk: clock-controller@40460200 {
+		compatible = "nuvoton,ma35d1-clk";
+		reg = <0x40460200 0x100>;
+		#clock-cells = <1>;
+		assigned-clocks = <&clk DDRPLL>,
+				  <&clk APLL>,
+				  <&clk EPLL>,
+				  <&clk VPLL>;
+		assigned-clock-rates = <266000000>,
+				       <180000000>,
+				       <500000000>,
+				       <102000000>;
+		clock-pll-mode = <1>, <0>, <0>, <0>;
+	};
+
+	gic: interrupt-controller@50800000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		interrupt-parent = <&gic>;
+		interrupt-controller;
+		reg = <0x50801000 0x1000>,
+		      <0x50802000 0x2000>,
+		      <0x50804000 0x2000>,
+		      <0x50806000 0x2000>;
+		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0x13) |
+					 IRQ_TYPE_LEVEL_HIGH)>;
+	};
+};
-- 
2.30.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Krzysztof Kozlowski]

On 31/03/2022 04:42, Jacky Huang wrote:
> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
> 
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
>  .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
>  1 file changed, 59 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> new file mode 100644
> index 000000000000..bf5474b10420
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton MA35D1 Clock Control Module Binding
> +
> +maintainers:
> +  - Chi-Fang Li <cfli0@nuvoton.com>
> +  - Jacky Huang <ychuang3@nuvoton.com>
> +
> +description: |
> +  The MA35D1 clock controller generates clocks for the whole chip,
> +  including system clocks and all peripheral clocks.
> +
> +  See also:
> +    dt-bindings/clock/ma35d1-clk.h

Full path needed.

> +
> +properties:
> +  compatible:
> +    const: nuvoton,ma35d1-clk
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#clock-cells":
> +    const: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  assigned-clocks:
> +    maxItems: 4
> +
> +  assigned-clock-rates:
> +    maxItems: 4
> +
> +  clock-pll-mode:
> +    maxItems: 4
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  # clock control module node:

Useless comment, remove it.


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Krzysztof Kozlowski]

On 31/03/2022 04:42, Jacky Huang wrote:
> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
> 
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
>  .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
>  1 file changed, 59 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> new file mode 100644
> index 000000000000..bf5474b10420
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton MA35D1 Clock Control Module Binding
> +
> +maintainers:
> +  - Chi-Fang Li <cfli0@nuvoton.com>
> +  - Jacky Huang <ychuang3@nuvoton.com>
> +
> +description: |
> +  The MA35D1 clock controller generates clocks for the whole chip,
> +  including system clocks and all peripheral clocks.
> +
> +  See also:
> +    dt-bindings/clock/ma35d1-clk.h

Full path needed.

> +
> +properties:
> +  compatible:
> +    const: nuvoton,ma35d1-clk
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#clock-cells":
> +    const: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  assigned-clocks:
> +    maxItems: 4
> +
> +  assigned-clock-rates:
> +    maxItems: 4
> +
> +  clock-pll-mode:
> +    maxItems: 4
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  # clock control module node:

Useless comment, remove it.


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Krzysztof Kozlowski]

On 31/03/2022 04:42, Jacky Huang wrote:
> Add the dt-bindings header for Nuvoton MA35D1, that gets shared
> between the clock controller and clock references in the dts.
> 
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
>  .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
>  1 file changed, 262 insertions(+)
>  create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
> 
> diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
> new file mode 100644
> index 000000000000..3634e5edcac5
> --- /dev/null
> +++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
> @@ -0,0 +1,262 @@
> +/* SPDX-License-Identifier: GPL-2.0+ OR MIT */

Can you make it the same license as bindings?

> +/*
> + * Copyright (c) 2022 Nuvoton Technology Corporation.
> + */
> +
> +#ifndef __DT_BINDINGS_MA35D1_CLK_H
> +#define __DT_BINDINGS_MA35D1_CLK_H
> +
> +/* Clock Sources */
> +/* External and Internal oscillator clocks */
> +#define	HXT		0

One space after '#define'. Please do not introduce some non-Linux coding
style.


Best regards,
Krzysztof

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Krzysztof Kozlowski]

On 31/03/2022 04:42, Jacky Huang wrote:
> Add the dt-bindings header for Nuvoton MA35D1, that gets shared
> between the clock controller and clock references in the dts.
> 
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
>  .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
>  1 file changed, 262 insertions(+)
>  create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
> 
> diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
> new file mode 100644
> index 000000000000..3634e5edcac5
> --- /dev/null
> +++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
> @@ -0,0 +1,262 @@
> +/* SPDX-License-Identifier: GPL-2.0+ OR MIT */

Can you make it the same license as bindings?

> +/*
> + * Copyright (c) 2022 Nuvoton Technology Corporation.
> + */
> +
> +#ifndef __DT_BINDINGS_MA35D1_CLK_H
> +#define __DT_BINDINGS_MA35D1_CLK_H
> +
> +/* Clock Sources */
> +/* External and Internal oscillator clocks */
> +#define	HXT		0

One space after '#define'. Please do not introduce some non-Linux coding
style.


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Krzysztof Kozlowski]

On 31/03/2022 04:42, Jacky Huang wrote:
> Add the initial device tree files for Nuvoton MA35D1 Soc.
> 
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
>  arch/arm64/boot/dts/Makefile               |   1 +
>  arch/arm64/boot/dts/nuvoton/Makefile       |   2 +
>  arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts |  23 +++++
>  arch/arm64/boot/dts/nuvoton/ma35d1.dtsi    | 106 +++++++++++++++++++++
>  4 files changed, 132 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
>  create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
>  create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
> 
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index 1ba04e31a438..87e9bda91276 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -31,3 +31,4 @@ subdir-y += tesla
>  subdir-y += ti
>  subdir-y += toshiba
>  subdir-y += xilinx
> +subdir-y += nuvoton
> diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
> new file mode 100644
> index 000000000000..e1e0c466bf5e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/nuvoton/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb

NAK

This is actually some resend, but you did not version it, did not
provide changelog.

What is more - you ignored previously received comments.

We do not work like this. If you do not agree with a comment, please
keep discussion, not resend ignoring it.

Best regards,
Krzysztof

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Krzysztof Kozlowski]

On 31/03/2022 04:42, Jacky Huang wrote:
> Add the initial device tree files for Nuvoton MA35D1 Soc.
> 
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
>  arch/arm64/boot/dts/Makefile               |   1 +
>  arch/arm64/boot/dts/nuvoton/Makefile       |   2 +
>  arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts |  23 +++++
>  arch/arm64/boot/dts/nuvoton/ma35d1.dtsi    | 106 +++++++++++++++++++++
>  4 files changed, 132 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
>  create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
>  create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
> 
> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
> index 1ba04e31a438..87e9bda91276 100644
> --- a/arch/arm64/boot/dts/Makefile
> +++ b/arch/arm64/boot/dts/Makefile
> @@ -31,3 +31,4 @@ subdir-y += tesla
>  subdir-y += ti
>  subdir-y += toshiba
>  subdir-y += xilinx
> +subdir-y += nuvoton
> diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
> new file mode 100644
> index 000000000000..e1e0c466bf5e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/nuvoton/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb

NAK

This is actually some resend, but you did not version it, did not
provide changelog.

What is more - you ignored previously received comments.

We do not work like this. If you do not agree with a comment, please
keep discussion, not resend ignoring it.

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Krzysztof Kozlowski]

On 31/03/2022 08:29, Krzysztof Kozlowski wrote:
> On 31/03/2022 04:42, Jacky Huang wrote:
>> Add the dt-bindings header for Nuvoton MA35D1, that gets shared
>> between the clock controller and clock references in the dts.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>  .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
>>  1 file changed, 262 insertions(+)
>>  create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>
>> diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>> new file mode 100644
>> index 000000000000..3634e5edcac5
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>> @@ -0,0 +1,262 @@
>> +/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
> 
> Can you make it the same license as bindings?
> 
>> +/*
>> + * Copyright (c) 2022 Nuvoton Technology Corporation.
>> + */
>> +
>> +#ifndef __DT_BINDINGS_MA35D1_CLK_H
>> +#define __DT_BINDINGS_MA35D1_CLK_H
>> +
>> +/* Clock Sources */
>> +/* External and Internal oscillator clocks */
>> +#define	HXT		0
> 
> One space after '#define'. Please do not introduce some non-Linux coding
> style.

You also ignored my comments from your v1 (because this is not v1...).
Do not resend without discussion or implementation.

Best regards,
Krzysztof

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Krzysztof Kozlowski]

On 31/03/2022 08:29, Krzysztof Kozlowski wrote:
> On 31/03/2022 04:42, Jacky Huang wrote:
>> Add the dt-bindings header for Nuvoton MA35D1, that gets shared
>> between the clock controller and clock references in the dts.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>  .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
>>  1 file changed, 262 insertions(+)
>>  create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>
>> diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>> new file mode 100644
>> index 000000000000..3634e5edcac5
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>> @@ -0,0 +1,262 @@
>> +/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
> 
> Can you make it the same license as bindings?
> 
>> +/*
>> + * Copyright (c) 2022 Nuvoton Technology Corporation.
>> + */
>> +
>> +#ifndef __DT_BINDINGS_MA35D1_CLK_H
>> +#define __DT_BINDINGS_MA35D1_CLK_H
>> +
>> +/* Clock Sources */
>> +/* External and Internal oscillator clocks */
>> +#define	HXT		0
> 
> One space after '#define'. Please do not introduce some non-Linux coding
> style.

You also ignored my comments from your v1 (because this is not v1...).
Do not resend without discussion or implementation.

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Rob Herring]

On Thu, Mar 31, 2022 at 10:42:55AM +0800, Jacky Huang wrote:
> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
> 
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
>  .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
>  1 file changed, 59 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> new file mode 100644
> index 000000000000..bf5474b10420
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton MA35D1 Clock Control Module Binding
> +
> +maintainers:
> +  - Chi-Fang Li <cfli0@nuvoton.com>
> +  - Jacky Huang <ychuang3@nuvoton.com>
> +
> +description: |
> +  The MA35D1 clock controller generates clocks for the whole chip,
> +  including system clocks and all peripheral clocks.
> +
> +  See also:
> +    dt-bindings/clock/ma35d1-clk.h
> +
> +properties:
> +  compatible:
> +    const: nuvoton,ma35d1-clk
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#clock-cells":
> +    const: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  assigned-clocks:
> +    maxItems: 4

These aren't usually in the clock controller...

> +
> +  assigned-clock-rates:
> +    maxItems: 4
> +
> +  clock-pll-mode:
> +    maxItems: 4

What's this? Not a standard property. Needs a type, description, and 
vendor prefix.

> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  # clock control module node:
> +  - |
> +    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
> +
> +    clk: clock-controller@40460200 {
> +        compatible = "nuvoton,ma35d1-clk";
> +        reg = <0x40460200 0x100>;
> +        #clock-cells = <1>;
> +    };
> +...
> -- 
> 2.30.2
> 
> 

Re: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Rob Herring]

On Thu, Mar 31, 2022 at 10:42:55AM +0800, Jacky Huang wrote:
> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
> 
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
>  .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
>  1 file changed, 59 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> new file mode 100644
> index 000000000000..bf5474b10420
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nuvoton MA35D1 Clock Control Module Binding
> +
> +maintainers:
> +  - Chi-Fang Li <cfli0@nuvoton.com>
> +  - Jacky Huang <ychuang3@nuvoton.com>
> +
> +description: |
> +  The MA35D1 clock controller generates clocks for the whole chip,
> +  including system clocks and all peripheral clocks.
> +
> +  See also:
> +    dt-bindings/clock/ma35d1-clk.h
> +
> +properties:
> +  compatible:
> +    const: nuvoton,ma35d1-clk
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#clock-cells":
> +    const: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  assigned-clocks:
> +    maxItems: 4

These aren't usually in the clock controller...

> +
> +  assigned-clock-rates:
> +    maxItems: 4
> +
> +  clock-pll-mode:
> +    maxItems: 4

What's this? Not a standard property. Needs a type, description, and 
vendor prefix.

> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +
> +additionalProperties: false
> +
> +examples:
> +  # clock control module node:
> +  - |
> +    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
> +
> +    clk: clock-controller@40460200 {
> +        compatible = "nuvoton,ma35d1-clk";
> +        reg = <0x40460200 0x100>;
> +        #clock-cells = <1>;
> +    };
> +...
> -- 
> 2.30.2
> 
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Stephen Boyd]

Quoting Krzysztof Kozlowski (2022-03-30 23:32:04)
> On 31/03/2022 04:42, Jacky Huang wrote:
> > diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
> > new file mode 100644
> > index 000000000000..e1e0c466bf5e
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/nuvoton/Makefile
> > @@ -0,0 +1,2 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
> 
> NAK
> 
> This is actually some resend, but you did not version it, did not
> provide changelog.
> 
> What is more - you ignored previously received comments.
> 
> We do not work like this. If you do not agree with a comment, please
> keep discussion, not resend ignoring it.
> 

Please be kind to newcomers. Not everyone has been working on the kernel
for 10+ years.

Please read Documentation/process/submitting-patches.rst. We should
probably add some more details to that document about including
changelogs comparing previous rounds, links to previous rounds for ease
of discovery, cover letters for multi-patch series, etc.

At the least there's a section about replying to review comments.

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Stephen Boyd]

Quoting Krzysztof Kozlowski (2022-03-30 23:32:04)
> On 31/03/2022 04:42, Jacky Huang wrote:
> > diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
> > new file mode 100644
> > index 000000000000..e1e0c466bf5e
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/nuvoton/Makefile
> > @@ -0,0 +1,2 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
> 
> NAK
> 
> This is actually some resend, but you did not version it, did not
> provide changelog.
> 
> What is more - you ignored previously received comments.
> 
> We do not work like this. If you do not agree with a comment, please
> keep discussion, not resend ignoring it.
> 

Please be kind to newcomers. Not everyone has been working on the kernel
for 10+ years.

Please read Documentation/process/submitting-patches.rst. We should
probably add some more details to that document about including
changelogs comparing previous rounds, links to previous rounds for ease
of discovery, cover letters for multi-patch series, etc.

At the least there's a section about replying to review comments.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Krzysztof Kozlowski]

On 02/04/2022 01:34, Stephen Boyd wrote:
> Quoting Krzysztof Kozlowski (2022-03-30 23:32:04)
>> On 31/03/2022 04:42, Jacky Huang wrote:
>>> diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
>>> new file mode 100644
>>> index 000000000000..e1e0c466bf5e
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/nuvoton/Makefile
>>> @@ -0,0 +1,2 @@
>>> +# SPDX-License-Identifier: GPL-2.0
>>> +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
>>
>> NAK
>>
>> This is actually some resend, but you did not version it, did not
>> provide changelog.
>>
>> What is more - you ignored previously received comments.
>>
>> We do not work like this. If you do not agree with a comment, please
>> keep discussion, not resend ignoring it.
>>
> 
> Please be kind to newcomers. Not everyone has been working on the kernel
> for 10+ years.

Sorry for being harsh.

> 
> Please read Documentation/process/submitting-patches.rst. We should
> probably add some more details to that document about including
> changelogs comparing previous rounds, links to previous rounds for ease
> of discovery, cover letters for multi-patch series, etc.

This is in general explained in:
https://elixir.bootlin.com/linux/v5.13/source/Documentation/process/submitting-patches.rst#L311
Just no one really reads it...

I'll extend that section slightly.


Best regards,
Krzysztof

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Krzysztof Kozlowski]

On 02/04/2022 01:34, Stephen Boyd wrote:
> Quoting Krzysztof Kozlowski (2022-03-30 23:32:04)
>> On 31/03/2022 04:42, Jacky Huang wrote:
>>> diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
>>> new file mode 100644
>>> index 000000000000..e1e0c466bf5e
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/nuvoton/Makefile
>>> @@ -0,0 +1,2 @@
>>> +# SPDX-License-Identifier: GPL-2.0
>>> +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
>>
>> NAK
>>
>> This is actually some resend, but you did not version it, did not
>> provide changelog.
>>
>> What is more - you ignored previously received comments.
>>
>> We do not work like this. If you do not agree with a comment, please
>> keep discussion, not resend ignoring it.
>>
> 
> Please be kind to newcomers. Not everyone has been working on the kernel
> for 10+ years.

Sorry for being harsh.

> 
> Please read Documentation/process/submitting-patches.rst. We should
> probably add some more details to that document about including
> changelogs comparing previous rounds, links to previous rounds for ease
> of discovery, cover letters for multi-patch series, etc.

This is in general explained in:
https://elixir.bootlin.com/linux/v5.13/source/Documentation/process/submitting-patches.rst#L311
Just no one really reads it...

I'll extend that section slightly.


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Stephen Boyd]

Quoting Krzysztof Kozlowski (2022-04-02 02:55:58)
> On 02/04/2022 01:34, Stephen Boyd wrote:
> > Quoting Krzysztof Kozlowski (2022-03-30 23:32:04)
> >> On 31/03/2022 04:42, Jacky Huang wrote:
> >>> diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
> >>> new file mode 100644
> >>> index 000000000000..e1e0c466bf5e
> >>> --- /dev/null
> >>> +++ b/arch/arm64/boot/dts/nuvoton/Makefile
> >>> @@ -0,0 +1,2 @@
> >>> +# SPDX-License-Identifier: GPL-2.0
> >>> +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
> >>
> >> NAK
> >>
> >> This is actually some resend, but you did not version it, did not
> >> provide changelog.
> >>
> >> What is more - you ignored previously received comments.
> >>
> >> We do not work like this. If you do not agree with a comment, please
> >> keep discussion, not resend ignoring it.
> >>
> > 
> > Please be kind to newcomers. Not everyone has been working on the kernel
> > for 10+ years.
> 
> Sorry for being harsh.
> 
> > 
> > Please read Documentation/process/submitting-patches.rst. We should
> > probably add some more details to that document about including
> > changelogs comparing previous rounds, links to previous rounds for ease
> > of discovery, cover letters for multi-patch series, etc.
> 
> This is in general explained in:
> https://elixir.bootlin.com/linux/v5.13/source/Documentation/process/submitting-patches.rst#L311
> Just no one really reads it...

I see there's
https://www.kernel.org/doc/html/latest/process/submitting-patches.html#respond-to-review-comments

and there's a more detailed guide at 

https://www.kernel.org/doc/html/latest/process/development-process.html

> 
> I'll extend that section slightly.
> 

Awesome! Having documentation about best practices makes it easier to
reply with "read this document" vs writing an email each time it happens
(which is usually quite a lot).

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Stephen Boyd]

Quoting Krzysztof Kozlowski (2022-04-02 02:55:58)
> On 02/04/2022 01:34, Stephen Boyd wrote:
> > Quoting Krzysztof Kozlowski (2022-03-30 23:32:04)
> >> On 31/03/2022 04:42, Jacky Huang wrote:
> >>> diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
> >>> new file mode 100644
> >>> index 000000000000..e1e0c466bf5e
> >>> --- /dev/null
> >>> +++ b/arch/arm64/boot/dts/nuvoton/Makefile
> >>> @@ -0,0 +1,2 @@
> >>> +# SPDX-License-Identifier: GPL-2.0
> >>> +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
> >>
> >> NAK
> >>
> >> This is actually some resend, but you did not version it, did not
> >> provide changelog.
> >>
> >> What is more - you ignored previously received comments.
> >>
> >> We do not work like this. If you do not agree with a comment, please
> >> keep discussion, not resend ignoring it.
> >>
> > 
> > Please be kind to newcomers. Not everyone has been working on the kernel
> > for 10+ years.
> 
> Sorry for being harsh.
> 
> > 
> > Please read Documentation/process/submitting-patches.rst. We should
> > probably add some more details to that document about including
> > changelogs comparing previous rounds, links to previous rounds for ease
> > of discovery, cover letters for multi-patch series, etc.
> 
> This is in general explained in:
> https://elixir.bootlin.com/linux/v5.13/source/Documentation/process/submitting-patches.rst#L311
> Just no one really reads it...

I see there's
https://www.kernel.org/doc/html/latest/process/submitting-patches.html#respond-to-review-comments

and there's a more detailed guide at 

https://www.kernel.org/doc/html/latest/process/development-process.html

> 
> I'll extend that section slightly.
> 

Awesome! Having documentation about best practices makes it easier to
reply with "read this document" vs writing an email each time it happens
(which is usually quite a lot).

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Jacky Huang]

On 2022/3/31 下午 02:32, Krzysztof Kozlowski wrote:
> On 31/03/2022 04:42, Jacky Huang wrote:
>> Add the initial device tree files for Nuvoton MA35D1 Soc.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>   arch/arm64/boot/dts/Makefile               |   1 +
>>   arch/arm64/boot/dts/nuvoton/Makefile       |   2 +
>>   arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts |  23 +++++
>>   arch/arm64/boot/dts/nuvoton/ma35d1.dtsi    | 106 +++++++++++++++++++++
>>   4 files changed, 132 insertions(+)
>>   create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
>>   create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
>>   create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
>> index 1ba04e31a438..87e9bda91276 100644
>> --- a/arch/arm64/boot/dts/Makefile
>> +++ b/arch/arm64/boot/dts/Makefile
>> @@ -31,3 +31,4 @@ subdir-y += tesla
>>   subdir-y += ti
>>   subdir-y += toshiba
>>   subdir-y += xilinx
>> +subdir-y += nuvoton
>> diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
>> new file mode 100644
>> index 000000000000..e1e0c466bf5e
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/nuvoton/Makefile
>> @@ -0,0 +1,2 @@
>> +# SPDX-License-Identifier: GPL-2.0
>> +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
> NAK
>
> This is actually some resend, but you did not version it, did not
> provide changelog.
>
> What is more - you ignored previously received comments.
>
> We do not work like this. If you do not agree with a comment, please
> keep discussion, not resend ignoring it.
>
> Best regards,
> Krzysztof
Sorry, I am not familiar with text style e-mail operation.
I only saw the replies at bottom of mail, but not notice the replies in 
middle of mail.
It's my fault.
I will find comments from previous mail and have discussion there to fix 
all issues before sending the next version.

Best Regards,

Jacky

Re: [PATCH 3/3] arm64: dts: nuvoton: Add initial support for MA35D1

[Jacky Huang]

On 2022/3/31 下午 02:32, Krzysztof Kozlowski wrote:
> On 31/03/2022 04:42, Jacky Huang wrote:
>> Add the initial device tree files for Nuvoton MA35D1 Soc.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>   arch/arm64/boot/dts/Makefile               |   1 +
>>   arch/arm64/boot/dts/nuvoton/Makefile       |   2 +
>>   arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts |  23 +++++
>>   arch/arm64/boot/dts/nuvoton/ma35d1.dtsi    | 106 +++++++++++++++++++++
>>   4 files changed, 132 insertions(+)
>>   create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
>>   create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
>>   create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
>> index 1ba04e31a438..87e9bda91276 100644
>> --- a/arch/arm64/boot/dts/Makefile
>> +++ b/arch/arm64/boot/dts/Makefile
>> @@ -31,3 +31,4 @@ subdir-y += tesla
>>   subdir-y += ti
>>   subdir-y += toshiba
>>   subdir-y += xilinx
>> +subdir-y += nuvoton
>> diff --git a/arch/arm64/boot/dts/nuvoton/Makefile b/arch/arm64/boot/dts/nuvoton/Makefile
>> new file mode 100644
>> index 000000000000..e1e0c466bf5e
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/nuvoton/Makefile
>> @@ -0,0 +1,2 @@
>> +# SPDX-License-Identifier: GPL-2.0
>> +dtb-$(CONFIG_ARCH_NUVOTON) += ma35d1-evb.dtb
> NAK
>
> This is actually some resend, but you did not version it, did not
> provide changelog.
>
> What is more - you ignored previously received comments.
>
> We do not work like this. If you do not agree with a comment, please
> keep discussion, not resend ignoring it.
>
> Best regards,
> Krzysztof
Sorry, I am not familiar with text style e-mail operation.
I only saw the replies at bottom of mail, but not notice the replies in 
middle of mail.
It's my fault.
I will find comments from previous mail and have discussion there to fix 
all issues before sending the next version.

Best Regards,

Jacky



_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Jacky Huang]

On 2022/3/31 下午 02:27, Krzysztof Kozlowski wrote:
> On 31/03/2022 04:42, Jacky Huang wrote:
>> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>   .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
>>   1 file changed, 59 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> new file mode 100644
>> index 000000000000..bf5474b10420
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> @@ -0,0 +1,59 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fclock%2Fnuvoton%2Cma35d1-clk.yaml%23&amp;data=04%7C01%7Cychuang3%40nuvoton.com%7C26d072d904854cb7c77308da12df8dd5%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637843048619482176%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=NgdR0%2F8%2BxsM4u%2BPuKtuniulNf%2BhMLJoYsjIPnR0iVec%3D&amp;reserved=0
>> +$schema: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cychuang3%40nuvoton.com%7C26d072d904854cb7c77308da12df8dd5%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637843048619482176%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=Km%2Fawm8lT0IYN39tkE3lSrho9uCOd2Fgs8qb82pI7ec%3D&amp;reserved=0
>> +
>> +title: Nuvoton MA35D1 Clock Control Module Binding
>> +
>> +maintainers:
>> +  - Chi-Fang Li <cfli0@nuvoton.com>
>> +  - Jacky Huang <ychuang3@nuvoton.com>
>> +
>> +description: |
>> +  The MA35D1 clock controller generates clocks for the whole chip,
>> +  including system clocks and all peripheral clocks.
>> +
>> +  See also:
>> +    dt-bindings/clock/ma35d1-clk.h
> Full path needed.

I will fix it as include/dt-bindings/clock/ma35d1-clk.h
>
>> +
>> +properties:
>> +  compatible:
>> +    const: nuvoton,ma35d1-clk
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  "#clock-cells":
>> +    const: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  assigned-clocks:
>> +    maxItems: 4
>> +
>> +  assigned-clock-rates:
>> +    maxItems: 4
>> +
>> +  clock-pll-mode:
>> +    maxItems: 4
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - "#clock-cells"
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  # clock control module node:
> Useless comment, remove it.

OK, I will remove it.

>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> Best regards,
> Krzysztof

Thanks for your review.

Sincerely,
Jacky

Re: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Jacky Huang]

On 2022/3/31 下午 02:27, Krzysztof Kozlowski wrote:
> On 31/03/2022 04:42, Jacky Huang wrote:
>> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>   .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
>>   1 file changed, 59 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> new file mode 100644
>> index 000000000000..bf5474b10420
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> @@ -0,0 +1,59 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fclock%2Fnuvoton%2Cma35d1-clk.yaml%23&amp;data=04%7C01%7Cychuang3%40nuvoton.com%7C26d072d904854cb7c77308da12df8dd5%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637843048619482176%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=NgdR0%2F8%2BxsM4u%2BPuKtuniulNf%2BhMLJoYsjIPnR0iVec%3D&amp;reserved=0
>> +$schema: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cychuang3%40nuvoton.com%7C26d072d904854cb7c77308da12df8dd5%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637843048619482176%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=Km%2Fawm8lT0IYN39tkE3lSrho9uCOd2Fgs8qb82pI7ec%3D&amp;reserved=0
>> +
>> +title: Nuvoton MA35D1 Clock Control Module Binding
>> +
>> +maintainers:
>> +  - Chi-Fang Li <cfli0@nuvoton.com>
>> +  - Jacky Huang <ychuang3@nuvoton.com>
>> +
>> +description: |
>> +  The MA35D1 clock controller generates clocks for the whole chip,
>> +  including system clocks and all peripheral clocks.
>> +
>> +  See also:
>> +    dt-bindings/clock/ma35d1-clk.h
> Full path needed.

I will fix it as include/dt-bindings/clock/ma35d1-clk.h
>
>> +
>> +properties:
>> +  compatible:
>> +    const: nuvoton,ma35d1-clk
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  "#clock-cells":
>> +    const: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  assigned-clocks:
>> +    maxItems: 4
>> +
>> +  assigned-clock-rates:
>> +    maxItems: 4
>> +
>> +  clock-pll-mode:
>> +    maxItems: 4
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - "#clock-cells"
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  # clock control module node:
> Useless comment, remove it.

OK, I will remove it.

>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> Best regards,
> Krzysztof

Thanks for your review.

Sincerely,
Jacky


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Jacky Huang]

On 2022/3/31 下午 02:29, Krzysztof Kozlowski wrote:
> On 31/03/2022 04:42, Jacky Huang wrote:
>> Add the dt-bindings header for Nuvoton MA35D1, that gets shared
>> between the clock controller and clock references in the dts.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>   .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
>>   1 file changed, 262 insertions(+)
>>   create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>
>> diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>> new file mode 100644
>> index 000000000000..3634e5edcac5
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>> @@ -0,0 +1,262 @@
>> +/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
> Can you make it the same license as bindings?

Sure, I will modify it to be the same as binding.

/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */

>> +/*
>> + * Copyright (c) 2022 Nuvoton Technology Corporation.
>> + */
>> +
>> +#ifndef __DT_BINDINGS_MA35D1_CLK_H
>> +#define __DT_BINDINGS_MA35D1_CLK_H
>> +
>> +/* Clock Sources */
>> +/* External and Internal oscillator clocks */
>> +#define	HXT		0
> One space after '#define'. Please do not introduce some non-Linux coding
> style.
>
>
> Best regards,
> Krzysztof

OK, I will fix all the #define to be:

#define HXT		0


Thanks for your review.

Sincerely,
Jacky

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Jacky Huang]

On 2022/3/31 下午 02:29, Krzysztof Kozlowski wrote:
> On 31/03/2022 04:42, Jacky Huang wrote:
>> Add the dt-bindings header for Nuvoton MA35D1, that gets shared
>> between the clock controller and clock references in the dts.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>   .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
>>   1 file changed, 262 insertions(+)
>>   create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>
>> diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>> new file mode 100644
>> index 000000000000..3634e5edcac5
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>> @@ -0,0 +1,262 @@
>> +/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
> Can you make it the same license as bindings?

Sure, I will modify it to be the same as binding.

/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */

>> +/*
>> + * Copyright (c) 2022 Nuvoton Technology Corporation.
>> + */
>> +
>> +#ifndef __DT_BINDINGS_MA35D1_CLK_H
>> +#define __DT_BINDINGS_MA35D1_CLK_H
>> +
>> +/* Clock Sources */
>> +/* External and Internal oscillator clocks */
>> +#define	HXT		0
> One space after '#define'. Please do not introduce some non-Linux coding
> style.
>
>
> Best regards,
> Krzysztof

OK, I will fix all the #define to be:

#define HXT		0


Thanks for your review.

Sincerely,
Jacky





_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Jacky Huang]

On 2022/3/31 下午 02:34, Krzysztof Kozlowski wrote:
> On 31/03/2022 08:29, Krzysztof Kozlowski wrote:
>> On 31/03/2022 04:42, Jacky Huang wrote:
>>> Add the dt-bindings header for Nuvoton MA35D1, that gets shared
>>> between the clock controller and clock references in the dts.
>>>
>>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>>> ---
>>>   .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
>>>   1 file changed, 262 insertions(+)
>>>   create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>>
>>> diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>> new file mode 100644
>>> index 000000000000..3634e5edcac5
>>> --- /dev/null
>>> +++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>> @@ -0,0 +1,262 @@
>>> +/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
>> Can you make it the same license as bindings?
>>
>>> +/*
>>> + * Copyright (c) 2022 Nuvoton Technology Corporation.
>>> + */
>>> +
>>> +#ifndef __DT_BINDINGS_MA35D1_CLK_H
>>> +#define __DT_BINDINGS_MA35D1_CLK_H
>>> +
>>> +/* Clock Sources */
>>> +/* External and Internal oscillator clocks */
>>> +#define	HXT		0
>> One space after '#define'. Please do not introduce some non-Linux coding
>> style.
> You also ignored my comments from your v1 (because this is not v1...).
> Do not resend without discussion or implementation.
>
> Best regards,
> Krzysztof

Hi Krzysztof,

I am finding out the comments from all mails of this series and working 
on them.
I will fix all the issues before sending the next version.
So, the next version should be V3, right?
I will add modification history "V1 -> V2" and "V2 -> V3" to [PATCH V3 0/3].
Is that OK?

Sincerely,
Jacky

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Jacky Huang]

On 2022/3/31 下午 02:34, Krzysztof Kozlowski wrote:
> On 31/03/2022 08:29, Krzysztof Kozlowski wrote:
>> On 31/03/2022 04:42, Jacky Huang wrote:
>>> Add the dt-bindings header for Nuvoton MA35D1, that gets shared
>>> between the clock controller and clock references in the dts.
>>>
>>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>>> ---
>>>   .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
>>>   1 file changed, 262 insertions(+)
>>>   create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>>
>>> diff --git a/include/dt-bindings/clock/nuvoton,ma35d1-clk.h b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>> new file mode 100644
>>> index 000000000000..3634e5edcac5
>>> --- /dev/null
>>> +++ b/include/dt-bindings/clock/nuvoton,ma35d1-clk.h
>>> @@ -0,0 +1,262 @@
>>> +/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
>> Can you make it the same license as bindings?
>>
>>> +/*
>>> + * Copyright (c) 2022 Nuvoton Technology Corporation.
>>> + */
>>> +
>>> +#ifndef __DT_BINDINGS_MA35D1_CLK_H
>>> +#define __DT_BINDINGS_MA35D1_CLK_H
>>> +
>>> +/* Clock Sources */
>>> +/* External and Internal oscillator clocks */
>>> +#define	HXT		0
>> One space after '#define'. Please do not introduce some non-Linux coding
>> style.
> You also ignored my comments from your v1 (because this is not v1...).
> Do not resend without discussion or implementation.
>
> Best regards,
> Krzysztof

Hi Krzysztof,

I am finding out the comments from all mails of this series and working 
on them.
I will fix all the issues before sending the next version.
So, the next version should be V3, right?
I will add modification history "V1 -> V2" and "V2 -> V3" to [PATCH V3 0/3].
Is that OK?

Sincerely,
Jacky





_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Jacky Huang]

On 2022/4/1 上午 04:37, Rob Herring wrote:
> On Thu, Mar 31, 2022 at 10:42:55AM +0800, Jacky Huang wrote:
>> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>   .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
>>   1 file changed, 59 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> new file mode 100644
>> index 000000000000..bf5474b10420
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> @@ -0,0 +1,59 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fclock%2Fnuvoton%2Cma35d1-clk.yaml%23&amp;data=04%7C01%7Cychuang3%40nuvoton.com%7C2af0b5b253d14b24de4e08da1356520e%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637843795866047143%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=imev20A0MjoKYaL8o%2FXx3b%2FeCbSnXxVEjs9XqCLQZo0%3D&amp;reserved=0
>> +$schema: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cychuang3%40nuvoton.com%7C2af0b5b253d14b24de4e08da1356520e%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637843795866047143%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=zYcNQdhT2KPxQeVzPJ8Tm5gzRxk6Z0j7O6Cy01LWDRU%3D&amp;reserved=0
>> +
>> +title: Nuvoton MA35D1 Clock Control Module Binding
>> +
>> +maintainers:
>> +  - Chi-Fang Li <cfli0@nuvoton.com>
>> +  - Jacky Huang <ychuang3@nuvoton.com>
>> +
>> +description: |
>> +  The MA35D1 clock controller generates clocks for the whole chip,
>> +  including system clocks and all peripheral clocks.
>> +
>> +  See also:
>> +    dt-bindings/clock/ma35d1-clk.h
>> +
>> +properties:
>> +  compatible:
>> +    const: nuvoton,ma35d1-clk
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  "#clock-cells":
>> +    const: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  assigned-clocks:
>> +    maxItems: 4
> These aren't usually in the clock controller...

"clocks" is actually not used. I will remove it.

Does the "aren't usually" include "assigned-clocks"?
I saw it in other vendors.
For example rk3399.dtsi
It presents in cru: clock-controller@ff760000 node.

We use "assigned-clocks" to declare the four output PLLs of the clock 
controller.

>
>> +
>> +  assigned-clock-rates:
>> +    maxItems: 4
>> +
>> +  clock-pll-mode:
>> +    maxItems: 4
> What's this? Not a standard property. Needs a type, description, and
> vendor prefix.

clock-pll-mode is a vendor specific property.
I would modify it as the following:

   nuvoton,clk-pll-mode:
     A list of PLL operation mode corresponding to DDRPLL, APLL, EPLL, 
and VPLL
     in sequential.
     $ref: /schemas/types.yaml#/definitions/uint32-array
     minItems: 4
     maxItems: 4
     items:
       enum: [ 0, 1, 2 ]

Is it OK?


>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - "#clock-cells"
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  # clock control module node:
>> +  - |
>> +    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
>> +
>> +    clk: clock-controller@40460200 {
>> +        compatible = "nuvoton,ma35d1-clk";
>> +        reg = <0x40460200 0x100>;
>> +        #clock-cells = <1>;
>> +    };
>> +...
>> -- 
>> 2.30.2
>>
>>

Re: [PATCH 2/3] dt-bindings: clock: Document MA35D1 clock controller bindings

[Jacky Huang]

On 2022/4/1 上午 04:37, Rob Herring wrote:
> On Thu, Mar 31, 2022 at 10:42:55AM +0800, Jacky Huang wrote:
>> Add documentation to describe Nuvoton MA35D1 clock driver bindings.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>>   .../bindings/clock/nuvoton,ma35d1-clk.yaml    | 59 +++++++++++++++++++
>>   1 file changed, 59 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> new file mode 100644
>> index 000000000000..bf5474b10420
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
>> @@ -0,0 +1,59 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fclock%2Fnuvoton%2Cma35d1-clk.yaml%23&amp;data=04%7C01%7Cychuang3%40nuvoton.com%7C2af0b5b253d14b24de4e08da1356520e%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637843795866047143%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=imev20A0MjoKYaL8o%2FXx3b%2FeCbSnXxVEjs9XqCLQZo0%3D&amp;reserved=0
>> +$schema: https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&amp;data=04%7C01%7Cychuang3%40nuvoton.com%7C2af0b5b253d14b24de4e08da1356520e%7Ca3f24931d4034b4a94f17d83ac638e07%7C0%7C0%7C637843795866047143%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=zYcNQdhT2KPxQeVzPJ8Tm5gzRxk6Z0j7O6Cy01LWDRU%3D&amp;reserved=0
>> +
>> +title: Nuvoton MA35D1 Clock Control Module Binding
>> +
>> +maintainers:
>> +  - Chi-Fang Li <cfli0@nuvoton.com>
>> +  - Jacky Huang <ychuang3@nuvoton.com>
>> +
>> +description: |
>> +  The MA35D1 clock controller generates clocks for the whole chip,
>> +  including system clocks and all peripheral clocks.
>> +
>> +  See also:
>> +    dt-bindings/clock/ma35d1-clk.h
>> +
>> +properties:
>> +  compatible:
>> +    const: nuvoton,ma35d1-clk
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  "#clock-cells":
>> +    const: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  assigned-clocks:
>> +    maxItems: 4
> These aren't usually in the clock controller...

"clocks" is actually not used. I will remove it.

Does the "aren't usually" include "assigned-clocks"?
I saw it in other vendors.
For example rk3399.dtsi
It presents in cru: clock-controller@ff760000 node.

We use "assigned-clocks" to declare the four output PLLs of the clock 
controller.

>
>> +
>> +  assigned-clock-rates:
>> +    maxItems: 4
>> +
>> +  clock-pll-mode:
>> +    maxItems: 4
> What's this? Not a standard property. Needs a type, description, and
> vendor prefix.

clock-pll-mode is a vendor specific property.
I would modify it as the following:

   nuvoton,clk-pll-mode:
     A list of PLL operation mode corresponding to DDRPLL, APLL, EPLL, 
and VPLL
     in sequential.
     $ref: /schemas/types.yaml#/definitions/uint32-array
     minItems: 4
     maxItems: 4
     items:
       enum: [ 0, 1, 2 ]

Is it OK?


>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - "#clock-cells"
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  # clock control module node:
>> +  - |
>> +    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
>> +
>> +    clk: clock-controller@40460200 {
>> +        compatible = "nuvoton,ma35d1-clk";
>> +        reg = <0x40460200 0x100>;
>> +        #clock-cells = <1>;
>> +    };
>> +...
>> -- 
>> 2.30.2
>>
>>


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Krzysztof Kozlowski]

On 06/04/2022 06:00, Jacky Huang wrote:
>> You also ignored my comments from your v1 (because this is not v1...).
>> Do not resend without discussion or implementation.
>>
>> Best regards,
>> Krzysztof
> 
> Hi Krzysztof,
> 
> I am finding out the comments from all mails of this series and working 
> on them.
> I will fix all the issues before sending the next version.
> So, the next version should be V3, right?
> I will add modification history "V1 -> V2" and "V2 -> V3" to [PATCH V3 0/3].
> Is that OK?

Yes


Best regards,
Krzysztof

Re: [PATCH 1/3] dt-bindings: clock: add binding for MA35D1 clock controller

[Krzysztof Kozlowski]

On 06/04/2022 06:00, Jacky Huang wrote:
>> You also ignored my comments from your v1 (because this is not v1...).
>> Do not resend without discussion or implementation.
>>
>> Best regards,
>> Krzysztof
> 
> Hi Krzysztof,
> 
> I am finding out the comments from all mails of this series and working 
> on them.
> I will fix all the issues before sending the next version.
> So, the next version should be V3, right?
> I will add modification history "V1 -> V2" and "V2 -> V3" to [PATCH V3 0/3].
> Is that OK?

Yes


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 0/3] Add initial support for MA35D1 SoC

[Jacky Huang]

This patch series adds initial support for Nuvoton MA35D1 SoC,
include initial dts and clock controller binding.

Jacky Huang (3):
  dt-bindings: clock: add binding for MA35D1 clock controller
  dt-bindings: clock: Document MA35D1 clock controller bindings
  arm64: dts: nuvoton: Add initial support for MA35D1

 .../bindings/clock/nuvoton,ma35d1-clk.yaml    |  66 +++++
 arch/arm64/boot/dts/Makefile                  |   1 +
 arch/arm64/boot/dts/nuvoton/Makefile          |   2 +
 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts    |  23 ++
 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi       | 106 +++++++
 .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
 6 files changed, 460 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
 create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
 create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h

--
2.17.1

________________________________
________________________________
 The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.

[PATCH 0/3] Add initial support for MA35D1 SoC

[Jacky Huang]

This patch series adds initial support for Nuvoton MA35D1 SoC,
include initial dts and clock controller binding.

Jacky Huang (3):
  dt-bindings: clock: add binding for MA35D1 clock controller
  dt-bindings: clock: Document MA35D1 clock controller bindings
  arm64: dts: nuvoton: Add initial support for MA35D1

 .../bindings/clock/nuvoton,ma35d1-clk.yaml    |  66 +++++
 arch/arm64/boot/dts/Makefile                  |   1 +
 arch/arm64/boot/dts/nuvoton/Makefile          |   2 +
 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts    |  23 ++
 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi       | 106 +++++++
 .../dt-bindings/clock/nuvoton,ma35d1-clk.h    | 262 ++++++++++++++++++
 6 files changed, 460 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,ma35d1-clk.yaml
 create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1-evb.dts
 create mode 100644 arch/arm64/boot/dts/nuvoton/ma35d1.dtsi
 create mode 100644 include/dt-bindings/clock/nuvoton,ma35d1-clk.h

--
2.17.1

________________________________
________________________________
 The privileged confidential information contained in this email is intended for use only by the addressees as indicated by the original sender of this email. If you are not the addressee indicated in this email or are not responsible for delivery of the email to such a person, please kindly reply to the sender indicating this fact and delete all copies of it from your computer and network server immediately. Your cooperation is highly appreciated. It is advised that any unauthorized use of confidential information of Nuvoton is strictly prohibited; and any information in this email irrelevant to the official business of Nuvoton shall be deemed as neither given nor endorsed by Nuvoton.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel