From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5899CC35276 for ; Sat, 2 Apr 2022 18:41:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355648AbiDBSmv (ORCPT ); Sat, 2 Apr 2022 14:42:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245058AbiDBSmP (ORCPT ); Sat, 2 Apr 2022 14:42:15 -0400 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4CEE4C43A for ; Sat, 2 Apr 2022 11:40:21 -0700 (PDT) Received: by mail-wr1-x432.google.com with SMTP id h4so8542514wrc.13 for ; Sat, 02 Apr 2022 11:40:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ijNe1gxoWsdrm+oek0ryQTviG9eFIwp156wwm7qwtvc=; b=QS57J11MUObITJ/vb9ovmNk0WG+DE1ZiMHHrwzVn0L2+b3vWZbAdRPZKPO7QLNSryu 74b2HkwUaAtJAXHQaNbyH9Fh/ShNoJlA72t3i/FbErVQW9i4Dq2UalFgTV9NweJ2iFzc RtX63MdnCFOSKl+SbJzkjE5ACUMiPdghrsg/r4rMKjuAKkNe0JzzmEM8N5o9Q2sDvEqB akXw3sqnQwcXtXAe/TxkDeZ9hZQPKzyZhasp1AL31VsrszzKzRz6dROhSVyt3Eqs6vYK MWpYs03DXewtA7kWsHMUb9i/WkZ4EW6v+KLQHE+VY870v3Lh5wnZ60KxejWuqsuOCiC5 5GWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ijNe1gxoWsdrm+oek0ryQTviG9eFIwp156wwm7qwtvc=; b=kJNnSQ6ojfZ22Q4TiVSBJ0V3jmXpXmJVJQBJfcBbDycXHPOxnix4QNkxdJl+Ukeggl pdz1NmBqgSOvxgqbLRjq64ySqVv4XtcsZkALSGhLynMEX+Z4NnsXE8D2cxAB1TYLLsmF aFQ6NAJ+1CX4vo45bc8H0KsNBkIe0g6lVQzfcNIIIAfed/GzE/UZ7XzE+Zp8FXKMPVcf 1r0edQXYeZwVKln5QFIUl/52RrbBjPeiec5o6FheZG9izUQ+82W8owc/0Tt8rO4DLfTW BVLjwacyzJjeawbQOMt6ps+MP0WVLsEp7ntAzgMPYMxa/3hx8n0juX25wrFB9d+iDunt D1sw== X-Gm-Message-State: AOAM53038WLOduoODUeqxJ9EnTGBm8wqbgVubWJZ3pQvZvInJU4HmYsA TJl7iQQui9HvJ2swF9PxpH4jcg== X-Google-Smtp-Source: ABdhPJz9FA9JH2oOZCCYSONJ4CImbDLu4orm9k5IKhU9oR6fOzWRHx/mRp4fuOLIRLmBLVfIjeMIUA== X-Received: by 2002:a5d:6b0b:0:b0:1ef:d826:723a with SMTP id v11-20020a5d6b0b000000b001efd826723amr12091241wrw.420.1648924820081; Sat, 02 Apr 2022 11:40:20 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-201-27.adslplus.ch. [188.155.201.27]) by smtp.gmail.com with ESMTPSA id m20-20020a05600c4f5400b0038b5162260csm6760502wmq.23.2022.04.02.11.40.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 02 Apr 2022 11:40:19 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Mark Brown , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org Cc: Kuldeep Singh , Krzysztof Kozlowski Subject: [PATCH v3 3/9] ARM: dts: qcom: ipq4019: align dmas in SPI/UART with DT schema Date: Sat, 2 Apr 2022 20:40:05 +0200 Message-Id: <20220402184011.132465-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220402184011.132465-1-krzysztof.kozlowski@linaro.org> References: <20220402184011.132465-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The DT schema expects dma channels in tx-rx order. No functional change. Signed-off-by: Krzysztof Kozlowski --- Dropped Kuldeep's ack because of changes - more properties changed. --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index a9d0566a3190..1f6c4ab7f37e 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -253,8 +253,8 @@ blsp1_spi1: spi@78b5000 { /* BLSP1 QUP1 */ clock-names = "core", "iface"; #address-cells = <1>; #size-cells = <0>; - dmas = <&blsp_dma 5>, <&blsp_dma 4>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 4>, <&blsp_dma 5>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -267,8 +267,8 @@ blsp1_spi2: spi@78b6000 { /* BLSP1 QUP2 */ clock-names = "core", "iface"; #address-cells = <1>; #size-cells = <0>; - dmas = <&blsp_dma 7>, <&blsp_dma 6>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 6>, <&blsp_dma 7>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -281,8 +281,8 @@ blsp1_i2c3: i2c@78b7000 { /* BLSP1 QUP3 */ clock-names = "iface", "core"; #address-cells = <1>; #size-cells = <0>; - dmas = <&blsp_dma 9>, <&blsp_dma 8>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 8>, <&blsp_dma 9>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -295,8 +295,8 @@ blsp1_i2c4: i2c@78b8000 { /* BLSP1 QUP4 */ clock-names = "iface", "core"; #address-cells = <1>; #size-cells = <0>; - dmas = <&blsp_dma 11>, <&blsp_dma 10>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 10>, <&blsp_dma 11>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -382,8 +382,8 @@ blsp1_uart1: serial@78af000 { clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; - dmas = <&blsp_dma 1>, <&blsp_dma 0>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 0>, <&blsp_dma 1>; + dma-names = "tx", "rx"; }; blsp1_uart2: serial@78b0000 { @@ -394,8 +394,8 @@ blsp1_uart2: serial@78b0000 { clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; - dmas = <&blsp_dma 3>, <&blsp_dma 2>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 2>, <&blsp_dma 3>; + dma-names = "tx", "rx"; }; watchdog: watchdog@b017000 { -- 2.32.0