From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88554C433F5 for ; Thu, 7 Apr 2022 07:16:10 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BD27283DD4; Thu, 7 Apr 2022 09:14:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1649315671; bh=nt7FSbzoTdO4jUmDboG9xOoKfX+Qy5h3pIAjmM+JwEI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=bztRGAGqQiTalGXKNSjXlSxMMspnFpigupRtK1vOcWHU9XRXVtynIbeKs7yb1Qbi7 MLMM0XVDkDaTi5sNS+EMEORqja+6VJgvYIFlH5/XVoEowHyMaEn21jEpzvCxPjzcaw 1BsltcRvV81n8T9CNbuTnUGqm6s65anA71oVFCasJ+9IzjEtgSSvwDuPlgF2lzw4IF X+owMnzoGcRWDK+v38yNFQPgtdWURqnjeN2jughxYbMrN4Igy3pZc6rkPSFc85BABn uD1LVdtge/E9OHfmfzjfruWwRsIaA+yLTH4Jj6UgPhnfaIUKVUu1NImKuMJUL7gqMB zJMCREz0ZhMFA== Received: by phobos.denx.de (Postfix, from userid 109) id 7B8C783DB8; Thu, 7 Apr 2022 09:13:35 +0200 (CEST) Received: from mout-u-107.mailbox.org (mout-u-107.mailbox.org [IPv6:2001:67c:2050:1::465:107]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5C74583C84 for ; Thu, 7 Apr 2022 09:12:09 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp2.mailbox.org (unknown [91.198.250.124]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-107.mailbox.org (Postfix) with ESMTPS id 4KYsyJ2YxTz9sbL; Thu, 7 Apr 2022 09:12:08 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: daniel.schwierzeck@gmail.com, awilliams@marvell.com, cchavva@marvell.com Subject: [PATCH v2 26/52] mips: octeon: Add cvmx-fau-compat.c Date: Thu, 7 Apr 2022 09:11:28 +0200 Message-Id: <20220407071154.51997-27-sr@denx.de> In-Reply-To: <20220407071154.51997-1-sr@denx.de> References: <20220407071154.51997-1-sr@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Aaron Williams Import cvmx-fau-compat.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams Signed-off-by: Stefan Roese --- arch/mips/mach-octeon/cvmx-fau-compat.c | 53 +++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 arch/mips/mach-octeon/cvmx-fau-compat.c diff --git a/arch/mips/mach-octeon/cvmx-fau-compat.c b/arch/mips/mach-octeon/cvmx-fau-compat.c new file mode 100644 index 000000000000..9c2ff763ad53 --- /dev/null +++ b/arch/mips/mach-octeon/cvmx-fau-compat.c @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018-2022 Marvell International Ltd. + */ + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include + +#include + +u8 *cvmx_fau_regs_ptr; + +void cvmx_fau_bootmem_init(void *bootmem) +{ + memset(bootmem, 0, CVMX_FAU_MAX_REGISTERS_8); +} + +/** + * Initializes FAU region for devices without FAU unit. + * @return 0 on success -1 on failure + */ +int cvmx_fau_init(void) +{ + cvmx_fau_regs_ptr = (u8 *)cvmx_bootmem_alloc_named_range_once( + CVMX_FAU_MAX_REGISTERS_8, 0, 1ull << 31, 128, + "cvmx_fau_registers", cvmx_fau_bootmem_init); + + if (cvmx_fau_regs_ptr == 0ull) { + debug("ERROR: Failed to alloc named block for software FAU.\n"); + return -1; + } + + return 0; +} -- 2.35.1