From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CFD3C433F5 for ; Thu, 7 Apr 2022 07:22:42 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4DF6883046; Thu, 7 Apr 2022 09:22:40 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1649316160; bh=quvBYDlVg4+i48it7aO3tZXpW5o7lcOGq27JOsvumwg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=bDTqkgAPv1PdgteHGsr+PjT0kmH4cPCoOqkttng3t0s8aDuPgtNq6jRnrkPqw4gBU H5N6bJi6VxEySOB76M2QJJa5FG38uz6w+VPFyHCRxvuVg9ce8xBz/DXGHTjS9Ia5aj MnBwXpYEyn617OkbXgKibyO3XvOe/vXjhgQRMBPeZFc7M/sAJM7GCndro07B9ad9ZM xhDTvUKSTMvFumlbp8Z72wRaY7nY1taeHxIfDJjYGolwGoYJLPSUhRohpJBNZ6oHJc WFX3+WpTQXMoLvcOy7s3TURzw3g9NgWKl2TRL/BTG/BiDBQvs4XtJ14TU1Iu9E1FIR 8D05dAMNvLifw== Received: by phobos.denx.de (Postfix, from userid 109) id 7E9D0839B6; Thu, 7 Apr 2022 09:22:32 +0200 (CEST) Received: from mout-u-107.mailbox.org (mout-u-107.mailbox.org [91.198.250.252]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8F8B083CA4 for ; Thu, 7 Apr 2022 09:12:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=denx.de Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sr@denx.de Received: from smtp2.mailbox.org (unknown [91.198.250.124]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-107.mailbox.org (Postfix) with ESMTPS id 4KYsyN23Nxz9sV6; Thu, 7 Apr 2022 09:12:12 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Cc: daniel.schwierzeck@gmail.com, awilliams@marvell.com, cchavva@marvell.com Subject: [PATCH v2 39/52] mips: octeon: Add cvmx-pko-internal-ports-range.c Date: Thu, 7 Apr 2022 09:11:41 +0200 Message-Id: <20220407071154.51997-40-sr@denx.de> In-Reply-To: <20220407071154.51997-1-sr@denx.de> References: <20220407071154.51997-1-sr@denx.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Aaron Williams Import cvmx-pko-internal-ports-range.c from 2013 U-Boot. It will be used by the later added drivers to support networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams Signed-off-by: Stefan Roese --- .../cvmx-pko-internal-ports-range.c | 99 +++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 arch/mips/mach-octeon/cvmx-pko-internal-ports-range.c diff --git a/arch/mips/mach-octeon/cvmx-pko-internal-ports-range.c b/arch/mips/mach-octeon/cvmx-pko-internal-ports-range.c new file mode 100644 index 000000000000..694b4e3d9c55 --- /dev/null +++ b/arch/mips/mach-octeon/cvmx-pko-internal-ports-range.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018-2022 Marvell International Ltd. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +union interface_port { + struct { + int port; + int interface; + } s; + u64 u64; +}; + +static int dbg; + +static int port_range_init; + +int __cvmx_pko_internal_ports_range_init(void) +{ + int rv = 0; + + if (port_range_init) + return 0; + port_range_init = 1; + rv = cvmx_create_global_resource_range(CVMX_GR_TAG_PKO_IPORTS, + CVMX_HELPER_CFG_MAX_PKO_QUEUES); + if (rv != 0) + debug("ERROR : Failed to initialize pko internal port range\n"); + return rv; +} + +int cvmx_pko_internal_ports_alloc(int xiface, int port, u64 count) +{ + int ret_val = -1; + union interface_port inf_port; + struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface); + + __cvmx_pko_internal_ports_range_init(); + inf_port.s.interface = xi.interface; + inf_port.s.port = port; + ret_val = cvmx_allocate_global_resource_range(CVMX_GR_TAG_PKO_IPORTS, + inf_port.u64, count, 1); + if (dbg) + debug("internal port alloc : port=%02d base=%02d count=%02d\n", + (int)port, ret_val, (int)count); + if (ret_val == -1) + return ret_val; + cvmx_cfg_port[xi.node][xi.interface][port].ccpp_pko_port_base = ret_val; + cvmx_cfg_port[xi.node][xi.interface][port].ccpp_pko_num_ports = count; + return 0; +} -- 2.35.1