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Thu, 07 Apr 2022 15:37:40 -0700 (PDT) Received: from redhat.com ([38.15.36.239]) by smtp.gmail.com with ESMTPSA id c8-20020a4ad788000000b0031ce69b1640sm7642523oou.10.2022.04.07.15.37.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Apr 2022 15:37:40 -0700 (PDT) Date: Thu, 7 Apr 2022 16:37:37 -0600 From: Alex Williamson To: Jason Gunthorpe Subject: Re: [PATCH 1/5] iommu: Replace uses of IOMMU_CAP_CACHE_COHERENCY with dev_is_dma_coherent() Message-ID: <20220407163737.2a7ccd7a.alex.williamson@redhat.com> In-Reply-To: <20220407152331.GN2120790@nvidia.com> References: <20220406142432.GF2120790@nvidia.com> <20220406151823.GG2120790@nvidia.com> <20220406155056.GA30433@lst.de> <20220406160623.GI2120790@nvidia.com> <20220406161031.GA31790@lst.de> <20220406171729.GJ2120790@nvidia.com> <20220407135946.GM2120790@nvidia.com> <20220407152331.GN2120790@nvidia.com> Organization: Red Hat MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=alex.williamson@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Cc: Nelson Escobar , "Michael S. Tsirkin" , Jason Wang , "virtualization@lists.linux-foundation.org" , Will Deacon , Christoph Hellwig , "linux-s390@vger.kernel.org" , "kvm@vger.kernel.org" , "linux-rdma@vger.kernel.org" , "iommu@lists.linux-foundation.org" , Gerald Schaefer , "Tian, Kevin" , "linux-arm-msm@vger.kernel.org" , Robin Murphy , "linux-arm-kernel@lists.infradead.org" , "netdev@vger.kernel.org" , Cornelia Huck , Christian Benvenuti , David Woodhouse X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Thu, 7 Apr 2022 12:23:31 -0300 Jason Gunthorpe wrote: > On Thu, Apr 07, 2022 at 04:17:11PM +0100, Robin Murphy wrote: > > > For the specific case of overriding PCIe No Snoop (which is more problematic > > from an Arm SMMU PoV) when assigning to a VM, would that not be easier > > solved by just having vfio-pci clear the "Enable No Snoop" control bit in > > the endpoint's PCIe capability? > > Ideally. > > That was rediscussed recently, apparently there are non-compliant > devices and drivers that just ignore the bit. > > Presumably this is why x86 had to move to an IOMMU enforced feature.. I considered this option when implementing the current solution, but ultimately I didn't have confidence in being able to prevent drivers from using device specific means to effect the change anyway. GPUs especially have various back channels to config space. Thanks, Alex _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp4.osuosl.org (smtp4.osuosl.org [140.211.166.137]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB26FC433FE for ; Thu, 7 Apr 2022 22:37:50 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp4.osuosl.org (Postfix) with ESMTP id 4882241BCE; Thu, 7 Apr 2022 22:37:50 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp4.osuosl.org ([127.0.0.1]) by localhost (smtp4.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6yHNc7GrYyHD; Thu, 7 Apr 2022 22:37:49 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [IPv6:2605:bc80:3010:104::8cd3:938]) by smtp4.osuosl.org (Postfix) with ESMTPS id 7C7A841BD3; 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Thu, 07 Apr 2022 15:37:40 -0700 (PDT) Received: from redhat.com ([38.15.36.239]) by smtp.gmail.com with ESMTPSA id c8-20020a4ad788000000b0031ce69b1640sm7642523oou.10.2022.04.07.15.37.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Apr 2022 15:37:40 -0700 (PDT) Date: Thu, 7 Apr 2022 16:37:37 -0600 From: Alex Williamson To: Jason Gunthorpe Subject: Re: [PATCH 1/5] iommu: Replace uses of IOMMU_CAP_CACHE_COHERENCY with dev_is_dma_coherent() Message-ID: <20220407163737.2a7ccd7a.alex.williamson@redhat.com> In-Reply-To: <20220407152331.GN2120790@nvidia.com> References: <20220406142432.GF2120790@nvidia.com> <20220406151823.GG2120790@nvidia.com> <20220406155056.GA30433@lst.de> <20220406160623.GI2120790@nvidia.com> <20220406161031.GA31790@lst.de> <20220406171729.GJ2120790@nvidia.com> <20220407135946.GM2120790@nvidia.com> <20220407152331.GN2120790@nvidia.com> Organization: Red Hat MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=alex.williamson@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Cc: Nelson Escobar , Matthew Rosato , "Michael S. Tsirkin" , "virtualization@lists.linux-foundation.org" , Will Deacon , Christoph Hellwig , "linux-s390@vger.kernel.org" , "kvm@vger.kernel.org" , "linux-rdma@vger.kernel.org" , Joerg Roedel , "iommu@lists.linux-foundation.org" , Gerald Schaefer , "linux-arm-msm@vger.kernel.org" , Robin Murphy , "linux-arm-kernel@lists.infradead.org" , "netdev@vger.kernel.org" , Cornelia Huck , Rob Clark , Suravee Suthikulpanit , Christian Benvenuti , David Woodhouse , Lu Baolu X-BeenThere: virtualization@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux virtualization List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: virtualization-bounces@lists.linux-foundation.org Sender: "Virtualization" On Thu, 7 Apr 2022 12:23:31 -0300 Jason Gunthorpe wrote: > On Thu, Apr 07, 2022 at 04:17:11PM +0100, Robin Murphy wrote: > > > For the specific case of overriding PCIe No Snoop (which is more problematic > > from an Arm SMMU PoV) when assigning to a VM, would that not be easier > > solved by just having vfio-pci clear the "Enable No Snoop" control bit in > > the endpoint's PCIe capability? > > Ideally. > > That was rediscussed recently, apparently there are non-compliant > devices and drivers that just ignore the bit. > > Presumably this is why x86 had to move to an IOMMU enforced feature.. I considered this option when implementing the current solution, but ultimately I didn't have confidence in being able to prevent drivers from using device specific means to effect the change anyway. GPUs especially have various back channels to config space. Thanks, Alex _______________________________________________ Virtualization mailing list Virtualization@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/virtualization From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CBD1C433FE for ; Thu, 7 Apr 2022 22:38:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232277AbiDGWkY (ORCPT ); Thu, 7 Apr 2022 18:40:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232155AbiDGWkP (ORCPT ); Thu, 7 Apr 2022 18:40:15 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 65FFE129E8E for ; Thu, 7 Apr 2022 15:37:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1649371064; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NOIZSnS98gQ3xydj16FHLPEIjDJjA+ZwlFfjRBiVUDY=; b=Ufpqi9h9sFb+JOx8UKIkxqn0Qet61F8SOHh0vJ891v2iq9Quf5c8evRD75w/XaWkVoJDsJ bYj0zmQLayYIhxEsKb23N4o6pgXtTMKJDiO8+kig/FxupnZZpjYtOK2e/Wzba+M9manIYp tx9GVjCDsgDiu0SboTBPWizpKbKZvQM= Received: from mail-oa1-f71.google.com (mail-oa1-f71.google.com [209.85.160.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-189-os8_b5-YMKuX3H4LhWVEeQ-1; Thu, 07 Apr 2022 18:37:41 -0400 X-MC-Unique: os8_b5-YMKuX3H4LhWVEeQ-1 Received: by mail-oa1-f71.google.com with SMTP id 586e51a60fabf-e2100f7451so3756191fac.0 for ; Thu, 07 Apr 2022 15:37:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:organization:mime-version:content-transfer-encoding; bh=NOIZSnS98gQ3xydj16FHLPEIjDJjA+ZwlFfjRBiVUDY=; b=GRBocszBBP2qadaiErFsy187YjxqOoe+buNij90mi2kY6mLSmB6sIyWogRWnqHt1uV 0oagtutbJp6euWSc896OLrbW3/LXSj3jkXk27KbegyqrcIQfHTA+8OsbLIMbeGfI2Rm+ Zfj/oQMf3sh3PAvSQ5Fb5tQoVFWmECUPvQCrNQhS0fkJNYyo090dRwuruz11U/AK3Aet zAfWlFv0TRhUND+nXRm7pH9+2fv/rzFJ0QWvAtrCqO52NxTs2JBjlVO+ox0n72YQo7eY pSifFlVPbItHE8Gu2N+abA+R0BwcfdCoWWbcejovqYqo0G8o5+UPz5Uspa4i9W9Ltbkq W7IQ== X-Gm-Message-State: AOAM531PMVGezUSiSISN2iQvsc7lVnzhDrf03lDK6h4Nwy3udfj8bu3D diJxLGIfyO2RFgilPKa2gCAvi+wH+b4osudIltMPtN8ZkFFrCewpfc9XvjUMbGH6IGj6WlT6c9P g82z44iY30l+fWz8pIf8Pw3nbAg== X-Received: by 2002:a9d:ee7:0:b0:5cd:feb9:66b5 with SMTP id 94-20020a9d0ee7000000b005cdfeb966b5mr5515074otj.216.1649371061194; Thu, 07 Apr 2022 15:37:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxcVZwyerJlnB50z195byTw9JBG/9w1iOCvt6QyoKpKsIz/rFvJndsMgHRlm6GD1Fo6Sk8OMg== X-Received: by 2002:a9d:ee7:0:b0:5cd:feb9:66b5 with SMTP id 94-20020a9d0ee7000000b005cdfeb966b5mr5515064otj.216.1649371060962; Thu, 07 Apr 2022 15:37:40 -0700 (PDT) Received: from redhat.com ([38.15.36.239]) by smtp.gmail.com with ESMTPSA id c8-20020a4ad788000000b0031ce69b1640sm7642523oou.10.2022.04.07.15.37.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Apr 2022 15:37:40 -0700 (PDT) Date: Thu, 7 Apr 2022 16:37:37 -0600 From: Alex Williamson To: Jason Gunthorpe Cc: Robin Murphy , "Tian, Kevin" , Christoph Hellwig , Lu Baolu , Christian Benvenuti , Cornelia Huck , David Woodhouse , Gerald Schaefer , "iommu@lists.linux-foundation.org" , Jason Wang , Joerg Roedel , "kvm@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-arm-msm@vger.kernel.org" , "linux-rdma@vger.kernel.org" , "linux-s390@vger.kernel.org" , Matthew Rosato , "Michael S. Tsirkin" , Nelson Escobar , "netdev@vger.kernel.org" , Rob Clark , Suravee Suthikulpanit , "virtualization@lists.linux-foundation.org" , Will Deacon Subject: Re: [PATCH 1/5] iommu: Replace uses of IOMMU_CAP_CACHE_COHERENCY with dev_is_dma_coherent() Message-ID: <20220407163737.2a7ccd7a.alex.williamson@redhat.com> In-Reply-To: <20220407152331.GN2120790@nvidia.com> References: <20220406142432.GF2120790@nvidia.com> <20220406151823.GG2120790@nvidia.com> <20220406155056.GA30433@lst.de> <20220406160623.GI2120790@nvidia.com> <20220406161031.GA31790@lst.de> <20220406171729.GJ2120790@nvidia.com> <20220407135946.GM2120790@nvidia.com> <20220407152331.GN2120790@nvidia.com> Organization: Red Hat MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On Thu, 7 Apr 2022 12:23:31 -0300 Jason Gunthorpe wrote: > On Thu, Apr 07, 2022 at 04:17:11PM +0100, Robin Murphy wrote: > > > For the specific case of overriding PCIe No Snoop (which is more problematic > > from an Arm SMMU PoV) when assigning to a VM, would that not be easier > > solved by just having vfio-pci clear the "Enable No Snoop" control bit in > > the endpoint's PCIe capability? > > Ideally. > > That was rediscussed recently, apparently there are non-compliant > devices and drivers that just ignore the bit. > > Presumably this is why x86 had to move to an IOMMU enforced feature.. I considered this option when implementing the current solution, but ultimately I didn't have confidence in being able to prevent drivers from using device specific means to effect the change anyway. GPUs especially have various back channels to config space. Thanks, Alex From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD2D2C433EF for ; Thu, 7 Apr 2022 22:39:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qhPaAEvsCEszkiflm9Zli0OCMYWlAl7Ta/HZNCuyPgE=; b=1pU2jJ8j8/EpNf 3RU4g2jVnu5X9DOi9mDXMRD6iKR8Wb5Dml0yqSbm75HuR2NjZi206QWJAoQ5IMg8jBrJVMJVvQdjU UMGweO8I3EOONTAPN6MPNaQexKtebf0Hm3GZ+8X8j+zngo06SSgXwvZd+OSGPUDop5sW5+6WrIHnk Y0WsaK79Xwy/0S8akBMWOwKsYHlEugtS4d/YrxDLG5Jf8A8wbHsvwl5gdVg6uGD2uzJ3HujXxu2RZ bdRBppA4wuTI6L4OK+cB8ylmO/a3FrHgXwcClBkgoS/8iirkJa9lVAV2aXDfc6hgq3iqdWjXDd+z5 n2QdfCxq2irGDX18AV4Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncalE-00EFsF-Sw; Thu, 07 Apr 2022 22:37:53 +0000 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncalB-00EFq7-0r for linux-arm-kernel@lists.infradead.org; Thu, 07 Apr 2022 22:37:50 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1649371064; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NOIZSnS98gQ3xydj16FHLPEIjDJjA+ZwlFfjRBiVUDY=; b=Ufpqi9h9sFb+JOx8UKIkxqn0Qet61F8SOHh0vJ891v2iq9Quf5c8evRD75w/XaWkVoJDsJ bYj0zmQLayYIhxEsKb23N4o6pgXtTMKJDiO8+kig/FxupnZZpjYtOK2e/Wzba+M9manIYp tx9GVjCDsgDiu0SboTBPWizpKbKZvQM= Received: from mail-ot1-f71.google.com (mail-ot1-f71.google.com [209.85.210.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-359-iQVq5rpDOeSEn7DutHfiFQ-1; Thu, 07 Apr 2022 18:37:41 -0400 X-MC-Unique: iQVq5rpDOeSEn7DutHfiFQ-1 Received: by mail-ot1-f71.google.com with SMTP id d15-20020a056830044f00b005cd9d5db4d0so3478021otc.0 for ; Thu, 07 Apr 2022 15:37:41 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:in-reply-to :references:organization:mime-version:content-transfer-encoding; bh=NOIZSnS98gQ3xydj16FHLPEIjDJjA+ZwlFfjRBiVUDY=; b=oTMkrib+6QirrqGTHFXhxVwj897ii4byo/TeS7SSidFrTi6nYDamwd+F2YojMR5ayz X8djZrt3PiSPIgYeQ9qlwoPRyi8DdUX56qYl8dGDCfvXonyr3Zt4dMwBUYk44S5J1Cfz P0o7yHUFY86Fb1f4MTMXOjC3t7EWyC8GTvacbCu5Z2gTDUOHElwKCc3c6g1s/DsDai9F xMuUa05yB8IefGdot4fNExFF+HD2nSkkx4FRvNe1StDv8IRPPoyvIWN1B3xg8781vIP0 7rKu8Nzt/0xtzCuD+APp2pUi3XOX6rgPima9e93md4qw1ZfGIViBElB6lSf7N97BtcuK Yjag== X-Gm-Message-State: AOAM531silccHP/U0C4ouu1r+sLRG/hH9huUiDCXSpcqo9zn55kPhKN7 2fy8+o0v6XOJwahWG5pNGu09DiGj+Jiu9TPEXZGNEzIPPYGVMk+lMjRS7mHT5qOH4Ic0hZUs5hD 9bEFqsYAfItraKTLFQR4IPwRAu/iKNMcTtXU= X-Received: by 2002:a9d:ee7:0:b0:5cd:feb9:66b5 with SMTP id 94-20020a9d0ee7000000b005cdfeb966b5mr5515073otj.216.1649371061194; Thu, 07 Apr 2022 15:37:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxcVZwyerJlnB50z195byTw9JBG/9w1iOCvt6QyoKpKsIz/rFvJndsMgHRlm6GD1Fo6Sk8OMg== X-Received: by 2002:a9d:ee7:0:b0:5cd:feb9:66b5 with SMTP id 94-20020a9d0ee7000000b005cdfeb966b5mr5515064otj.216.1649371060962; Thu, 07 Apr 2022 15:37:40 -0700 (PDT) Received: from redhat.com ([38.15.36.239]) by smtp.gmail.com with ESMTPSA id c8-20020a4ad788000000b0031ce69b1640sm7642523oou.10.2022.04.07.15.37.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Apr 2022 15:37:40 -0700 (PDT) Date: Thu, 7 Apr 2022 16:37:37 -0600 From: Alex Williamson To: Jason Gunthorpe Cc: Robin Murphy , "Tian, Kevin" , Christoph Hellwig , Lu Baolu , Christian Benvenuti , Cornelia Huck , David Woodhouse , Gerald Schaefer , "iommu@lists.linux-foundation.org" , Jason Wang , Joerg Roedel , "kvm@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-arm-msm@vger.kernel.org" , "linux-rdma@vger.kernel.org" , "linux-s390@vger.kernel.org" , Matthew Rosato , "Michael S. Tsirkin" , Nelson Escobar , "netdev@vger.kernel.org" , Rob Clark , Suravee Suthikulpanit , "virtualization@lists.linux-foundation.org" , Will Deacon Subject: Re: [PATCH 1/5] iommu: Replace uses of IOMMU_CAP_CACHE_COHERENCY with dev_is_dma_coherent() Message-ID: <20220407163737.2a7ccd7a.alex.williamson@redhat.com> In-Reply-To: <20220407152331.GN2120790@nvidia.com> References: <20220406142432.GF2120790@nvidia.com> <20220406151823.GG2120790@nvidia.com> <20220406155056.GA30433@lst.de> <20220406160623.GI2120790@nvidia.com> <20220406161031.GA31790@lst.de> <20220406171729.GJ2120790@nvidia.com> <20220407135946.GM2120790@nvidia.com> <20220407152331.GN2120790@nvidia.com> Organization: Red Hat MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=alex.williamson@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220407_153749_440572_CC4A8F7C X-CRM114-Status: GOOD ( 16.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 7 Apr 2022 12:23:31 -0300 Jason Gunthorpe wrote: > On Thu, Apr 07, 2022 at 04:17:11PM +0100, Robin Murphy wrote: > > > For the specific case of overriding PCIe No Snoop (which is more problematic > > from an Arm SMMU PoV) when assigning to a VM, would that not be easier > > solved by just having vfio-pci clear the "Enable No Snoop" control bit in > > the endpoint's PCIe capability? > > Ideally. > > That was rediscussed recently, apparently there are non-compliant > devices and drivers that just ignore the bit. > > Presumably this is why x86 had to move to an IOMMU enforced feature.. I considered this option when implementing the current solution, but ultimately I didn't have confidence in being able to prevent drivers from using device specific means to effect the change anyway. GPUs especially have various back channels to config space. Thanks, Alex _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel