From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AE78C433F5 for ; Fri, 8 Apr 2022 05:23:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234719AbiDHFZg (ORCPT ); Fri, 8 Apr 2022 01:25:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234703AbiDHFZS (ORCPT ); Fri, 8 Apr 2022 01:25:18 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9D95121095; Thu, 7 Apr 2022 22:23:12 -0700 (PDT) X-UUID: 3f3ac99e33e446789797ede4e8c1b001-20220408 X-UUID: 3f3ac99e33e446789797ede4e8c1b001-20220408 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1108855838; Fri, 08 Apr 2022 13:23:07 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 8 Apr 2022 13:23:05 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 8 Apr 2022 13:23:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 8 Apr 2022 13:23:05 +0800 From: Johnson Wang To: , , , CC: , , , , , , , , Johnson Wang Subject: [PATCH v2 1/2] dt-bindings: devfreq: mediatek: Add mtk cci devfreq dt-bindings Date: Fri, 8 Apr 2022 13:21:49 +0800 Message-ID: <20220408052150.22536-2-johnson.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220408052150.22536-1-johnson.wang@mediatek.com> References: <20220408052150.22536-1-johnson.wang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add devicetree binding of mtk cci devfreq on MediaTek SoC. Signed-off-by: Johnson Wang Signed-off-by: Jia-Wei Chang --- .../devicetree/bindings/devfreq/mtk-cci.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/mtk-cci.yaml diff --git a/Documentation/devicetree/bindings/devfreq/mtk-cci.yaml b/Documentation/devicetree/bindings/devfreq/mtk-cci.yaml new file mode 100644 index 000000000000..ef4ea951025c --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/mtk-cci.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/devfreq/mtk-cci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Cache Coherent Interconnect (CCI) frequency and voltage scaling + +maintainers: + - Jia-Wei Chang + +description: | + MediaTek Cache Coherent Interconnect (CCI) uses the software devfreq module + to scale the clock frequency and adjust the voltage. MediaTek CCI shares + the same power supplies with CPU, so the scheduling involves with CPUfreq. + +properties: + compatible: + enum: + - mediatek,mt8183-cci + - mediatek,mt8186-cci + + clocks: + items: + - description: + The multiplexer for clock input of CPU cluster. + - description: + A parent of "cpu" clock which is used as an intermediate clock source + when the original CPU is under transition and not stable yet. + + clock-names: + items: + - const: cci + - const: intermediate + + operating-points-v2: + description: + For details, please refer to + Documentation/devicetree/bindings/opp/opp-v2.yaml + + proc-supply: + description: + Phandle of the regulator for CCI that provides the supply voltage. + + sram-supply: + description: + Phandle of the regulator for sram of CCI that provides the supply + voltage. When it presents, the cci devfreq driver needs to do + "voltage tracking" to step by step scale up/down Vproc and Vsram to fit + SoC specific needs. When absent, the voltage scaling flow is handled by + hardware, hence no software "voltage tracking" is needed. + +required: + - compatible + - clocks + - clock-names + - operating-points-v2 + - proc-supply + +additionalProperties: false + +examples: + - | + #include + cci: cci { + compatible = "mediatek,mt8183-cci"; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; + clock-names = "cci", "intermediate"; + operating-points-v2 = <&cci_opp>; + proc-supply = <&mt6358_vproc12_reg>; + }; -- 2.18.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 97345C433F5 for ; Fri, 8 Apr 2022 05:23:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tUxlHD+a1J8sBI7vgDjPGHHXUtrSDGBz1FB6UP61BtE=; b=kIoWLWx6HkI9yf LXXAjs/OqTVuhClez9e2aERhOLKfRyZw8PghSk9Ujk/uHMFJtwPDz2nsb2J9Av0gl3M46YNsRJ8ru Z31tRCigDAiTlcfe18Q8xWPI4F0sT3RzSpaZwqzrZhGZreNkmhUuEn0IBBZoDLOrZELtHdy85RROZ MVOAKvewCkVwKNKvs+VFZaDZFEFSh7xtaRnxosNV1+xWXzLW8UaZVeRPlbWseq7r1WYYmKbwYMbS4 OUMT7lH58Blv+8PPx85rT5wbiirfmJ+N1jNWYGr/btg0xgCo++WgBPDHcL/nU7KGRw6BFDtQil32n ybjhovsqlS/RtFg9twaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nch5Y-00F7lB-SD; Fri, 08 Apr 2022 05:23:16 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nch5V-00F7k3-Ji; Fri, 08 Apr 2022 05:23:15 +0000 X-UUID: 5536329c1a7e4cab97c059558f428ae6-20220407 X-UUID: 5536329c1a7e4cab97c059558f428ae6-20220407 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1591556801; Thu, 07 Apr 2022 22:23:09 -0700 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 7 Apr 2022 22:23:07 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 8 Apr 2022 13:23:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 8 Apr 2022 13:23:05 +0800 From: Johnson Wang To: , , , CC: , , , , , , , , Johnson Wang Subject: [PATCH v2 1/2] dt-bindings: devfreq: mediatek: Add mtk cci devfreq dt-bindings Date: Fri, 8 Apr 2022 13:21:49 +0800 Message-ID: <20220408052150.22536-2-johnson.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220408052150.22536-1-johnson.wang@mediatek.com> References: <20220408052150.22536-1-johnson.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220407_222313_687605_97CB310B X-CRM114-Status: GOOD ( 13.89 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add devicetree binding of mtk cci devfreq on MediaTek SoC. Signed-off-by: Johnson Wang Signed-off-by: Jia-Wei Chang --- .../devicetree/bindings/devfreq/mtk-cci.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/mtk-cci.yaml diff --git a/Documentation/devicetree/bindings/devfreq/mtk-cci.yaml b/Documentation/devicetree/bindings/devfreq/mtk-cci.yaml new file mode 100644 index 000000000000..ef4ea951025c --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/mtk-cci.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/devfreq/mtk-cci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Cache Coherent Interconnect (CCI) frequency and voltage scaling + +maintainers: + - Jia-Wei Chang + +description: | + MediaTek Cache Coherent Interconnect (CCI) uses the software devfreq module + to scale the clock frequency and adjust the voltage. MediaTek CCI shares + the same power supplies with CPU, so the scheduling involves with CPUfreq. + +properties: + compatible: + enum: + - mediatek,mt8183-cci + - mediatek,mt8186-cci + + clocks: + items: + - description: + The multiplexer for clock input of CPU cluster. + - description: + A parent of "cpu" clock which is used as an intermediate clock source + when the original CPU is under transition and not stable yet. + + clock-names: + items: + - const: cci + - const: intermediate + + operating-points-v2: + description: + For details, please refer to + Documentation/devicetree/bindings/opp/opp-v2.yaml + + proc-supply: + description: + Phandle of the regulator for CCI that provides the supply voltage. + + sram-supply: + description: + Phandle of the regulator for sram of CCI that provides the supply + voltage. When it presents, the cci devfreq driver needs to do + "voltage tracking" to step by step scale up/down Vproc and Vsram to fit + SoC specific needs. When absent, the voltage scaling flow is handled by + hardware, hence no software "voltage tracking" is needed. + +required: + - compatible + - clocks + - clock-names + - operating-points-v2 + - proc-supply + +additionalProperties: false + +examples: + - | + #include + cci: cci { + compatible = "mediatek,mt8183-cci"; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; + clock-names = "cci", "intermediate"; + operating-points-v2 = <&cci_opp>; + proc-supply = <&mt6358_vproc12_reg>; + }; -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C28FDC433EF for ; Fri, 8 Apr 2022 05:24:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=K6lmN0ityZqi+1FnsHjADZA7MFhCqF9rLA6pgUtrU7A=; b=Ms7bpM6k4paQtv CuiIwwQSJC90zYdY/2yE2V57Mgfkn/iUE5L/YAlq0pYCalwcRjcjc5Gt7vjxdBHtPez7hpMpQFVhY tWaIafj2K4RjgJEViTkPrHf9RYVfiYUrhB3tOhXQvrphliFgbVLueFXjZlkYOKFh12g6+PEucg4qi C+AQrGhaIKx1V2zEOsYUBK1lI9DaW8L5T2oJPmZXa4E7RcNyzfwKeZfa4uC7r4uj5Ow36kswGaIae YxHiAYtbNpdSEn0HBoogFt2+I4/osfJpk0UVPx9wLYPv7/TKUkL9TrFUqK9kzKM1CqZuktR703Htx G83ZCaZRCblRdgE1lqmw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nch5Z-00F7lI-UP; Fri, 08 Apr 2022 05:23:18 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nch5V-00F7k3-Ji; Fri, 08 Apr 2022 05:23:15 +0000 X-UUID: 5536329c1a7e4cab97c059558f428ae6-20220407 X-UUID: 5536329c1a7e4cab97c059558f428ae6-20220407 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1591556801; Thu, 07 Apr 2022 22:23:09 -0700 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 7 Apr 2022 22:23:07 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 8 Apr 2022 13:23:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 8 Apr 2022 13:23:05 +0800 From: Johnson Wang To: , , , CC: , , , , , , , , Johnson Wang Subject: [PATCH v2 1/2] dt-bindings: devfreq: mediatek: Add mtk cci devfreq dt-bindings Date: Fri, 8 Apr 2022 13:21:49 +0800 Message-ID: <20220408052150.22536-2-johnson.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220408052150.22536-1-johnson.wang@mediatek.com> References: <20220408052150.22536-1-johnson.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220407_222313_687605_97CB310B X-CRM114-Status: GOOD ( 13.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add devicetree binding of mtk cci devfreq on MediaTek SoC. Signed-off-by: Johnson Wang Signed-off-by: Jia-Wei Chang --- .../devicetree/bindings/devfreq/mtk-cci.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/devfreq/mtk-cci.yaml diff --git a/Documentation/devicetree/bindings/devfreq/mtk-cci.yaml b/Documentation/devicetree/bindings/devfreq/mtk-cci.yaml new file mode 100644 index 000000000000..ef4ea951025c --- /dev/null +++ b/Documentation/devicetree/bindings/devfreq/mtk-cci.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/devfreq/mtk-cci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Cache Coherent Interconnect (CCI) frequency and voltage scaling + +maintainers: + - Jia-Wei Chang + +description: | + MediaTek Cache Coherent Interconnect (CCI) uses the software devfreq module + to scale the clock frequency and adjust the voltage. MediaTek CCI shares + the same power supplies with CPU, so the scheduling involves with CPUfreq. + +properties: + compatible: + enum: + - mediatek,mt8183-cci + - mediatek,mt8186-cci + + clocks: + items: + - description: + The multiplexer for clock input of CPU cluster. + - description: + A parent of "cpu" clock which is used as an intermediate clock source + when the original CPU is under transition and not stable yet. + + clock-names: + items: + - const: cci + - const: intermediate + + operating-points-v2: + description: + For details, please refer to + Documentation/devicetree/bindings/opp/opp-v2.yaml + + proc-supply: + description: + Phandle of the regulator for CCI that provides the supply voltage. + + sram-supply: + description: + Phandle of the regulator for sram of CCI that provides the supply + voltage. When it presents, the cci devfreq driver needs to do + "voltage tracking" to step by step scale up/down Vproc and Vsram to fit + SoC specific needs. When absent, the voltage scaling flow is handled by + hardware, hence no software "voltage tracking" is needed. + +required: + - compatible + - clocks + - clock-names + - operating-points-v2 + - proc-supply + +additionalProperties: false + +examples: + - | + #include + cci: cci { + compatible = "mediatek,mt8183-cci"; + clocks = <&mcucfg CLK_MCU_BUS_SEL>, + <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; + clock-names = "cci", "intermediate"; + operating-points-v2 = <&cci_opp>; + proc-supply = <&mt6358_vproc12_reg>; + }; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel