From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4B58C433F5 for ; Mon, 11 Apr 2022 10:54:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345790AbiDKK5E (ORCPT ); Mon, 11 Apr 2022 06:57:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345758AbiDKK41 (ORCPT ); Mon, 11 Apr 2022 06:56:27 -0400 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.220.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71D82C79; Mon, 11 Apr 2022 03:54:10 -0700 (PDT) Received: from relay2.suse.de (relay2.suse.de [149.44.160.134]) by smtp-out1.suse.de (Postfix) with ESMTP id 21ED0215FD; Mon, 11 Apr 2022 10:54:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.cz; s=susede2_rsa; t=1649674449; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=r49EueKp2Br8vDmcdTb/MEqeUHETgXaKsz+9XB5AYis=; b=1rqsZFfK3No3fmZqQiaAOHqUkKubSrXN+R9BZLf2QB7iTkcHXVOc+Du1Zx9CgSUAbBI31c dxL2joIscXLjkj2NCfHU+b0lCDavkI9dUy7Wd8riU9PsPLPKpSi9UeDfs50Fi1GLI6Sgys R+h2xWrTU0Sm0S8TkyF5oyKNYpe1uw0= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.cz; s=susede2_ed25519; t=1649674449; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=r49EueKp2Br8vDmcdTb/MEqeUHETgXaKsz+9XB5AYis=; b=+9UGdV6/Obkk/sp514m0mryoV6fFb/rJytQNc3etkkrOok/mDC1AYpHErvGI3CEaEat8xK mXTHkPua1zekONAg== Received: from localhost.localdomain (unknown [10.100.208.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by relay2.suse.de (Postfix) with ESMTPS id 8E034A3B89; Mon, 11 Apr 2022 10:54:08 +0000 (UTC) From: Jiri Slaby To: gregkh@linuxfoundation.org Cc: linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, Jiri Slaby , Russell King , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, =?UTF-8?q?Pali=20Roh=C3=A1r?= , Kevin Cernekee , Palmer Dabbelt , Paul Walmsley , Orson Zhai , Baolin Wang , Chunyan Zhang , Patrice Chotard , linux-riscv@lists.infradead.org Subject: [PATCH 3/3] tty: serial: use uart_port_tx_limit() helper Date: Mon, 11 Apr 2022 12:54:05 +0200 Message-Id: <20220411105405.9519-4-jslaby@suse.cz> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220411105405.9519-1-jslaby@suse.cz> References: <20220411105405.9519-1-jslaby@suse.cz> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org uart_port_tx_limit() is a new helper to send characters to the device. Use it in these drivers. It means we have to define two new uart hooks: tx_ready() and put_char() to do the real job now. And mux.c also needs to define tx_done(). But I'm not sure if the driver really wants to wait for all the characters to dismiss from the HW fifo at this code point. Hence I marked this as FIXME. Signed-off-by: Jiri Slaby Cc: Russell King Cc: Florian Fainelli Cc: bcm-kernel-feedback-list@broadcom.com Cc: "Pali Rohár" Cc: Kevin Cernekee Cc: Palmer Dabbelt Cc: Paul Walmsley Cc: Orson Zhai Cc: Baolin Wang Cc: Chunyan Zhang Cc: Patrice Chotard Cc: linux-riscv@lists.infradead.org --- drivers/tty/serial/21285.c | 40 +++++++-------------- drivers/tty/serial/altera_jtaguart.c | 43 ++++++---------------- drivers/tty/serial/amba-pl010.c | 40 ++++----------------- drivers/tty/serial/apbuart.c | 37 ++++--------------- drivers/tty/serial/bcm63xx_uart.c | 48 ++++++------------------- drivers/tty/serial/mux.c | 48 ++++++++----------------- drivers/tty/serial/mvebu-uart.c | 47 +++++++----------------- drivers/tty/serial/omap-serial.c | 53 +++++++--------------------- drivers/tty/serial/pxa.c | 43 +++++----------------- drivers/tty/serial/rp2.c | 36 ++++++------------- drivers/tty/serial/serial_txx9.c | 40 ++++----------------- drivers/tty/serial/sifive.c | 48 ++++--------------------- drivers/tty/serial/sprd_serial.c | 41 ++++----------------- drivers/tty/serial/st-asc.c | 51 ++++---------------------- drivers/tty/serial/vr41xx_siu.c | 42 ++++------------------ 15 files changed, 143 insertions(+), 514 deletions(-) diff --git a/drivers/tty/serial/21285.c b/drivers/tty/serial/21285.c index 7520cc02fd4d..12d9bdcd67b8 100644 --- a/drivers/tty/serial/21285.c +++ b/drivers/tty/serial/21285.c @@ -154,35 +154,9 @@ static irqreturn_t serial21285_rx_chars(int irq, void *dev_id) static irqreturn_t serial21285_tx_chars(int irq, void *dev_id) { struct uart_port *port = dev_id; - struct circ_buf *xmit = &port->state->xmit; - int count = 256; - - if (port->x_char) { - *CSR_UARTDR = port->x_char; - port->icount.tx++; - port->x_char = 0; - goto out; - } - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - serial21285_stop_tx(port); - goto out; - } - - do { - *CSR_UARTDR = xmit->buf[xmit->tail]; - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - if (uart_circ_empty(xmit)) - break; - } while (--count > 0 && !(*CSR_UARTFLG & 0x20)); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - if (uart_circ_empty(xmit)) - serial21285_stop_tx(port); + uart_port_tx_limit(port, 256); - out: return IRQ_HANDLED; } @@ -191,6 +165,16 @@ static unsigned int serial21285_tx_empty(struct uart_port *port) return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT; } +static bool serial21285_uart_tx_ready(struct uart_port *port) +{ + return !(*CSR_UARTFLG & 0x20); +} + +static void serial21285_put_char(struct uart_port *port, unsigned char ch) +{ + *CSR_UARTDR = ch; +} + /* no modem control lines */ static unsigned int serial21285_get_mctrl(struct uart_port *port) { @@ -372,6 +356,8 @@ static int serial21285_verify_port(struct uart_port *port, struct serial_struct static const struct uart_ops serial21285_ops = { .tx_empty = serial21285_tx_empty, + .tx_ready = serial21285_uart_tx_ready, + .put_char = serial21285_put_char, .get_mctrl = serial21285_get_mctrl, .set_mctrl = serial21285_set_mctrl, .stop_tx = serial21285_stop_tx, diff --git a/drivers/tty/serial/altera_jtaguart.c b/drivers/tty/serial/altera_jtaguart.c index cb791c5149a3..144cb4ab337b 100644 --- a/drivers/tty/serial/altera_jtaguart.c +++ b/drivers/tty/serial/altera_jtaguart.c @@ -65,6 +65,11 @@ static unsigned int altera_jtaguart_tx_empty(struct uart_port *port) ALTERA_JTAGUART_CONTROL_WSPACE_MSK) ? TIOCSER_TEMT : 0; } +static void altera_jtaguart_put_char(struct uart_port *port, unsigned char ch) +{ + writel(ch, port->membase + ALTERA_JTAGUART_DATA_REG); +} + static unsigned int altera_jtaguart_get_mctrl(struct uart_port *port) { return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; @@ -137,39 +142,12 @@ static void altera_jtaguart_rx_chars(struct altera_jtaguart *pp) static void altera_jtaguart_tx_chars(struct altera_jtaguart *pp) { struct uart_port *port = &pp->port; - struct circ_buf *xmit = &port->state->xmit; - unsigned int pending, count; - - if (port->x_char) { - /* Send special char - probably flow control */ - writel(port->x_char, port->membase + ALTERA_JTAGUART_DATA_REG); - port->x_char = 0; - port->icount.tx++; - return; - } - - pending = uart_circ_chars_pending(xmit); - if (pending > 0) { - count = (readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) & - ALTERA_JTAGUART_CONTROL_WSPACE_MSK) >> - ALTERA_JTAGUART_CONTROL_WSPACE_OFF; - if (count > pending) - count = pending; - if (count > 0) { - pending -= count; - while (count--) { - writel(xmit->buf[xmit->tail], - port->membase + ALTERA_JTAGUART_DATA_REG); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - } - if (pending < WAKEUP_CHARS) - uart_write_wakeup(port); - } - } + unsigned int space; - if (pending == 0) - altera_jtaguart_stop_tx(port); + space = (readl(port->membase + ALTERA_JTAGUART_CONTROL_REG) & + ALTERA_JTAGUART_CONTROL_WSPACE_MSK) >> + ALTERA_JTAGUART_CONTROL_WSPACE_OFF; + uart_port_tx_limit(port, space); } static irqreturn_t altera_jtaguart_interrupt(int irq, void *data) @@ -274,6 +252,7 @@ static int altera_jtaguart_verify_port(struct uart_port *port, */ static const struct uart_ops altera_jtaguart_ops = { .tx_empty = altera_jtaguart_tx_empty, + .put_char = altera_jtaguart_put_char, .get_mctrl = altera_jtaguart_get_mctrl, .set_mctrl = altera_jtaguart_set_mctrl, .start_tx = altera_jtaguart_start_tx, diff --git a/drivers/tty/serial/amba-pl010.c b/drivers/tty/serial/amba-pl010.c index fae0b581ff42..1d73e1ba318b 100644 --- a/drivers/tty/serial/amba-pl010.c +++ b/drivers/tty/serial/amba-pl010.c @@ -162,38 +162,6 @@ static void pl010_rx_chars(struct uart_port *port) tty_flip_buffer_push(&port->state->port); } -static void pl010_tx_chars(struct uart_port *port) -{ - struct circ_buf *xmit = &port->state->xmit; - int count; - - if (port->x_char) { - writel(port->x_char, port->membase + UART01x_DR); - port->icount.tx++; - port->x_char = 0; - return; - } - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - pl010_stop_tx(port); - return; - } - - count = port->fifosize >> 1; - do { - writel(xmit->buf[xmit->tail], port->membase + UART01x_DR); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - if (uart_circ_empty(xmit)) - break; - } while (--count > 0); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - pl010_stop_tx(port); -} - static void pl010_modem_status(struct uart_amba_port *uap) { struct uart_port *port = &uap->port; @@ -238,7 +206,7 @@ static irqreturn_t pl010_int(int irq, void *dev_id) if (status & UART010_IIR_MIS) pl010_modem_status(uap); if (status & UART010_IIR_TIS) - pl010_tx_chars(port); + uart_port_tx_limit(port, port->fifosize >> 1); if (pass_counter-- == 0) break; @@ -261,6 +229,11 @@ static unsigned int pl010_tx_empty(struct uart_port *port) return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; } +static void pl010_put_char(struct uart_port *port, unsigned char ch) +{ + writel(ch, port->membase + UART01x_DR); +} + static unsigned int pl010_get_mctrl(struct uart_port *port) { unsigned int result = 0; @@ -529,6 +502,7 @@ static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser) static const struct uart_ops amba_pl010_pops = { .tx_empty = pl010_tx_empty, + .put_char = pl010_put_char, .set_mctrl = pl010_set_mctrl, .get_mctrl = pl010_get_mctrl, .stop_tx = pl010_stop_tx, diff --git a/drivers/tty/serial/apbuart.c b/drivers/tty/serial/apbuart.c index 9ef82d870ff2..a31bd5849c76 100644 --- a/drivers/tty/serial/apbuart.c +++ b/drivers/tty/serial/apbuart.c @@ -122,36 +122,7 @@ static void apbuart_rx_chars(struct uart_port *port) static void apbuart_tx_chars(struct uart_port *port) { - struct circ_buf *xmit = &port->state->xmit; - int count; - - if (port->x_char) { - UART_PUT_CHAR(port, port->x_char); - port->icount.tx++; - port->x_char = 0; - return; - } - - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - apbuart_stop_tx(port); - return; - } - - /* amba: fill FIFO */ - count = port->fifosize >> 1; - do { - UART_PUT_CHAR(port, xmit->buf[xmit->tail]); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - if (uart_circ_empty(xmit)) - break; - } while (--count > 0); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - apbuart_stop_tx(port); + uart_port_tx_limit(port, port->fifosize >> 1); } static irqreturn_t apbuart_int(int irq, void *dev_id) @@ -178,6 +149,11 @@ static unsigned int apbuart_tx_empty(struct uart_port *port) return status & UART_STATUS_THE ? TIOCSER_TEMT : 0; } +static void apbuart_put_char(struct uart_port *port, unsigned char ch) +{ + UART_PUT_CHAR(port, ch); +} + static unsigned int apbuart_get_mctrl(struct uart_port *port) { /* The GRLIB APBUART handles flow control in hardware */ @@ -322,6 +298,7 @@ static int apbuart_verify_port(struct uart_port *port, static const struct uart_ops grlib_apbuart_ops = { .tx_empty = apbuart_tx_empty, + .put_char = apbuart_put_char, .set_mctrl = apbuart_set_mctrl, .get_mctrl = apbuart_get_mctrl, .stop_tx = apbuart_stop_tx, diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c index 53b43174aa40..29f31286ff54 100644 --- a/drivers/tty/serial/bcm63xx_uart.c +++ b/drivers/tty/serial/bcm63xx_uart.c @@ -93,6 +93,11 @@ static unsigned int bcm_uart_tx_empty(struct uart_port *port) return (val & UART_IR_STAT(UART_IR_TXEMPTY)) ? 1 : 0; } +static void bcm_uart_put_char(struct uart_port *port, unsigned char ch) +{ + bcm_uart_writel(port, ch, UART_FIFO_REG); +} + /* * serial core request to set RTS and DTR pin state and loopback mode */ @@ -303,53 +308,19 @@ static void bcm_uart_do_rx(struct uart_port *port) */ static void bcm_uart_do_tx(struct uart_port *port) { - struct circ_buf *xmit; - unsigned int val, max_count; - - if (port->x_char) { - bcm_uart_writel(port, port->x_char, UART_FIFO_REG); - port->icount.tx++; - port->x_char = 0; - return; - } - - if (uart_tx_stopped(port)) { - bcm_uart_stop_tx(port); - return; - } - - xmit = &port->state->xmit; - if (uart_circ_empty(xmit)) - goto txq_empty; + unsigned int val, pending; val = bcm_uart_readl(port, UART_MCTL_REG); val = (val & UART_MCTL_TXFIFOFILL_MASK) >> UART_MCTL_TXFIFOFILL_SHIFT; - max_count = port->fifosize - val; - - while (max_count--) { - unsigned int c; - - c = xmit->buf[xmit->tail]; - bcm_uart_writel(port, c, UART_FIFO_REG); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - if (uart_circ_empty(xmit)) - break; - } - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - goto txq_empty; - return; + pending = uart_port_tx_limit(port, port->fifosize - val); + if (pending) + return; -txq_empty: /* nothing to send, disable transmit interrupt */ val = bcm_uart_readl(port, UART_IR_REG); val &= ~UART_TX_INT_MASK; bcm_uart_writel(port, val, UART_IR_REG); - return; } /* @@ -629,6 +600,7 @@ static int bcm_uart_verify_port(struct uart_port *port, /* serial core callbacks */ static const struct uart_ops bcm_uart_ops = { .tx_empty = bcm_uart_tx_empty, + .put_char = bcm_uart_put_char, .get_mctrl = bcm_uart_get_mctrl, .set_mctrl = bcm_uart_set_mctrl, .start_tx = bcm_uart_start_tx, diff --git a/drivers/tty/serial/mux.c b/drivers/tty/serial/mux.c index 643dfbcc43f9..e86718788b49 100644 --- a/drivers/tty/serial/mux.c +++ b/drivers/tty/serial/mux.c @@ -106,6 +106,18 @@ static unsigned int mux_tx_empty(struct uart_port *port) return UART_GET_FIFO_CNT(port) ? 0 : TIOCSER_TEMT; } +static void mux_put_char(struct uart_port *port, unsigned char ch) +{ + UART_PUT_CHAR(port, ch); +} + +static void mux_tx_done(struct uart_port *port) +{ + /* FIXME js: really needs to wait? */ + while (UART_GET_FIFO_CNT(port)) + udelay(1); +} + /** * mux_set_mctrl - Set the current state of the modem control inputs. * @ports: Ptr to the uart_port. @@ -180,39 +192,7 @@ static void mux_break_ctl(struct uart_port *port, int break_state) */ static void mux_write(struct uart_port *port) { - int count; - struct circ_buf *xmit = &port->state->xmit; - - if(port->x_char) { - UART_PUT_CHAR(port, port->x_char); - port->icount.tx++; - port->x_char = 0; - return; - } - - if(uart_circ_empty(xmit) || uart_tx_stopped(port)) { - mux_stop_tx(port); - return; - } - - count = (port->fifosize) - UART_GET_FIFO_CNT(port); - do { - UART_PUT_CHAR(port, xmit->buf[xmit->tail]); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - if(uart_circ_empty(xmit)) - break; - - } while(--count > 0); - - while(UART_GET_FIFO_CNT(port)) - udelay(1); - - if(uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - mux_stop_tx(port); + uart_port_tx_limit(port, port->fifosize - UART_GET_FIFO_CNT(port)); } /** @@ -421,6 +401,8 @@ static struct console mux_console = { static const struct uart_ops mux_pops = { .tx_empty = mux_tx_empty, + .put_char = mux_put_char, + .tx_done = mux_tx_done, .set_mctrl = mux_set_mctrl, .get_mctrl = mux_get_mctrl, .stop_tx = mux_stop_tx, diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c index 0429c2a54290..3d07ab9eb15e 100644 --- a/drivers/tty/serial/mvebu-uart.c +++ b/drivers/tty/serial/mvebu-uart.c @@ -194,6 +194,16 @@ static unsigned int mvebu_uart_tx_empty(struct uart_port *port) return (st & STAT_TX_EMP) ? TIOCSER_TEMT : 0; } +static bool mvebu_uart_tx_ready(struct uart_port *port) +{ + return !(readl(port->membase + UART_STAT) & STAT_TX_FIFO_FUL); +} + +static void mvebu_uart_put_char(struct uart_port *port, unsigned char ch) +{ + writel(ch, port->membase + UART_TSH(port)); +} + static unsigned int mvebu_uart_get_mctrl(struct uart_port *port) { return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; @@ -324,40 +334,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status) static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status) { - struct circ_buf *xmit = &port->state->xmit; - unsigned int count; - unsigned int st; - - if (port->x_char) { - writel(port->x_char, port->membase + UART_TSH(port)); - port->icount.tx++; - port->x_char = 0; - return; - } - - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - mvebu_uart_stop_tx(port); - return; - } - - for (count = 0; count < port->fifosize; count++) { - writel(xmit->buf[xmit->tail], port->membase + UART_TSH(port)); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - - if (uart_circ_empty(xmit)) - break; - - st = readl(port->membase + UART_STAT); - if (st & STAT_TX_FIFO_FUL) - break; - } - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - mvebu_uart_stop_tx(port); + uart_port_tx_limit(port, port->fifosize); } static irqreturn_t mvebu_uart_isr(int irq, void *dev_id) @@ -654,6 +631,8 @@ static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c) static const struct uart_ops mvebu_uart_ops = { .tx_empty = mvebu_uart_tx_empty, + .tx_ready = mvebu_uart_tx_ready, + .put_char = mvebu_uart_put_char, .set_mctrl = mvebu_uart_set_mctrl, .get_mctrl = mvebu_uart_get_mctrl, .stop_tx = mvebu_uart_stop_tx, diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 8d5ffa196097..a6446bef49f1 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -336,45 +336,6 @@ static void serial_omap_stop_rx(struct uart_port *port) serial_out(up, UART_IER, up->ier); } -static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) -{ - struct circ_buf *xmit = &up->port.state->xmit; - int count; - - if (up->port.x_char) { - serial_out(up, UART_TX, up->port.x_char); - up->port.icount.tx++; - up->port.x_char = 0; - if ((up->port.rs485.flags & SER_RS485_ENABLED) && - !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) - up->rs485_tx_filter_count++; - - return; - } - if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { - serial_omap_stop_tx(&up->port); - return; - } - count = up->port.fifosize / 4; - do { - serial_out(up, UART_TX, xmit->buf[xmit->tail]); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - up->port.icount.tx++; - if ((up->port.rs485.flags & SER_RS485_ENABLED) && - !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) - up->rs485_tx_filter_count++; - - if (uart_circ_empty(xmit)) - break; - } while (--count > 0); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(&up->port); - - if (uart_circ_empty(xmit)) - serial_omap_stop_tx(&up->port); -} - static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) { if (!(up->ier & UART_IER_THRI)) { @@ -572,7 +533,7 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id) check_modem_status(up); break; case UART_IIR_THRI: - transmit_chars(up, lsr); + uart_port_tx_limit(&up->port, up->port.fifosize / 4); break; case UART_IIR_RX_TIMEOUT: case UART_IIR_RDI: @@ -613,6 +574,17 @@ static unsigned int serial_omap_tx_empty(struct uart_port *port) return ret; } +static void serial_omap_put_char(struct uart_port *port, unsigned char ch) +{ + struct uart_omap_port *up = to_uart_omap_port(port); + + serial_out(up, UART_TX, ch); + + if ((up->port.rs485.flags & SER_RS485_ENABLED) && + !(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) + up->rs485_tx_filter_count++; +} + static unsigned int serial_omap_get_mctrl(struct uart_port *port) { struct uart_omap_port *up = to_uart_omap_port(port); @@ -1369,6 +1341,7 @@ serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485) static const struct uart_ops serial_omap_pops = { .tx_empty = serial_omap_tx_empty, + .put_char = serial_omap_put_char, .set_mctrl = serial_omap_set_mctrl, .get_mctrl = serial_omap_get_mctrl, .stop_tx = serial_omap_stop_tx, diff --git a/drivers/tty/serial/pxa.c b/drivers/tty/serial/pxa.c index e80ba8e10407..182bf2de5e29 100644 --- a/drivers/tty/serial/pxa.c +++ b/drivers/tty/serial/pxa.c @@ -171,39 +171,6 @@ static inline void receive_chars(struct uart_pxa_port *up, int *status) serial_out(up, UART_IER, up->ier); } -static void transmit_chars(struct uart_pxa_port *up) -{ - struct circ_buf *xmit = &up->port.state->xmit; - int count; - - if (up->port.x_char) { - serial_out(up, UART_TX, up->port.x_char); - up->port.icount.tx++; - up->port.x_char = 0; - return; - } - if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { - serial_pxa_stop_tx(&up->port); - return; - } - - count = up->port.fifosize / 2; - do { - serial_out(up, UART_TX, xmit->buf[xmit->tail]); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - up->port.icount.tx++; - if (uart_circ_empty(xmit)) - break; - } while (--count > 0); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(&up->port); - - - if (uart_circ_empty(xmit)) - serial_pxa_stop_tx(&up->port); -} - static void serial_pxa_start_tx(struct uart_port *port) { struct uart_pxa_port *up = (struct uart_pxa_port *)port; @@ -253,7 +220,7 @@ static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id) receive_chars(up, &lsr); check_modem_status(up); if (lsr & UART_LSR_THRE) - transmit_chars(up); + uart_port_tx_limit(&up->port, up->port.fifosize / 2); spin_unlock(&up->port.lock); return IRQ_HANDLED; } @@ -271,6 +238,13 @@ static unsigned int serial_pxa_tx_empty(struct uart_port *port) return ret; } +static void serial_pxa_put_char(struct uart_port *port, unsigned char ch) +{ + struct uart_pxa_port *up = (struct uart_pxa_port *)port; + + serial_out(up, UART_TX, ch); +} + static unsigned int serial_pxa_get_mctrl(struct uart_port *port) { struct uart_pxa_port *up = (struct uart_pxa_port *)port; @@ -742,6 +716,7 @@ static struct console serial_pxa_console = { static const struct uart_ops serial_pxa_pops = { .tx_empty = serial_pxa_tx_empty, + .put_char = serial_pxa_put_char, .set_mctrl = serial_pxa_set_mctrl, .get_mctrl = serial_pxa_get_mctrl, .stop_tx = serial_pxa_stop_tx, diff --git a/drivers/tty/serial/rp2.c b/drivers/tty/serial/rp2.c index 6689d8add8f7..18725fe9028c 100644 --- a/drivers/tty/serial/rp2.c +++ b/drivers/tty/serial/rp2.c @@ -283,6 +283,13 @@ static unsigned int rp2_uart_tx_empty(struct uart_port *port) return tx_fifo_bytes ? 0 : TIOCSER_TEMT; } +static void rp2_put_char(struct uart_port *port, unsigned char ch) +{ + struct rp2_uart_port *up = port_to_up(port); + + writeb(ch, up->base + RP2_DATA_BYTE); +} + static unsigned int rp2_uart_get_mctrl(struct uart_port *port) { struct rp2_uart_port *up = port_to_up(port); @@ -428,32 +435,8 @@ static void rp2_rx_chars(struct rp2_uart_port *up) static void rp2_tx_chars(struct rp2_uart_port *up) { - u16 max_tx = FIFO_SIZE - readw(up->base + RP2_TX_FIFO_COUNT); - struct circ_buf *xmit = &up->port.state->xmit; - - if (uart_tx_stopped(&up->port)) { - rp2_uart_stop_tx(&up->port); - return; - } - - for (; max_tx != 0; max_tx--) { - if (up->port.x_char) { - writeb(up->port.x_char, up->base + RP2_DATA_BYTE); - up->port.x_char = 0; - up->port.icount.tx++; - continue; - } - if (uart_circ_empty(xmit)) { - rp2_uart_stop_tx(&up->port); - break; - } - writeb(xmit->buf[xmit->tail], up->base + RP2_DATA_BYTE); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - up->port.icount.tx++; - } - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(&up->port); + uart_port_tx_limit(&up->port, + FIFO_SIZE - readw(up->base + RP2_TX_FIFO_COUNT)); } static void rp2_ch_interrupt(struct rp2_uart_port *up) @@ -575,6 +558,7 @@ static int rp2_uart_verify_port(struct uart_port *port, static const struct uart_ops rp2_uart_ops = { .tx_empty = rp2_uart_tx_empty, + .put_char = rp2_put_char, .set_mctrl = rp2_uart_set_mctrl, .get_mctrl = rp2_uart_get_mctrl, .stop_tx = rp2_uart_stop_tx, diff --git a/drivers/tty/serial/serial_txx9.c b/drivers/tty/serial/serial_txx9.c index 2213e6b841d3..41b4b33b110e 100644 --- a/drivers/tty/serial/serial_txx9.c +++ b/drivers/tty/serial/serial_txx9.c @@ -319,38 +319,6 @@ receive_chars(struct uart_port *up, unsigned int *status) *status = disr; } -static inline void transmit_chars(struct uart_port *up) -{ - struct circ_buf *xmit = &up->state->xmit; - int count; - - if (up->x_char) { - sio_out(up, TXX9_SITFIFO, up->x_char); - up->icount.tx++; - up->x_char = 0; - return; - } - if (uart_circ_empty(xmit) || uart_tx_stopped(up)) { - serial_txx9_stop_tx(up); - return; - } - - count = TXX9_SIO_TX_FIFO; - do { - sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - up->icount.tx++; - if (uart_circ_empty(xmit)) - break; - } while (--count > 0); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(up); - - if (uart_circ_empty(xmit)) - serial_txx9_stop_tx(up); -} - static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id) { int pass_counter = 0; @@ -371,7 +339,7 @@ static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id) if (status & TXX9_SIDISR_RDIS) receive_chars(up, &status); if (status & TXX9_SIDISR_TDIS) - transmit_chars(up); + uart_port_tx_limit(up, TXX9_SIO_TX_FIFO); /* Clear TX/RX Int. Status */ sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | @@ -397,6 +365,11 @@ static unsigned int serial_txx9_tx_empty(struct uart_port *up) return ret; } +static void serial_txx9_put_char(struct uart_port *up, unsigned char ch) +{ + sio_out(up, TXX9_SITFIFO, ch); +} + static unsigned int serial_txx9_get_mctrl(struct uart_port *up) { unsigned int ret; @@ -810,6 +783,7 @@ serial_txx9_type(struct uart_port *port) static const struct uart_ops serial_txx9_pops = { .tx_empty = serial_txx9_tx_empty, + .put_char = serial_txx9_put_char, .set_mctrl = serial_txx9_set_mctrl, .get_mctrl = serial_txx9_get_mctrl, .stop_tx = serial_txx9_stop_tx, diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c index f5ac14c384c4..7ec9ef732eb8 100644 --- a/drivers/tty/serial/sifive.c +++ b/drivers/tty/serial/sifive.c @@ -289,46 +289,6 @@ static void __ssp_transmit_char(struct sifive_serial_port *ssp, int ch) __ssp_writel(ch, SIFIVE_SERIAL_TXDATA_OFFS, ssp); } -/** - * __ssp_transmit_chars() - enqueue multiple bytes onto the TX FIFO - * @ssp: pointer to a struct sifive_serial_port - * - * Transfer up to a TX FIFO size's worth of characters from the Linux serial - * transmit buffer to the SiFive UART TX FIFO. - * - * Context: Any context. Expects @ssp->port.lock to be held by caller. - */ -static void __ssp_transmit_chars(struct sifive_serial_port *ssp) -{ - struct circ_buf *xmit = &ssp->port.state->xmit; - int count; - - if (ssp->port.x_char) { - __ssp_transmit_char(ssp, ssp->port.x_char); - ssp->port.icount.tx++; - ssp->port.x_char = 0; - return; - } - if (uart_circ_empty(xmit) || uart_tx_stopped(&ssp->port)) { - sifive_serial_stop_tx(&ssp->port); - return; - } - count = SIFIVE_TX_FIFO_DEPTH; - do { - __ssp_transmit_char(ssp, xmit->buf[xmit->tail]); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - ssp->port.icount.tx++; - if (uart_circ_empty(xmit)) - break; - } while (--count > 0); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(&ssp->port); - - if (uart_circ_empty(xmit)) - sifive_serial_stop_tx(&ssp->port); -} - /** * __ssp_enable_txwm() - enable transmit watermark interrupts * @ssp: pointer to a struct sifive_serial_port @@ -565,7 +525,7 @@ static irqreturn_t sifive_serial_irq(int irq, void *dev_id) if (ip & SIFIVE_SERIAL_IP_RXWM_MASK) __ssp_receive_chars(ssp); if (ip & SIFIVE_SERIAL_IP_TXWM_MASK) - __ssp_transmit_chars(ssp); + uart_port_tx_limit(&ssp->port, SIFIVE_TX_FIFO_DEPTH); spin_unlock(&ssp->port.lock); @@ -577,6 +537,11 @@ static unsigned int sifive_serial_tx_empty(struct uart_port *port) return TIOCSER_TEMT; } +static void sifive_serial_put_char(struct uart_port *port, unsigned char ch) +{ + __ssp_transmit_char(port_to_sifive_serial_port(port), ch); +} + static unsigned int sifive_serial_get_mctrl(struct uart_port *port) { return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR; @@ -905,6 +870,7 @@ static void __ssp_remove_console_port(struct sifive_serial_port *ssp) static const struct uart_ops sifive_serial_uops = { .tx_empty = sifive_serial_tx_empty, + .put_char = sifive_serial_put_char, .set_mctrl = sifive_serial_set_mctrl, .get_mctrl = sifive_serial_get_mctrl, .stop_tx = sifive_serial_stop_tx, diff --git a/drivers/tty/serial/sprd_serial.c b/drivers/tty/serial/sprd_serial.c index 4329b9c9cbf0..d92dc07f0ebb 100644 --- a/drivers/tty/serial/sprd_serial.c +++ b/drivers/tty/serial/sprd_serial.c @@ -154,6 +154,11 @@ static unsigned int sprd_tx_empty(struct uart_port *port) return TIOCSER_TEMT; } +static void sprd_put_char(struct uart_port *port, unsigned char ch) +{ + serial_out(port, SPRD_TXD, ch); +} + static unsigned int sprd_get_mctrl(struct uart_port *port) { return TIOCM_DSR | TIOCM_CTS; @@ -624,39 +629,6 @@ static inline void sprd_rx(struct uart_port *port) tty_flip_buffer_push(tty); } -static inline void sprd_tx(struct uart_port *port) -{ - struct circ_buf *xmit = &port->state->xmit; - int count; - - if (port->x_char) { - serial_out(port, SPRD_TXD, port->x_char); - port->icount.tx++; - port->x_char = 0; - return; - } - - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - sprd_stop_tx(port); - return; - } - - count = THLD_TX_EMPTY; - do { - serial_out(port, SPRD_TXD, xmit->buf[xmit->tail]); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - if (uart_circ_empty(xmit)) - break; - } while (--count > 0); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - sprd_stop_tx(port); -} - /* this handles the interrupt from one port */ static irqreturn_t sprd_handle_irq(int irq, void *dev_id) { @@ -683,7 +655,7 @@ static irqreturn_t sprd_handle_irq(int irq, void *dev_id) sprd_rx(port); if (ims & SPRD_IMSR_TX_FIFO_EMPTY) - sprd_tx(port); + uart_port_tx_limit(port, THLD_TX_EMPTY); spin_unlock(&port->lock); @@ -948,6 +920,7 @@ static void sprd_poll_put_char(struct uart_port *port, unsigned char ch) static const struct uart_ops serial_sprd_ops = { .tx_empty = sprd_tx_empty, + .put_char = sprd_put_char, .get_mctrl = sprd_get_mctrl, .set_mctrl = sprd_set_mctrl, .stop_tx = sprd_stop_tx, diff --git a/drivers/tty/serial/st-asc.c b/drivers/tty/serial/st-asc.c index d7fd692286cf..e9bb977da576 100644 --- a/drivers/tty/serial/st-asc.c +++ b/drivers/tty/serial/st-asc.c @@ -238,50 +238,7 @@ static inline unsigned asc_hw_txroom(struct uart_port *port) */ static void asc_transmit_chars(struct uart_port *port) { - struct circ_buf *xmit = &port->state->xmit; - int txroom; - unsigned char c; - - txroom = asc_hw_txroom(port); - - if ((txroom != 0) && port->x_char) { - c = port->x_char; - port->x_char = 0; - asc_out(port, ASC_TXBUF, c); - port->icount.tx++; - txroom = asc_hw_txroom(port); - } - - if (uart_tx_stopped(port)) { - /* - * We should try and stop the hardware here, but I - * don't think the ASC has any way to do that. - */ - asc_disable_tx_interrupts(port); - return; - } - - if (uart_circ_empty(xmit)) { - asc_disable_tx_interrupts(port); - return; - } - - if (txroom == 0) - return; - - do { - c = xmit->buf[xmit->tail]; - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - asc_out(port, ASC_TXBUF, c); - port->icount.tx++; - txroom--; - } while ((txroom > 0) && (!uart_circ_empty(xmit))); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - asc_disable_tx_interrupts(port); + uart_port_tx_limit(port, asc_hw_txroom(port)); } static void asc_receive_chars(struct uart_port *port) @@ -389,6 +346,11 @@ static unsigned int asc_tx_empty(struct uart_port *port) return asc_txfifo_is_empty(port) ? TIOCSER_TEMT : 0; } +static void asc_put_char(struct uart_port *port, unsigned char ch) +{ + asc_out(port, ASC_TXBUF, ch); +} + static void asc_set_mctrl(struct uart_port *port, unsigned int mctrl) { struct asc_port *ascport = to_asc_port(port); @@ -690,6 +652,7 @@ static void asc_put_poll_char(struct uart_port *port, unsigned char c) static const struct uart_ops asc_uart_ops = { .tx_empty = asc_tx_empty, + .put_char = asc_put_char, .set_mctrl = asc_set_mctrl, .get_mctrl = asc_get_mctrl, .start_tx = asc_start_tx, diff --git a/drivers/tty/serial/vr41xx_siu.c b/drivers/tty/serial/vr41xx_siu.c index e0bf003ca3a1..83c28288dfe1 100644 --- a/drivers/tty/serial/vr41xx_siu.c +++ b/drivers/tty/serial/vr41xx_siu.c @@ -183,6 +183,11 @@ static unsigned int siu_tx_empty(struct uart_port *port) return 0; } +static void siu_put_char(struct uart_port *port, unsigned char ch) +{ + siu_write(port, UART_TX, ch); +} + static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl) { uint8_t mcr = 0; @@ -370,40 +375,6 @@ static inline void check_modem_status(struct uart_port *port) wake_up_interruptible(&port->state->port.delta_msr_wait); } -static inline void transmit_chars(struct uart_port *port) -{ - struct circ_buf *xmit; - int max_count = TX_MAX_COUNT; - - xmit = &port->state->xmit; - - if (port->x_char) { - siu_write(port, UART_TX, port->x_char); - port->icount.tx++; - port->x_char = 0; - return; - } - - if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { - siu_stop_tx(port); - return; - } - - do { - siu_write(port, UART_TX, xmit->buf[xmit->tail]); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - if (uart_circ_empty(xmit)) - break; - } while (max_count-- > 0); - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - siu_stop_tx(port); -} - static irqreturn_t siu_interrupt(int irq, void *dev_id) { struct uart_port *port; @@ -422,7 +393,7 @@ static irqreturn_t siu_interrupt(int irq, void *dev_id) check_modem_status(port); if (lsr & UART_LSR_THRE) - transmit_chars(port); + uart_port_tx_limit(port, TX_MAX_COUNT); return IRQ_HANDLED; } @@ -653,6 +624,7 @@ static int siu_verify_port(struct uart_port *port, struct serial_struct *serial) static const struct uart_ops siu_uart_ops = { .tx_empty = siu_tx_empty, + .put_char = siu_put_char, .set_mctrl = siu_set_mctrl, .get_mctrl = siu_get_mctrl, .stop_tx = siu_stop_tx, -- 2.35.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE101C433EF for ; Mon, 11 Apr 2022 10:54:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yruf3fLRinFJsMIg4XSdc81uJ3TXMQm8SfPAOUwLBwU=; b=rUE0Y4fAVM/XMj Qs/C0NaFZNI6CzdN1H445h6y7T7yGaFubg3lMWlr/tyCswSabtb8S3iS2hGD5t8Tx9TYuIwXmzPwi pWOOUGP9UFVuXGuozB/8ACCA39OfKyTc4wEKgdfoNAGcLYmlnMd4cJ/o8jW8kGq45u4RqaBJGXKbX Pp4NJ2XmnN4J2NiezK8YnPHpXIFP7xhDxe1Pdnhcafebb647cWE8fqbPPGbVnIjAGiPbZ0D/LVO2F w29oNbYI0AKRfa9kFOaBIhsKp4YY6YpeXyXH2TE2soFGbp4Yu1fUUB1zeCZpi+T/zQR8CARhAuHRF 34rRJmIZfEBNec0jzOVQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ndrgd-008WgL-Jn; Mon, 11 Apr 2022 10:54:23 +0000 Received: from smtp-out1.suse.de ([195.135.220.28]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ndrgS-008WbB-7G for linux-riscv@lists.infradead.org; Mon, 11 Apr 2022 10:54:17 +0000 Received: from relay2.suse.de (relay2.suse.de [149.44.160.134]) by smtp-out1.suse.de (Postfix) with ESMTP id 21ED0215FD; Mon, 11 Apr 2022 10:54:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.cz; s=susede2_rsa; t=1649674449; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=r49EueKp2Br8vDmcdTb/MEqeUHETgXaKsz+9XB5AYis=; b=1rqsZFfK3No3fmZqQiaAOHqUkKubSrXN+R9BZLf2QB7iTkcHXVOc+Du1Zx9CgSUAbBI31c dxL2joIscXLjkj2NCfHU+b0lCDavkI9dUy7Wd8riU9PsPLPKpSi9UeDfs50Fi1GLI6Sgys R+h2xWrTU0Sm0S8TkyF5oyKNYpe1uw0= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.cz; s=susede2_ed25519; t=1649674449; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=r49EueKp2Br8vDmcdTb/MEqeUHETgXaKsz+9XB5AYis=; b=+9UGdV6/Obkk/sp514m0mryoV6fFb/rJytQNc3etkkrOok/mDC1AYpHErvGI3CEaEat8xK mXTHkPua1zekONAg== Received: from localhost.localdomain (unknown [10.100.208.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by relay2.suse.de (Postfix) with ESMTPS id 8E034A3B89; Mon, 11 Apr 2022 10:54:08 +0000 (UTC) From: Jiri Slaby To: gregkh@linuxfoundation.org Cc: linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, Jiri Slaby , Russell King , Florian Fainelli , bcm-kernel-feedback-list@broadcom.com, =?UTF-8?q?Pali=20Roh=C3=A1r?= , Kevin Cernekee , Palmer Dabbelt , Paul Walmsley , Orson Zhai , Baolin Wang , Chunyan Zhang , Patrice Chotard , linux-riscv@lists.infradead.org Subject: [PATCH 3/3] tty: serial: use uart_port_tx_limit() helper Date: Mon, 11 Apr 2022 12:54:05 +0200 Message-Id: <20220411105405.9519-4-jslaby@suse.cz> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220411105405.9519-1-jslaby@suse.cz> References: <20220411105405.9519-1-jslaby@suse.cz> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220411_035412_623174_7DAF0F67 X-CRM114-Status: GOOD ( 23.65 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org dWFydF9wb3J0X3R4X2xpbWl0KCkgaXMgYSBuZXcgaGVscGVyIHRvIHNlbmQgY2hhcmFjdGVycyB0 byB0aGUgZGV2aWNlLgpVc2UgaXQgaW4gdGhlc2UgZHJpdmVycy4KCkl0IG1lYW5zIHdlIGhhdmUg dG8gZGVmaW5lIHR3byBuZXcgdWFydCBob29rczogdHhfcmVhZHkoKSBhbmQgcHV0X2NoYXIoKQp0 byBkbyB0aGUgcmVhbCBqb2Igbm93LgoKQW5kIG11eC5jIGFsc28gbmVlZHMgdG8gZGVmaW5lIHR4 X2RvbmUoKS4gQnV0IEknbSBub3Qgc3VyZSBpZiB0aGUgZHJpdmVyCnJlYWxseSB3YW50cyB0byB3 YWl0IGZvciBhbGwgdGhlIGNoYXJhY3RlcnMgdG8gZGlzbWlzcyBmcm9tIHRoZSBIVyBmaWZvCmF0 IHRoaXMgY29kZSBwb2ludC4gSGVuY2UgSSBtYXJrZWQgdGhpcyBhcyBGSVhNRS4KClNpZ25lZC1v ZmYtYnk6IEppcmkgU2xhYnkgPGpzbGFieUBzdXNlLmN6PgpDYzogUnVzc2VsbCBLaW5nIDxsaW51 eEBhcm1saW51eC5vcmcudWs+CkNjOiBGbG9yaWFuIEZhaW5lbGxpIDxmLmZhaW5lbGxpQGdtYWls LmNvbT4KQ2M6IGJjbS1rZXJuZWwtZmVlZGJhY2stbGlzdEBicm9hZGNvbS5jb20KQ2M6ICJQYWxp IFJvaMOhciIgPHBhbGlAa2VybmVsLm9yZz4KQ2M6IEtldmluIENlcm5la2VlIDxjZXJuZWtlZUBn bWFpbC5jb20+CkNjOiBQYWxtZXIgRGFiYmVsdCA8cGFsbWVyQGRhYmJlbHQuY29tPgpDYzogUGF1 bCBXYWxtc2xleSA8cGF1bC53YWxtc2xleUBzaWZpdmUuY29tPgpDYzogT3Jzb24gWmhhaSA8b3Jz b256aGFpQGdtYWlsLmNvbT4KQ2M6IEJhb2xpbiBXYW5nIDxiYW9saW4ud2FuZzdAZ21haWwuY29t PgpDYzogQ2h1bnlhbiBaaGFuZyA8emhhbmcubHlyYUBnbWFpbC5jb20+CkNjOiBQYXRyaWNlIENo b3RhcmQgPHBhdHJpY2UuY2hvdGFyZEBmb3NzLnN0LmNvbT4KQ2M6IGxpbnV4LXJpc2N2QGxpc3Rz LmluZnJhZGVhZC5vcmcKLS0tCiBkcml2ZXJzL3R0eS9zZXJpYWwvMjEyODUuYyAgICAgICAgICAg fCA0MCArKysrKysrLS0tLS0tLS0tLS0tLS0KIGRyaXZlcnMvdHR5L3NlcmlhbC9hbHRlcmFfanRh Z3VhcnQuYyB8IDQzICsrKysrKy0tLS0tLS0tLS0tLS0tLS0KIGRyaXZlcnMvdHR5L3NlcmlhbC9h bWJhLXBsMDEwLmMgICAgICB8IDQwICsrKystLS0tLS0tLS0tLS0tLS0tLQogZHJpdmVycy90dHkv c2VyaWFsL2FwYnVhcnQuYyAgICAgICAgIHwgMzcgKysrKy0tLS0tLS0tLS0tLS0tLQogZHJpdmVy cy90dHkvc2VyaWFsL2JjbTYzeHhfdWFydC5jICAgIHwgNDggKysrKysrLS0tLS0tLS0tLS0tLS0t LS0tLQogZHJpdmVycy90dHkvc2VyaWFsL211eC5jICAgICAgICAgICAgIHwgNDggKysrKysrKyst LS0tLS0tLS0tLS0tLS0tLQogZHJpdmVycy90dHkvc2VyaWFsL212ZWJ1LXVhcnQuYyAgICAgIHwg NDcgKysrKysrKy0tLS0tLS0tLS0tLS0tLS0tCiBkcml2ZXJzL3R0eS9zZXJpYWwvb21hcC1zZXJp YWwuYyAgICAgfCA1MyArKysrKysrLS0tLS0tLS0tLS0tLS0tLS0tLS0tCiBkcml2ZXJzL3R0eS9z ZXJpYWwvcHhhLmMgICAgICAgICAgICAgfCA0MyArKysrKy0tLS0tLS0tLS0tLS0tLS0tCiBkcml2 ZXJzL3R0eS9zZXJpYWwvcnAyLmMgICAgICAgICAgICAgfCAzNiArKysrKystLS0tLS0tLS0tLS0t CiBkcml2ZXJzL3R0eS9zZXJpYWwvc2VyaWFsX3R4eDkuYyAgICAgfCA0MCArKysrLS0tLS0tLS0t LS0tLS0tLS0KIGRyaXZlcnMvdHR5L3NlcmlhbC9zaWZpdmUuYyAgICAgICAgICB8IDQ4ICsrKyst LS0tLS0tLS0tLS0tLS0tLS0tLS0KIGRyaXZlcnMvdHR5L3NlcmlhbC9zcHJkX3NlcmlhbC5jICAg ICB8IDQxICsrKystLS0tLS0tLS0tLS0tLS0tLQogZHJpdmVycy90dHkvc2VyaWFsL3N0LWFzYy5j ICAgICAgICAgIHwgNTEgKysrKy0tLS0tLS0tLS0tLS0tLS0tLS0tLS0KIGRyaXZlcnMvdHR5L3Nl cmlhbC92cjQxeHhfc2l1LmMgICAgICB8IDQyICsrKystLS0tLS0tLS0tLS0tLS0tLS0KIDE1IGZp bGVzIGNoYW5nZWQsIDE0MyBpbnNlcnRpb25zKCspLCA1MTQgZGVsZXRpb25zKC0pCgpkaWZmIC0t Z2l0IGEvZHJpdmVycy90dHkvc2VyaWFsLzIxMjg1LmMgYi9kcml2ZXJzL3R0eS9zZXJpYWwvMjEy ODUuYwppbmRleCA3NTIwY2MwMmZkNGQuLjEyZDliZGNkNjdiOCAxMDA2NDQKLS0tIGEvZHJpdmVy cy90dHkvc2VyaWFsLzIxMjg1LmMKKysrIGIvZHJpdmVycy90dHkvc2VyaWFsLzIxMjg1LmMKQEAg LTE1NCwzNSArMTU0LDkgQEAgc3RhdGljIGlycXJldHVybl90IHNlcmlhbDIxMjg1X3J4X2NoYXJz KGludCBpcnEsIHZvaWQgKmRldl9pZCkKIHN0YXRpYyBpcnFyZXR1cm5fdCBzZXJpYWwyMTI4NV90 eF9jaGFycyhpbnQgaXJxLCB2b2lkICpkZXZfaWQpCiB7CiAJc3RydWN0IHVhcnRfcG9ydCAqcG9y dCA9IGRldl9pZDsKLQlzdHJ1Y3QgY2lyY19idWYgKnhtaXQgPSAmcG9ydC0+c3RhdGUtPnhtaXQ7 Ci0JaW50IGNvdW50ID0gMjU2OwotCi0JaWYgKHBvcnQtPnhfY2hhcikgewotCQkqQ1NSX1VBUlRE UiA9IHBvcnQtPnhfY2hhcjsKLQkJcG9ydC0+aWNvdW50LnR4Kys7Ci0JCXBvcnQtPnhfY2hhciA9 IDA7Ci0JCWdvdG8gb3V0OwotCX0KLQlpZiAodWFydF9jaXJjX2VtcHR5KHhtaXQpIHx8IHVhcnRf dHhfc3RvcHBlZChwb3J0KSkgewotCQlzZXJpYWwyMTI4NV9zdG9wX3R4KHBvcnQpOwotCQlnb3Rv IG91dDsKLQl9Ci0KLQlkbyB7Ci0JCSpDU1JfVUFSVERSID0geG1pdC0+YnVmW3htaXQtPnRhaWxd OwotCQl4bWl0LT50YWlsID0gKHhtaXQtPnRhaWwgKyAxKSAmIChVQVJUX1hNSVRfU0laRSAtIDEp OwotCQlwb3J0LT5pY291bnQudHgrKzsKLQkJaWYgKHVhcnRfY2lyY19lbXB0eSh4bWl0KSkKLQkJ CWJyZWFrOwotCX0gd2hpbGUgKC0tY291bnQgPiAwICYmICEoKkNTUl9VQVJURkxHICYgMHgyMCkp OwotCi0JaWYgKHVhcnRfY2lyY19jaGFyc19wZW5kaW5nKHhtaXQpIDwgV0FLRVVQX0NIQVJTKQot CQl1YXJ0X3dyaXRlX3dha2V1cChwb3J0KTsKIAotCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkp Ci0JCXNlcmlhbDIxMjg1X3N0b3BfdHgocG9ydCk7CisJdWFydF9wb3J0X3R4X2xpbWl0KHBvcnQs IDI1Nik7CiAKLSBvdXQ6CiAJcmV0dXJuIElSUV9IQU5ETEVEOwogfQogCkBAIC0xOTEsNiArMTY1 LDE2IEBAIHN0YXRpYyB1bnNpZ25lZCBpbnQgc2VyaWFsMjEyODVfdHhfZW1wdHkoc3RydWN0IHVh cnRfcG9ydCAqcG9ydCkKIAlyZXR1cm4gKCpDU1JfVUFSVEZMRyAmIDgpID8gMCA6IFRJT0NTRVJf VEVNVDsKIH0KIAorc3RhdGljIGJvb2wgc2VyaWFsMjEyODVfdWFydF90eF9yZWFkeShzdHJ1Y3Qg dWFydF9wb3J0ICpwb3J0KQoreworCXJldHVybiAhKCpDU1JfVUFSVEZMRyAmIDB4MjApOworfQor CitzdGF0aWMgdm9pZCBzZXJpYWwyMTI4NV9wdXRfY2hhcihzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0 LCB1bnNpZ25lZCBjaGFyIGNoKQoreworCSpDU1JfVUFSVERSID0gY2g7Cit9CisKIC8qIG5vIG1v ZGVtIGNvbnRyb2wgbGluZXMgKi8KIHN0YXRpYyB1bnNpZ25lZCBpbnQgc2VyaWFsMjEyODVfZ2V0 X21jdHJsKHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQpCiB7CkBAIC0zNzIsNiArMzU2LDggQEAgc3Rh dGljIGludCBzZXJpYWwyMTI4NV92ZXJpZnlfcG9ydChzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0LCBz dHJ1Y3Qgc2VyaWFsX3N0cnVjdAogCiBzdGF0aWMgY29uc3Qgc3RydWN0IHVhcnRfb3BzIHNlcmlh bDIxMjg1X29wcyA9IHsKIAkudHhfZW1wdHkJPSBzZXJpYWwyMTI4NV90eF9lbXB0eSwKKwkudHhf cmVhZHkJPSBzZXJpYWwyMTI4NV91YXJ0X3R4X3JlYWR5LAorCS5wdXRfY2hhcgk9IHNlcmlhbDIx Mjg1X3B1dF9jaGFyLAogCS5nZXRfbWN0cmwJPSBzZXJpYWwyMTI4NV9nZXRfbWN0cmwsCiAJLnNl dF9tY3RybAk9IHNlcmlhbDIxMjg1X3NldF9tY3RybCwKIAkuc3RvcF90eAk9IHNlcmlhbDIxMjg1 X3N0b3BfdHgsCmRpZmYgLS1naXQgYS9kcml2ZXJzL3R0eS9zZXJpYWwvYWx0ZXJhX2p0YWd1YXJ0 LmMgYi9kcml2ZXJzL3R0eS9zZXJpYWwvYWx0ZXJhX2p0YWd1YXJ0LmMKaW5kZXggY2I3OTFjNTE0 OWEzLi4xNDRjYjRhYjMzN2IgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvdHR5L3NlcmlhbC9hbHRlcmFf anRhZ3VhcnQuYworKysgYi9kcml2ZXJzL3R0eS9zZXJpYWwvYWx0ZXJhX2p0YWd1YXJ0LmMKQEAg LTY1LDYgKzY1LDExIEBAIHN0YXRpYyB1bnNpZ25lZCBpbnQgYWx0ZXJhX2p0YWd1YXJ0X3R4X2Vt cHR5KHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQpCiAJCUFMVEVSQV9KVEFHVUFSVF9DT05UUk9MX1dT UEFDRV9NU0spID8gVElPQ1NFUl9URU1UIDogMDsKIH0KIAorc3RhdGljIHZvaWQgYWx0ZXJhX2p0 YWd1YXJ0X3B1dF9jaGFyKHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQsIHVuc2lnbmVkIGNoYXIgY2gp Cit7CisJd3JpdGVsKGNoLCBwb3J0LT5tZW1iYXNlICsgQUxURVJBX0pUQUdVQVJUX0RBVEFfUkVH KTsKK30KKwogc3RhdGljIHVuc2lnbmVkIGludCBhbHRlcmFfanRhZ3VhcnRfZ2V0X21jdHJsKHN0 cnVjdCB1YXJ0X3BvcnQgKnBvcnQpCiB7CiAJcmV0dXJuIFRJT0NNX0NBUiB8IFRJT0NNX0RTUiB8 IFRJT0NNX0NUUzsKQEAgLTEzNywzOSArMTQyLDEyIEBAIHN0YXRpYyB2b2lkIGFsdGVyYV9qdGFn dWFydF9yeF9jaGFycyhzdHJ1Y3QgYWx0ZXJhX2p0YWd1YXJ0ICpwcCkKIHN0YXRpYyB2b2lkIGFs dGVyYV9qdGFndWFydF90eF9jaGFycyhzdHJ1Y3QgYWx0ZXJhX2p0YWd1YXJ0ICpwcCkKIHsKIAlz dHJ1Y3QgdWFydF9wb3J0ICpwb3J0ID0gJnBwLT5wb3J0OwotCXN0cnVjdCBjaXJjX2J1ZiAqeG1p dCA9ICZwb3J0LT5zdGF0ZS0+eG1pdDsKLQl1bnNpZ25lZCBpbnQgcGVuZGluZywgY291bnQ7Ci0K LQlpZiAocG9ydC0+eF9jaGFyKSB7Ci0JCS8qIFNlbmQgc3BlY2lhbCBjaGFyIC0gcHJvYmFibHkg ZmxvdyBjb250cm9sICovCi0JCXdyaXRlbChwb3J0LT54X2NoYXIsIHBvcnQtPm1lbWJhc2UgKyBB TFRFUkFfSlRBR1VBUlRfREFUQV9SRUcpOwotCQlwb3J0LT54X2NoYXIgPSAwOwotCQlwb3J0LT5p Y291bnQudHgrKzsKLQkJcmV0dXJuOwotCX0KLQotCXBlbmRpbmcgPSB1YXJ0X2NpcmNfY2hhcnNf cGVuZGluZyh4bWl0KTsKLQlpZiAocGVuZGluZyA+IDApIHsKLQkJY291bnQgPSAocmVhZGwocG9y dC0+bWVtYmFzZSArIEFMVEVSQV9KVEFHVUFSVF9DT05UUk9MX1JFRykgJgotCQkJCUFMVEVSQV9K VEFHVUFSVF9DT05UUk9MX1dTUEFDRV9NU0spID4+Ci0JCQlBTFRFUkFfSlRBR1VBUlRfQ09OVFJP TF9XU1BBQ0VfT0ZGOwotCQlpZiAoY291bnQgPiBwZW5kaW5nKQotCQkJY291bnQgPSBwZW5kaW5n OwotCQlpZiAoY291bnQgPiAwKSB7Ci0JCQlwZW5kaW5nIC09IGNvdW50OwotCQkJd2hpbGUgKGNv dW50LS0pIHsKLQkJCQl3cml0ZWwoeG1pdC0+YnVmW3htaXQtPnRhaWxdLAotCQkJCSAgICAgICBw b3J0LT5tZW1iYXNlICsgQUxURVJBX0pUQUdVQVJUX0RBVEFfUkVHKTsKLQkJCQl4bWl0LT50YWls ID0gKHhtaXQtPnRhaWwgKyAxKSAmIChVQVJUX1hNSVRfU0laRSAtIDEpOwotCQkJCXBvcnQtPmlj b3VudC50eCsrOwotCQkJfQotCQkJaWYgKHBlbmRpbmcgPCBXQUtFVVBfQ0hBUlMpCi0JCQkJdWFy dF93cml0ZV93YWtldXAocG9ydCk7Ci0JCX0KLQl9CisJdW5zaWduZWQgaW50IHNwYWNlOwogCi0J aWYgKHBlbmRpbmcgPT0gMCkKLQkJYWx0ZXJhX2p0YWd1YXJ0X3N0b3BfdHgocG9ydCk7CisJc3Bh Y2UgPSAocmVhZGwocG9ydC0+bWVtYmFzZSArIEFMVEVSQV9KVEFHVUFSVF9DT05UUk9MX1JFRykg JgorCQkJQUxURVJBX0pUQUdVQVJUX0NPTlRST0xfV1NQQUNFX01TSykgPj4KKwkJQUxURVJBX0pU QUdVQVJUX0NPTlRST0xfV1NQQUNFX09GRjsKKwl1YXJ0X3BvcnRfdHhfbGltaXQocG9ydCwgc3Bh Y2UpOwogfQogCiBzdGF0aWMgaXJxcmV0dXJuX3QgYWx0ZXJhX2p0YWd1YXJ0X2ludGVycnVwdChp bnQgaXJxLCB2b2lkICpkYXRhKQpAQCAtMjc0LDYgKzI1Miw3IEBAIHN0YXRpYyBpbnQgYWx0ZXJh X2p0YWd1YXJ0X3ZlcmlmeV9wb3J0KHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQsCiAgKi8KIHN0YXRp YyBjb25zdCBzdHJ1Y3QgdWFydF9vcHMgYWx0ZXJhX2p0YWd1YXJ0X29wcyA9IHsKIAkudHhfZW1w dHkJPSBhbHRlcmFfanRhZ3VhcnRfdHhfZW1wdHksCisJLnB1dF9jaGFyICAgICAgID0gYWx0ZXJh X2p0YWd1YXJ0X3B1dF9jaGFyLAogCS5nZXRfbWN0cmwJPSBhbHRlcmFfanRhZ3VhcnRfZ2V0X21j dHJsLAogCS5zZXRfbWN0cmwJPSBhbHRlcmFfanRhZ3VhcnRfc2V0X21jdHJsLAogCS5zdGFydF90 eAk9IGFsdGVyYV9qdGFndWFydF9zdGFydF90eCwKZGlmZiAtLWdpdCBhL2RyaXZlcnMvdHR5L3Nl cmlhbC9hbWJhLXBsMDEwLmMgYi9kcml2ZXJzL3R0eS9zZXJpYWwvYW1iYS1wbDAxMC5jCmluZGV4 IGZhZTBiNTgxZmY0Mi4uMWQ3M2UxYmEzMThiIDEwMDY0NAotLS0gYS9kcml2ZXJzL3R0eS9zZXJp YWwvYW1iYS1wbDAxMC5jCisrKyBiL2RyaXZlcnMvdHR5L3NlcmlhbC9hbWJhLXBsMDEwLmMKQEAg LTE2MiwzOCArMTYyLDYgQEAgc3RhdGljIHZvaWQgcGwwMTBfcnhfY2hhcnMoc3RydWN0IHVhcnRf cG9ydCAqcG9ydCkKIAl0dHlfZmxpcF9idWZmZXJfcHVzaCgmcG9ydC0+c3RhdGUtPnBvcnQpOwog fQogCi1zdGF0aWMgdm9pZCBwbDAxMF90eF9jaGFycyhzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0KQot ewotCXN0cnVjdCBjaXJjX2J1ZiAqeG1pdCA9ICZwb3J0LT5zdGF0ZS0+eG1pdDsKLQlpbnQgY291 bnQ7Ci0KLQlpZiAocG9ydC0+eF9jaGFyKSB7Ci0JCXdyaXRlbChwb3J0LT54X2NoYXIsIHBvcnQt Pm1lbWJhc2UgKyBVQVJUMDF4X0RSKTsKLQkJcG9ydC0+aWNvdW50LnR4Kys7Ci0JCXBvcnQtPnhf Y2hhciA9IDA7Ci0JCXJldHVybjsKLQl9Ci0JaWYgKHVhcnRfY2lyY19lbXB0eSh4bWl0KSB8fCB1 YXJ0X3R4X3N0b3BwZWQocG9ydCkpIHsKLQkJcGwwMTBfc3RvcF90eChwb3J0KTsKLQkJcmV0dXJu OwotCX0KLQotCWNvdW50ID0gcG9ydC0+Zmlmb3NpemUgPj4gMTsKLQlkbyB7Ci0JCXdyaXRlbCh4 bWl0LT5idWZbeG1pdC0+dGFpbF0sIHBvcnQtPm1lbWJhc2UgKyBVQVJUMDF4X0RSKTsKLQkJeG1p dC0+dGFpbCA9ICh4bWl0LT50YWlsICsgMSkgJiAoVUFSVF9YTUlUX1NJWkUgLSAxKTsKLQkJcG9y dC0+aWNvdW50LnR4Kys7Ci0JCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkpCi0JCQlicmVhazsK LQl9IHdoaWxlICgtLWNvdW50ID4gMCk7Ci0KLQlpZiAodWFydF9jaXJjX2NoYXJzX3BlbmRpbmco eG1pdCkgPCBXQUtFVVBfQ0hBUlMpCi0JCXVhcnRfd3JpdGVfd2FrZXVwKHBvcnQpOwotCi0JaWYg KHVhcnRfY2lyY19lbXB0eSh4bWl0KSkKLQkJcGwwMTBfc3RvcF90eChwb3J0KTsKLX0KLQogc3Rh dGljIHZvaWQgcGwwMTBfbW9kZW1fc3RhdHVzKHN0cnVjdCB1YXJ0X2FtYmFfcG9ydCAqdWFwKQog ewogCXN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQgPSAmdWFwLT5wb3J0OwpAQCAtMjM4LDcgKzIwNiw3 IEBAIHN0YXRpYyBpcnFyZXR1cm5fdCBwbDAxMF9pbnQoaW50IGlycSwgdm9pZCAqZGV2X2lkKQog CQkJaWYgKHN0YXR1cyAmIFVBUlQwMTBfSUlSX01JUykKIAkJCQlwbDAxMF9tb2RlbV9zdGF0dXMo dWFwKTsKIAkJCWlmIChzdGF0dXMgJiBVQVJUMDEwX0lJUl9USVMpCi0JCQkJcGwwMTBfdHhfY2hh cnMocG9ydCk7CisJCQkJdWFydF9wb3J0X3R4X2xpbWl0KHBvcnQsIHBvcnQtPmZpZm9zaXplID4+ IDEpOwogCiAJCQlpZiAocGFzc19jb3VudGVyLS0gPT0gMCkKIAkJCQlicmVhazsKQEAgLTI2MSw2 ICsyMjksMTEgQEAgc3RhdGljIHVuc2lnbmVkIGludCBwbDAxMF90eF9lbXB0eShzdHJ1Y3QgdWFy dF9wb3J0ICpwb3J0KQogCXJldHVybiBzdGF0dXMgJiBVQVJUMDF4X0ZSX0JVU1kgPyAwIDogVElP Q1NFUl9URU1UOwogfQogCitzdGF0aWMgdm9pZCBwbDAxMF9wdXRfY2hhcihzdHJ1Y3QgdWFydF9w b3J0ICpwb3J0LCB1bnNpZ25lZCBjaGFyIGNoKQoreworCXdyaXRlbChjaCwgcG9ydC0+bWVtYmFz ZSArIFVBUlQwMXhfRFIpOworfQorCiBzdGF0aWMgdW5zaWduZWQgaW50IHBsMDEwX2dldF9tY3Ry bChzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0KQogewogCXVuc2lnbmVkIGludCByZXN1bHQgPSAwOwpA QCAtNTI5LDYgKzUwMiw3IEBAIHN0YXRpYyBpbnQgcGwwMTBfdmVyaWZ5X3BvcnQoc3RydWN0IHVh cnRfcG9ydCAqcG9ydCwgc3RydWN0IHNlcmlhbF9zdHJ1Y3QgKnNlcikKIAogc3RhdGljIGNvbnN0 IHN0cnVjdCB1YXJ0X29wcyBhbWJhX3BsMDEwX3BvcHMgPSB7CiAJLnR4X2VtcHR5CT0gcGwwMTBf dHhfZW1wdHksCisJLnB1dF9jaGFyCT0gcGwwMTBfcHV0X2NoYXIsCiAJLnNldF9tY3RybAk9IHBs MDEwX3NldF9tY3RybCwKIAkuZ2V0X21jdHJsCT0gcGwwMTBfZ2V0X21jdHJsLAogCS5zdG9wX3R4 CT0gcGwwMTBfc3RvcF90eCwKZGlmZiAtLWdpdCBhL2RyaXZlcnMvdHR5L3NlcmlhbC9hcGJ1YXJ0 LmMgYi9kcml2ZXJzL3R0eS9zZXJpYWwvYXBidWFydC5jCmluZGV4IDllZjgyZDg3MGZmMi4uYTMx YmQ1ODQ5Yzc2IDEwMDY0NAotLS0gYS9kcml2ZXJzL3R0eS9zZXJpYWwvYXBidWFydC5jCisrKyBi L2RyaXZlcnMvdHR5L3NlcmlhbC9hcGJ1YXJ0LmMKQEAgLTEyMiwzNiArMTIyLDcgQEAgc3RhdGlj IHZvaWQgYXBidWFydF9yeF9jaGFycyhzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0KQogCiBzdGF0aWMg dm9pZCBhcGJ1YXJ0X3R4X2NoYXJzKHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQpCiB7Ci0Jc3RydWN0 IGNpcmNfYnVmICp4bWl0ID0gJnBvcnQtPnN0YXRlLT54bWl0OwotCWludCBjb3VudDsKLQotCWlm IChwb3J0LT54X2NoYXIpIHsKLQkJVUFSVF9QVVRfQ0hBUihwb3J0LCBwb3J0LT54X2NoYXIpOwot CQlwb3J0LT5pY291bnQudHgrKzsKLQkJcG9ydC0+eF9jaGFyID0gMDsKLQkJcmV0dXJuOwotCX0K LQotCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkgfHwgdWFydF90eF9zdG9wcGVkKHBvcnQpKSB7 Ci0JCWFwYnVhcnRfc3RvcF90eChwb3J0KTsKLQkJcmV0dXJuOwotCX0KLQotCS8qIGFtYmE6IGZp bGwgRklGTyAqLwotCWNvdW50ID0gcG9ydC0+Zmlmb3NpemUgPj4gMTsKLQlkbyB7Ci0JCVVBUlRf UFVUX0NIQVIocG9ydCwgeG1pdC0+YnVmW3htaXQtPnRhaWxdKTsKLQkJeG1pdC0+dGFpbCA9ICh4 bWl0LT50YWlsICsgMSkgJiAoVUFSVF9YTUlUX1NJWkUgLSAxKTsKLQkJcG9ydC0+aWNvdW50LnR4 Kys7Ci0JCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkpCi0JCQlicmVhazsKLQl9IHdoaWxlICgt LWNvdW50ID4gMCk7Ci0KLQlpZiAodWFydF9jaXJjX2NoYXJzX3BlbmRpbmcoeG1pdCkgPCBXQUtF VVBfQ0hBUlMpCi0JCXVhcnRfd3JpdGVfd2FrZXVwKHBvcnQpOwotCi0JaWYgKHVhcnRfY2lyY19l bXB0eSh4bWl0KSkKLQkJYXBidWFydF9zdG9wX3R4KHBvcnQpOworCXVhcnRfcG9ydF90eF9saW1p dChwb3J0LCBwb3J0LT5maWZvc2l6ZSA+PiAxKTsKIH0KIAogc3RhdGljIGlycXJldHVybl90IGFw YnVhcnRfaW50KGludCBpcnEsIHZvaWQgKmRldl9pZCkKQEAgLTE3OCw2ICsxNDksMTEgQEAgc3Rh dGljIHVuc2lnbmVkIGludCBhcGJ1YXJ0X3R4X2VtcHR5KHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQp CiAJcmV0dXJuIHN0YXR1cyAmIFVBUlRfU1RBVFVTX1RIRSA/IFRJT0NTRVJfVEVNVCA6IDA7CiB9 CiAKK3N0YXRpYyB2b2lkIGFwYnVhcnRfcHV0X2NoYXIoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCwg dW5zaWduZWQgY2hhciBjaCkKK3sKKwlVQVJUX1BVVF9DSEFSKHBvcnQsIGNoKTsKK30KKwogc3Rh dGljIHVuc2lnbmVkIGludCBhcGJ1YXJ0X2dldF9tY3RybChzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0 KQogewogCS8qIFRoZSBHUkxJQiBBUEJVQVJUIGhhbmRsZXMgZmxvdyBjb250cm9sIGluIGhhcmR3 YXJlICovCkBAIC0zMjIsNiArMjk4LDcgQEAgc3RhdGljIGludCBhcGJ1YXJ0X3ZlcmlmeV9wb3J0 KHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQsCiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3QgdWFydF9vcHMg Z3JsaWJfYXBidWFydF9vcHMgPSB7CiAJLnR4X2VtcHR5ID0gYXBidWFydF90eF9lbXB0eSwKKwku cHV0X2NoYXIgPSBhcGJ1YXJ0X3B1dF9jaGFyLAogCS5zZXRfbWN0cmwgPSBhcGJ1YXJ0X3NldF9t Y3RybCwKIAkuZ2V0X21jdHJsID0gYXBidWFydF9nZXRfbWN0cmwsCiAJLnN0b3BfdHggPSBhcGJ1 YXJ0X3N0b3BfdHgsCmRpZmYgLS1naXQgYS9kcml2ZXJzL3R0eS9zZXJpYWwvYmNtNjN4eF91YXJ0 LmMgYi9kcml2ZXJzL3R0eS9zZXJpYWwvYmNtNjN4eF91YXJ0LmMKaW5kZXggNTNiNDMxNzRhYTQw Li4yOWYzMTI4NmZmNTQgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvdHR5L3NlcmlhbC9iY202M3h4X3Vh cnQuYworKysgYi9kcml2ZXJzL3R0eS9zZXJpYWwvYmNtNjN4eF91YXJ0LmMKQEAgLTkzLDYgKzkz LDExIEBAIHN0YXRpYyB1bnNpZ25lZCBpbnQgYmNtX3VhcnRfdHhfZW1wdHkoc3RydWN0IHVhcnRf cG9ydCAqcG9ydCkKIAlyZXR1cm4gKHZhbCAmIFVBUlRfSVJfU1RBVChVQVJUX0lSX1RYRU1QVFkp KSA/IDEgOiAwOwogfQogCitzdGF0aWMgdm9pZCBiY21fdWFydF9wdXRfY2hhcihzdHJ1Y3QgdWFy dF9wb3J0ICpwb3J0LCB1bnNpZ25lZCBjaGFyIGNoKQoreworCWJjbV91YXJ0X3dyaXRlbChwb3J0 LCBjaCwgVUFSVF9GSUZPX1JFRyk7Cit9CisKIC8qCiAgKiBzZXJpYWwgY29yZSByZXF1ZXN0IHRv IHNldCBSVFMgYW5kIERUUiBwaW4gc3RhdGUgYW5kIGxvb3BiYWNrIG1vZGUKICAqLwpAQCAtMzAz LDUzICszMDgsMTkgQEAgc3RhdGljIHZvaWQgYmNtX3VhcnRfZG9fcngoc3RydWN0IHVhcnRfcG9y dCAqcG9ydCkKICAqLwogc3RhdGljIHZvaWQgYmNtX3VhcnRfZG9fdHgoc3RydWN0IHVhcnRfcG9y dCAqcG9ydCkKIHsKLQlzdHJ1Y3QgY2lyY19idWYgKnhtaXQ7Ci0JdW5zaWduZWQgaW50IHZhbCwg bWF4X2NvdW50OwotCi0JaWYgKHBvcnQtPnhfY2hhcikgewotCQliY21fdWFydF93cml0ZWwocG9y dCwgcG9ydC0+eF9jaGFyLCBVQVJUX0ZJRk9fUkVHKTsKLQkJcG9ydC0+aWNvdW50LnR4Kys7Ci0J CXBvcnQtPnhfY2hhciA9IDA7Ci0JCXJldHVybjsKLQl9Ci0KLQlpZiAodWFydF90eF9zdG9wcGVk KHBvcnQpKSB7Ci0JCWJjbV91YXJ0X3N0b3BfdHgocG9ydCk7Ci0JCXJldHVybjsKLQl9Ci0KLQl4 bWl0ID0gJnBvcnQtPnN0YXRlLT54bWl0OwotCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkpCi0J CWdvdG8gdHhxX2VtcHR5OworCXVuc2lnbmVkIGludCB2YWwsIHBlbmRpbmc7CiAKIAl2YWwgPSBi Y21fdWFydF9yZWFkbChwb3J0LCBVQVJUX01DVExfUkVHKTsKIAl2YWwgPSAodmFsICYgVUFSVF9N Q1RMX1RYRklGT0ZJTExfTUFTSykgPj4gVUFSVF9NQ1RMX1RYRklGT0ZJTExfU0hJRlQ7Ci0JbWF4 X2NvdW50ID0gcG9ydC0+Zmlmb3NpemUgLSB2YWw7Ci0KLQl3aGlsZSAobWF4X2NvdW50LS0pIHsK LQkJdW5zaWduZWQgaW50IGM7Ci0KLQkJYyA9IHhtaXQtPmJ1Zlt4bWl0LT50YWlsXTsKLQkJYmNt X3VhcnRfd3JpdGVsKHBvcnQsIGMsIFVBUlRfRklGT19SRUcpOwotCQl4bWl0LT50YWlsID0gKHht aXQtPnRhaWwgKyAxKSAmIChVQVJUX1hNSVRfU0laRSAtIDEpOwotCQlwb3J0LT5pY291bnQudHgr KzsKLQkJaWYgKHVhcnRfY2lyY19lbXB0eSh4bWl0KSkKLQkJCWJyZWFrOwotCX0KIAotCWlmICh1 YXJ0X2NpcmNfY2hhcnNfcGVuZGluZyh4bWl0KSA8IFdBS0VVUF9DSEFSUykKLQkJdWFydF93cml0 ZV93YWtldXAocG9ydCk7Ci0KLQlpZiAodWFydF9jaXJjX2VtcHR5KHhtaXQpKQotCQlnb3RvIHR4 cV9lbXB0eTsKLQlyZXR1cm47CisJcGVuZGluZyA9IHVhcnRfcG9ydF90eF9saW1pdChwb3J0LCBw b3J0LT5maWZvc2l6ZSAtIHZhbCk7CisJaWYgKHBlbmRpbmcpCisJCXJldHVybjsKIAotdHhxX2Vt cHR5OgogCS8qIG5vdGhpbmcgdG8gc2VuZCwgZGlzYWJsZSB0cmFuc21pdCBpbnRlcnJ1cHQgKi8K IAl2YWwgPSBiY21fdWFydF9yZWFkbChwb3J0LCBVQVJUX0lSX1JFRyk7CiAJdmFsICY9IH5VQVJU X1RYX0lOVF9NQVNLOwogCWJjbV91YXJ0X3dyaXRlbChwb3J0LCB2YWwsIFVBUlRfSVJfUkVHKTsK LQlyZXR1cm47CiB9CiAKIC8qCkBAIC02MjksNiArNjAwLDcgQEAgc3RhdGljIGludCBiY21fdWFy dF92ZXJpZnlfcG9ydChzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0LAogLyogc2VyaWFsIGNvcmUgY2Fs bGJhY2tzICovCiBzdGF0aWMgY29uc3Qgc3RydWN0IHVhcnRfb3BzIGJjbV91YXJ0X29wcyA9IHsK IAkudHhfZW1wdHkJPSBiY21fdWFydF90eF9lbXB0eSwKKwkucHV0X2NoYXIJPSBiY21fdWFydF9w dXRfY2hhciwKIAkuZ2V0X21jdHJsCT0gYmNtX3VhcnRfZ2V0X21jdHJsLAogCS5zZXRfbWN0cmwJ PSBiY21fdWFydF9zZXRfbWN0cmwsCiAJLnN0YXJ0X3R4CT0gYmNtX3VhcnRfc3RhcnRfdHgsCmRp ZmYgLS1naXQgYS9kcml2ZXJzL3R0eS9zZXJpYWwvbXV4LmMgYi9kcml2ZXJzL3R0eS9zZXJpYWwv bXV4LmMKaW5kZXggNjQzZGZiY2M0M2Y5Li5lODY3MTg3ODhiNDkgMTAwNjQ0Ci0tLSBhL2RyaXZl cnMvdHR5L3NlcmlhbC9tdXguYworKysgYi9kcml2ZXJzL3R0eS9zZXJpYWwvbXV4LmMKQEAgLTEw Niw2ICsxMDYsMTggQEAgc3RhdGljIHVuc2lnbmVkIGludCBtdXhfdHhfZW1wdHkoc3RydWN0IHVh cnRfcG9ydCAqcG9ydCkKIAlyZXR1cm4gVUFSVF9HRVRfRklGT19DTlQocG9ydCkgPyAwIDogVElP Q1NFUl9URU1UOwogfSAKIAorc3RhdGljIHZvaWQgbXV4X3B1dF9jaGFyKHN0cnVjdCB1YXJ0X3Bv cnQgKnBvcnQsIHVuc2lnbmVkIGNoYXIgY2gpCit7CisJVUFSVF9QVVRfQ0hBUihwb3J0LCBjaCk7 Cit9CisKK3N0YXRpYyB2b2lkIG11eF90eF9kb25lKHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQpCit7 CisJLyogRklYTUUganM6IHJlYWxseSBuZWVkcyB0byB3YWl0PyAqLworCXdoaWxlIChVQVJUX0dF VF9GSUZPX0NOVChwb3J0KSkKKwkJdWRlbGF5KDEpOworfQorCiAvKioKICAqIG11eF9zZXRfbWN0 cmwgLSBTZXQgdGhlIGN1cnJlbnQgc3RhdGUgb2YgdGhlIG1vZGVtIGNvbnRyb2wgaW5wdXRzLgog ICogQHBvcnRzOiBQdHIgdG8gdGhlIHVhcnRfcG9ydC4KQEAgLTE4MCwzOSArMTkyLDcgQEAgc3Rh dGljIHZvaWQgbXV4X2JyZWFrX2N0bChzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0LCBpbnQgYnJlYWtf c3RhdGUpCiAgKi8KIHN0YXRpYyB2b2lkIG11eF93cml0ZShzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0 KQogewotCWludCBjb3VudDsKLQlzdHJ1Y3QgY2lyY19idWYgKnhtaXQgPSAmcG9ydC0+c3RhdGUt PnhtaXQ7Ci0KLQlpZihwb3J0LT54X2NoYXIpIHsKLQkJVUFSVF9QVVRfQ0hBUihwb3J0LCBwb3J0 LT54X2NoYXIpOwotCQlwb3J0LT5pY291bnQudHgrKzsKLQkJcG9ydC0+eF9jaGFyID0gMDsKLQkJ cmV0dXJuOwotCX0KLQotCWlmKHVhcnRfY2lyY19lbXB0eSh4bWl0KSB8fCB1YXJ0X3R4X3N0b3Bw ZWQocG9ydCkpIHsKLQkJbXV4X3N0b3BfdHgocG9ydCk7Ci0JCXJldHVybjsKLQl9Ci0KLQljb3Vu dCA9IChwb3J0LT5maWZvc2l6ZSkgLSBVQVJUX0dFVF9GSUZPX0NOVChwb3J0KTsKLQlkbyB7Ci0J CVVBUlRfUFVUX0NIQVIocG9ydCwgeG1pdC0+YnVmW3htaXQtPnRhaWxdKTsKLQkJeG1pdC0+dGFp bCA9ICh4bWl0LT50YWlsICsgMSkgJiAoVUFSVF9YTUlUX1NJWkUgLSAxKTsKLQkJcG9ydC0+aWNv dW50LnR4Kys7Ci0JCWlmKHVhcnRfY2lyY19lbXB0eSh4bWl0KSkKLQkJCWJyZWFrOwotCi0JfSB3 aGlsZSgtLWNvdW50ID4gMCk7Ci0KLQl3aGlsZShVQVJUX0dFVF9GSUZPX0NOVChwb3J0KSkgCi0J CXVkZWxheSgxKTsKLQotCWlmKHVhcnRfY2lyY19jaGFyc19wZW5kaW5nKHhtaXQpIDwgV0FLRVVQ X0NIQVJTKQotCQl1YXJ0X3dyaXRlX3dha2V1cChwb3J0KTsKLQotCWlmICh1YXJ0X2NpcmNfZW1w dHkoeG1pdCkpCi0JCW11eF9zdG9wX3R4KHBvcnQpOworCXVhcnRfcG9ydF90eF9saW1pdChwb3J0 LCBwb3J0LT5maWZvc2l6ZSAtIFVBUlRfR0VUX0ZJRk9fQ05UKHBvcnQpKTsKIH0KIAogLyoqCkBA IC00MjEsNiArNDAxLDggQEAgc3RhdGljIHN0cnVjdCBjb25zb2xlIG11eF9jb25zb2xlID0gewog CiBzdGF0aWMgY29uc3Qgc3RydWN0IHVhcnRfb3BzIG11eF9wb3BzID0gewogCS50eF9lbXB0eSA9 CQltdXhfdHhfZW1wdHksCisJLnB1dF9jaGFyID0JCW11eF9wdXRfY2hhciwKKwkudHhfZG9uZSA9 CQltdXhfdHhfZG9uZSwKIAkuc2V0X21jdHJsID0JCW11eF9zZXRfbWN0cmwsCiAJLmdldF9tY3Ry bCA9CQltdXhfZ2V0X21jdHJsLAogCS5zdG9wX3R4ID0JCW11eF9zdG9wX3R4LApkaWZmIC0tZ2l0 IGEvZHJpdmVycy90dHkvc2VyaWFsL212ZWJ1LXVhcnQuYyBiL2RyaXZlcnMvdHR5L3NlcmlhbC9t dmVidS11YXJ0LmMKaW5kZXggMDQyOWMyYTU0MjkwLi4zZDA3YWI5ZWIxNWUgMTAwNjQ0Ci0tLSBh L2RyaXZlcnMvdHR5L3NlcmlhbC9tdmVidS11YXJ0LmMKKysrIGIvZHJpdmVycy90dHkvc2VyaWFs L212ZWJ1LXVhcnQuYwpAQCAtMTk0LDYgKzE5NCwxNiBAQCBzdGF0aWMgdW5zaWduZWQgaW50IG12 ZWJ1X3VhcnRfdHhfZW1wdHkoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCkKIAlyZXR1cm4gKHN0ICYg U1RBVF9UWF9FTVApID8gVElPQ1NFUl9URU1UIDogMDsKIH0KIAorc3RhdGljIGJvb2wgbXZlYnVf dWFydF90eF9yZWFkeShzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0KQoreworCXJldHVybiAhKHJlYWRs KHBvcnQtPm1lbWJhc2UgKyBVQVJUX1NUQVQpICYgU1RBVF9UWF9GSUZPX0ZVTCk7Cit9CisKK3N0 YXRpYyB2b2lkIG12ZWJ1X3VhcnRfcHV0X2NoYXIoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCwgdW5z aWduZWQgY2hhciBjaCkKK3sKKwl3cml0ZWwoY2gsIHBvcnQtPm1lbWJhc2UgKyBVQVJUX1RTSChw b3J0KSk7Cit9CisKIHN0YXRpYyB1bnNpZ25lZCBpbnQgbXZlYnVfdWFydF9nZXRfbWN0cmwoc3Ry dWN0IHVhcnRfcG9ydCAqcG9ydCkKIHsKIAlyZXR1cm4gVElPQ01fQ1RTIHwgVElPQ01fRFNSIHwg VElPQ01fQ0FSOwpAQCAtMzI0LDQwICszMzQsNyBAQCBzdGF0aWMgdm9pZCBtdmVidV91YXJ0X3J4 X2NoYXJzKHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQsIHVuc2lnbmVkIGludCBzdGF0dXMpCiAKIHN0 YXRpYyB2b2lkIG12ZWJ1X3VhcnRfdHhfY2hhcnMoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCwgdW5z aWduZWQgaW50IHN0YXR1cykKIHsKLQlzdHJ1Y3QgY2lyY19idWYgKnhtaXQgPSAmcG9ydC0+c3Rh dGUtPnhtaXQ7Ci0JdW5zaWduZWQgaW50IGNvdW50OwotCXVuc2lnbmVkIGludCBzdDsKLQotCWlm IChwb3J0LT54X2NoYXIpIHsKLQkJd3JpdGVsKHBvcnQtPnhfY2hhciwgcG9ydC0+bWVtYmFzZSAr IFVBUlRfVFNIKHBvcnQpKTsKLQkJcG9ydC0+aWNvdW50LnR4Kys7Ci0JCXBvcnQtPnhfY2hhciA9 IDA7Ci0JCXJldHVybjsKLQl9Ci0KLQlpZiAodWFydF9jaXJjX2VtcHR5KHhtaXQpIHx8IHVhcnRf dHhfc3RvcHBlZChwb3J0KSkgewotCQltdmVidV91YXJ0X3N0b3BfdHgocG9ydCk7Ci0JCXJldHVy bjsKLQl9Ci0KLQlmb3IgKGNvdW50ID0gMDsgY291bnQgPCBwb3J0LT5maWZvc2l6ZTsgY291bnQr KykgewotCQl3cml0ZWwoeG1pdC0+YnVmW3htaXQtPnRhaWxdLCBwb3J0LT5tZW1iYXNlICsgVUFS VF9UU0gocG9ydCkpOwotCQl4bWl0LT50YWlsID0gKHhtaXQtPnRhaWwgKyAxKSAmIChVQVJUX1hN SVRfU0laRSAtIDEpOwotCQlwb3J0LT5pY291bnQudHgrKzsKLQotCQlpZiAodWFydF9jaXJjX2Vt cHR5KHhtaXQpKQotCQkJYnJlYWs7Ci0KLQkJc3QgPSByZWFkbChwb3J0LT5tZW1iYXNlICsgVUFS VF9TVEFUKTsKLQkJaWYgKHN0ICYgU1RBVF9UWF9GSUZPX0ZVTCkKLQkJCWJyZWFrOwotCX0KLQot CWlmICh1YXJ0X2NpcmNfY2hhcnNfcGVuZGluZyh4bWl0KSA8IFdBS0VVUF9DSEFSUykKLQkJdWFy dF93cml0ZV93YWtldXAocG9ydCk7Ci0KLQlpZiAodWFydF9jaXJjX2VtcHR5KHhtaXQpKQotCQlt dmVidV91YXJ0X3N0b3BfdHgocG9ydCk7CisJdWFydF9wb3J0X3R4X2xpbWl0KHBvcnQsIHBvcnQt PmZpZm9zaXplKTsKIH0KIAogc3RhdGljIGlycXJldHVybl90IG12ZWJ1X3VhcnRfaXNyKGludCBp cnEsIHZvaWQgKmRldl9pZCkKQEAgLTY1NCw2ICs2MzEsOCBAQCBzdGF0aWMgdm9pZCBtdmVidV91 YXJ0X3B1dF9wb2xsX2NoYXIoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCwgdW5zaWduZWQgY2hhciBj KQogCiBzdGF0aWMgY29uc3Qgc3RydWN0IHVhcnRfb3BzIG12ZWJ1X3VhcnRfb3BzID0gewogCS50 eF9lbXB0eQk9IG12ZWJ1X3VhcnRfdHhfZW1wdHksCisJLnR4X3JlYWR5CT0gbXZlYnVfdWFydF90 eF9yZWFkeSwKKwkucHV0X2NoYXIJPSBtdmVidV91YXJ0X3B1dF9jaGFyLAogCS5zZXRfbWN0cmwJ PSBtdmVidV91YXJ0X3NldF9tY3RybCwKIAkuZ2V0X21jdHJsCT0gbXZlYnVfdWFydF9nZXRfbWN0 cmwsCiAJLnN0b3BfdHgJPSBtdmVidV91YXJ0X3N0b3BfdHgsCmRpZmYgLS1naXQgYS9kcml2ZXJz L3R0eS9zZXJpYWwvb21hcC1zZXJpYWwuYyBiL2RyaXZlcnMvdHR5L3NlcmlhbC9vbWFwLXNlcmlh bC5jCmluZGV4IDhkNWZmYTE5NjA5Ny4uYTY0NDZiZWY0OWYxIDEwMDY0NAotLS0gYS9kcml2ZXJz L3R0eS9zZXJpYWwvb21hcC1zZXJpYWwuYworKysgYi9kcml2ZXJzL3R0eS9zZXJpYWwvb21hcC1z ZXJpYWwuYwpAQCAtMzM2LDQ1ICszMzYsNiBAQCBzdGF0aWMgdm9pZCBzZXJpYWxfb21hcF9zdG9w X3J4KHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQpCiAJc2VyaWFsX291dCh1cCwgVUFSVF9JRVIsIHVw LT5pZXIpOwogfQogCi1zdGF0aWMgdm9pZCB0cmFuc21pdF9jaGFycyhzdHJ1Y3QgdWFydF9vbWFw X3BvcnQgKnVwLCB1bnNpZ25lZCBpbnQgbHNyKQotewotCXN0cnVjdCBjaXJjX2J1ZiAqeG1pdCA9 ICZ1cC0+cG9ydC5zdGF0ZS0+eG1pdDsKLQlpbnQgY291bnQ7Ci0KLQlpZiAodXAtPnBvcnQueF9j aGFyKSB7Ci0JCXNlcmlhbF9vdXQodXAsIFVBUlRfVFgsIHVwLT5wb3J0LnhfY2hhcik7Ci0JCXVw LT5wb3J0Lmljb3VudC50eCsrOwotCQl1cC0+cG9ydC54X2NoYXIgPSAwOwotCQlpZiAoKHVwLT5w b3J0LnJzNDg1LmZsYWdzICYgU0VSX1JTNDg1X0VOQUJMRUQpICYmCi0JCSAgICAhKHVwLT5wb3J0 LnJzNDg1LmZsYWdzICYgU0VSX1JTNDg1X1JYX0RVUklOR19UWCkpCi0JCQl1cC0+cnM0ODVfdHhf ZmlsdGVyX2NvdW50Kys7Ci0KLQkJcmV0dXJuOwotCX0KLQlpZiAodWFydF9jaXJjX2VtcHR5KHht aXQpIHx8IHVhcnRfdHhfc3RvcHBlZCgmdXAtPnBvcnQpKSB7Ci0JCXNlcmlhbF9vbWFwX3N0b3Bf dHgoJnVwLT5wb3J0KTsKLQkJcmV0dXJuOwotCX0KLQljb3VudCA9IHVwLT5wb3J0LmZpZm9zaXpl IC8gNDsKLQlkbyB7Ci0JCXNlcmlhbF9vdXQodXAsIFVBUlRfVFgsIHhtaXQtPmJ1Zlt4bWl0LT50 YWlsXSk7Ci0JCXhtaXQtPnRhaWwgPSAoeG1pdC0+dGFpbCArIDEpICYgKFVBUlRfWE1JVF9TSVpF IC0gMSk7Ci0JCXVwLT5wb3J0Lmljb3VudC50eCsrOwotCQlpZiAoKHVwLT5wb3J0LnJzNDg1LmZs YWdzICYgU0VSX1JTNDg1X0VOQUJMRUQpICYmCi0JCSAgICAhKHVwLT5wb3J0LnJzNDg1LmZsYWdz ICYgU0VSX1JTNDg1X1JYX0RVUklOR19UWCkpCi0JCQl1cC0+cnM0ODVfdHhfZmlsdGVyX2NvdW50 Kys7Ci0KLQkJaWYgKHVhcnRfY2lyY19lbXB0eSh4bWl0KSkKLQkJCWJyZWFrOwotCX0gd2hpbGUg KC0tY291bnQgPiAwKTsKLQotCWlmICh1YXJ0X2NpcmNfY2hhcnNfcGVuZGluZyh4bWl0KSA8IFdB S0VVUF9DSEFSUykKLQkJdWFydF93cml0ZV93YWtldXAoJnVwLT5wb3J0KTsKLQotCWlmICh1YXJ0 X2NpcmNfZW1wdHkoeG1pdCkpCi0JCXNlcmlhbF9vbWFwX3N0b3BfdHgoJnVwLT5wb3J0KTsKLX0K LQogc3RhdGljIGlubGluZSB2b2lkIHNlcmlhbF9vbWFwX2VuYWJsZV9pZXJfdGhyaShzdHJ1Y3Qg dWFydF9vbWFwX3BvcnQgKnVwKQogewogCWlmICghKHVwLT5pZXIgJiBVQVJUX0lFUl9USFJJKSkg ewpAQCAtNTcyLDcgKzUzMyw3IEBAIHN0YXRpYyBpcnFyZXR1cm5fdCBzZXJpYWxfb21hcF9pcnEo aW50IGlycSwgdm9pZCAqZGV2X2lkKQogCQkJY2hlY2tfbW9kZW1fc3RhdHVzKHVwKTsKIAkJCWJy ZWFrOwogCQljYXNlIFVBUlRfSUlSX1RIUkk6Ci0JCQl0cmFuc21pdF9jaGFycyh1cCwgbHNyKTsK KwkJCXVhcnRfcG9ydF90eF9saW1pdCgmdXAtPnBvcnQsIHVwLT5wb3J0LmZpZm9zaXplIC8gNCk7 CiAJCQlicmVhazsKIAkJY2FzZSBVQVJUX0lJUl9SWF9USU1FT1VUOgogCQljYXNlIFVBUlRfSUlS X1JESToKQEAgLTYxMyw2ICs1NzQsMTcgQEAgc3RhdGljIHVuc2lnbmVkIGludCBzZXJpYWxfb21h cF90eF9lbXB0eShzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0KQogCXJldHVybiByZXQ7CiB9CiAKK3N0 YXRpYyB2b2lkIHNlcmlhbF9vbWFwX3B1dF9jaGFyKHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQsIHVu c2lnbmVkIGNoYXIgY2gpCit7CisJc3RydWN0IHVhcnRfb21hcF9wb3J0ICp1cCA9IHRvX3VhcnRf b21hcF9wb3J0KHBvcnQpOworCisJc2VyaWFsX291dCh1cCwgVUFSVF9UWCwgY2gpOworCisJaWYg KCh1cC0+cG9ydC5yczQ4NS5mbGFncyAmIFNFUl9SUzQ4NV9FTkFCTEVEKSAmJgorCSAgICAhKHVw LT5wb3J0LnJzNDg1LmZsYWdzICYgU0VSX1JTNDg1X1JYX0RVUklOR19UWCkpCisJCXVwLT5yczQ4 NV90eF9maWx0ZXJfY291bnQrKzsKK30KKwogc3RhdGljIHVuc2lnbmVkIGludCBzZXJpYWxfb21h cF9nZXRfbWN0cmwoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCkKIHsKIAlzdHJ1Y3QgdWFydF9vbWFw X3BvcnQgKnVwID0gdG9fdWFydF9vbWFwX3BvcnQocG9ydCk7CkBAIC0xMzY5LDYgKzEzNDEsNyBA QCBzZXJpYWxfb21hcF9jb25maWdfcnM0ODUoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCwgc3RydWN0 IHNlcmlhbF9yczQ4NSAqcnM0ODUpCiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3QgdWFydF9vcHMgc2Vy aWFsX29tYXBfcG9wcyA9IHsKIAkudHhfZW1wdHkJPSBzZXJpYWxfb21hcF90eF9lbXB0eSwKKwku cHV0X2NoYXIJPSBzZXJpYWxfb21hcF9wdXRfY2hhciwKIAkuc2V0X21jdHJsCT0gc2VyaWFsX29t YXBfc2V0X21jdHJsLAogCS5nZXRfbWN0cmwJPSBzZXJpYWxfb21hcF9nZXRfbWN0cmwsCiAJLnN0 b3BfdHgJPSBzZXJpYWxfb21hcF9zdG9wX3R4LApkaWZmIC0tZ2l0IGEvZHJpdmVycy90dHkvc2Vy aWFsL3B4YS5jIGIvZHJpdmVycy90dHkvc2VyaWFsL3B4YS5jCmluZGV4IGU4MGJhOGUxMDQwNy4u MTgyYmYyZGU1ZTI5IDEwMDY0NAotLS0gYS9kcml2ZXJzL3R0eS9zZXJpYWwvcHhhLmMKKysrIGIv ZHJpdmVycy90dHkvc2VyaWFsL3B4YS5jCkBAIC0xNzEsMzkgKzE3MSw2IEBAIHN0YXRpYyBpbmxp bmUgdm9pZCByZWNlaXZlX2NoYXJzKHN0cnVjdCB1YXJ0X3B4YV9wb3J0ICp1cCwgaW50ICpzdGF0 dXMpCiAJc2VyaWFsX291dCh1cCwgVUFSVF9JRVIsIHVwLT5pZXIpOwogfQogCi1zdGF0aWMgdm9p ZCB0cmFuc21pdF9jaGFycyhzdHJ1Y3QgdWFydF9weGFfcG9ydCAqdXApCi17Ci0Jc3RydWN0IGNp cmNfYnVmICp4bWl0ID0gJnVwLT5wb3J0LnN0YXRlLT54bWl0OwotCWludCBjb3VudDsKLQotCWlm ICh1cC0+cG9ydC54X2NoYXIpIHsKLQkJc2VyaWFsX291dCh1cCwgVUFSVF9UWCwgdXAtPnBvcnQu eF9jaGFyKTsKLQkJdXAtPnBvcnQuaWNvdW50LnR4Kys7Ci0JCXVwLT5wb3J0LnhfY2hhciA9IDA7 Ci0JCXJldHVybjsKLQl9Ci0JaWYgKHVhcnRfY2lyY19lbXB0eSh4bWl0KSB8fCB1YXJ0X3R4X3N0 b3BwZWQoJnVwLT5wb3J0KSkgewotCQlzZXJpYWxfcHhhX3N0b3BfdHgoJnVwLT5wb3J0KTsKLQkJ cmV0dXJuOwotCX0KLQotCWNvdW50ID0gdXAtPnBvcnQuZmlmb3NpemUgLyAyOwotCWRvIHsKLQkJ c2VyaWFsX291dCh1cCwgVUFSVF9UWCwgeG1pdC0+YnVmW3htaXQtPnRhaWxdKTsKLQkJeG1pdC0+ dGFpbCA9ICh4bWl0LT50YWlsICsgMSkgJiAoVUFSVF9YTUlUX1NJWkUgLSAxKTsKLQkJdXAtPnBv cnQuaWNvdW50LnR4Kys7Ci0JCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkpCi0JCQlicmVhazsK LQl9IHdoaWxlICgtLWNvdW50ID4gMCk7Ci0KLQlpZiAodWFydF9jaXJjX2NoYXJzX3BlbmRpbmco eG1pdCkgPCBXQUtFVVBfQ0hBUlMpCi0JCXVhcnRfd3JpdGVfd2FrZXVwKCZ1cC0+cG9ydCk7Ci0K LQotCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkpCi0JCXNlcmlhbF9weGFfc3RvcF90eCgmdXAt PnBvcnQpOwotfQotCiBzdGF0aWMgdm9pZCBzZXJpYWxfcHhhX3N0YXJ0X3R4KHN0cnVjdCB1YXJ0 X3BvcnQgKnBvcnQpCiB7CiAJc3RydWN0IHVhcnRfcHhhX3BvcnQgKnVwID0gKHN0cnVjdCB1YXJ0 X3B4YV9wb3J0ICopcG9ydDsKQEAgLTI1Myw3ICsyMjAsNyBAQCBzdGF0aWMgaW5saW5lIGlycXJl dHVybl90IHNlcmlhbF9weGFfaXJxKGludCBpcnEsIHZvaWQgKmRldl9pZCkKIAkJcmVjZWl2ZV9j aGFycyh1cCwgJmxzcik7CiAJY2hlY2tfbW9kZW1fc3RhdHVzKHVwKTsKIAlpZiAobHNyICYgVUFS VF9MU1JfVEhSRSkKLQkJdHJhbnNtaXRfY2hhcnModXApOworCQl1YXJ0X3BvcnRfdHhfbGltaXQo JnVwLT5wb3J0LCB1cC0+cG9ydC5maWZvc2l6ZSAvIDIpOwogCXNwaW5fdW5sb2NrKCZ1cC0+cG9y dC5sb2NrKTsKIAlyZXR1cm4gSVJRX0hBTkRMRUQ7CiB9CkBAIC0yNzEsNiArMjM4LDEzIEBAIHN0 YXRpYyB1bnNpZ25lZCBpbnQgc2VyaWFsX3B4YV90eF9lbXB0eShzdHJ1Y3QgdWFydF9wb3J0ICpw b3J0KQogCXJldHVybiByZXQ7CiB9CiAKK3N0YXRpYyB2b2lkIHNlcmlhbF9weGFfcHV0X2NoYXIo c3RydWN0IHVhcnRfcG9ydCAqcG9ydCwgdW5zaWduZWQgY2hhciBjaCkKK3sKKwlzdHJ1Y3QgdWFy dF9weGFfcG9ydCAqdXAgPSAoc3RydWN0IHVhcnRfcHhhX3BvcnQgKilwb3J0OworCisJc2VyaWFs X291dCh1cCwgVUFSVF9UWCwgY2gpOworfQorCiBzdGF0aWMgdW5zaWduZWQgaW50IHNlcmlhbF9w eGFfZ2V0X21jdHJsKHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQpCiB7CiAJc3RydWN0IHVhcnRfcHhh X3BvcnQgKnVwID0gKHN0cnVjdCB1YXJ0X3B4YV9wb3J0ICopcG9ydDsKQEAgLTc0Miw2ICs3MTYs NyBAQCBzdGF0aWMgc3RydWN0IGNvbnNvbGUgc2VyaWFsX3B4YV9jb25zb2xlID0gewogCiBzdGF0 aWMgY29uc3Qgc3RydWN0IHVhcnRfb3BzIHNlcmlhbF9weGFfcG9wcyA9IHsKIAkudHhfZW1wdHkJ PSBzZXJpYWxfcHhhX3R4X2VtcHR5LAorCS5wdXRfY2hhcgk9IHNlcmlhbF9weGFfcHV0X2NoYXIs CiAJLnNldF9tY3RybAk9IHNlcmlhbF9weGFfc2V0X21jdHJsLAogCS5nZXRfbWN0cmwJPSBzZXJp YWxfcHhhX2dldF9tY3RybCwKIAkuc3RvcF90eAk9IHNlcmlhbF9weGFfc3RvcF90eCwKZGlmZiAt LWdpdCBhL2RyaXZlcnMvdHR5L3NlcmlhbC9ycDIuYyBiL2RyaXZlcnMvdHR5L3NlcmlhbC9ycDIu YwppbmRleCA2Njg5ZDhhZGQ4ZjcuLjE4NzI1ZmU5MDI4YyAxMDA2NDQKLS0tIGEvZHJpdmVycy90 dHkvc2VyaWFsL3JwMi5jCisrKyBiL2RyaXZlcnMvdHR5L3NlcmlhbC9ycDIuYwpAQCAtMjgzLDYg KzI4MywxMyBAQCBzdGF0aWMgdW5zaWduZWQgaW50IHJwMl91YXJ0X3R4X2VtcHR5KHN0cnVjdCB1 YXJ0X3BvcnQgKnBvcnQpCiAJcmV0dXJuIHR4X2ZpZm9fYnl0ZXMgPyAwIDogVElPQ1NFUl9URU1U OwogfQogCitzdGF0aWMgdm9pZCBycDJfcHV0X2NoYXIoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCwg dW5zaWduZWQgY2hhciBjaCkKK3sKKwlzdHJ1Y3QgcnAyX3VhcnRfcG9ydCAqdXAgPSBwb3J0X3Rv X3VwKHBvcnQpOworCisJd3JpdGViKGNoLCB1cC0+YmFzZSArIFJQMl9EQVRBX0JZVEUpOworfQor CiBzdGF0aWMgdW5zaWduZWQgaW50IHJwMl91YXJ0X2dldF9tY3RybChzdHJ1Y3QgdWFydF9wb3J0 ICpwb3J0KQogewogCXN0cnVjdCBycDJfdWFydF9wb3J0ICp1cCA9IHBvcnRfdG9fdXAocG9ydCk7 CkBAIC00MjgsMzIgKzQzNSw4IEBAIHN0YXRpYyB2b2lkIHJwMl9yeF9jaGFycyhzdHJ1Y3QgcnAy X3VhcnRfcG9ydCAqdXApCiAKIHN0YXRpYyB2b2lkIHJwMl90eF9jaGFycyhzdHJ1Y3QgcnAyX3Vh cnRfcG9ydCAqdXApCiB7Ci0JdTE2IG1heF90eCA9IEZJRk9fU0laRSAtIHJlYWR3KHVwLT5iYXNl ICsgUlAyX1RYX0ZJRk9fQ09VTlQpOwotCXN0cnVjdCBjaXJjX2J1ZiAqeG1pdCA9ICZ1cC0+cG9y dC5zdGF0ZS0+eG1pdDsKLQotCWlmICh1YXJ0X3R4X3N0b3BwZWQoJnVwLT5wb3J0KSkgewotCQly cDJfdWFydF9zdG9wX3R4KCZ1cC0+cG9ydCk7Ci0JCXJldHVybjsKLQl9Ci0KLQlmb3IgKDsgbWF4 X3R4ICE9IDA7IG1heF90eC0tKSB7Ci0JCWlmICh1cC0+cG9ydC54X2NoYXIpIHsKLQkJCXdyaXRl Yih1cC0+cG9ydC54X2NoYXIsIHVwLT5iYXNlICsgUlAyX0RBVEFfQllURSk7Ci0JCQl1cC0+cG9y dC54X2NoYXIgPSAwOwotCQkJdXAtPnBvcnQuaWNvdW50LnR4Kys7Ci0JCQljb250aW51ZTsKLQkJ fQotCQlpZiAodWFydF9jaXJjX2VtcHR5KHhtaXQpKSB7Ci0JCQlycDJfdWFydF9zdG9wX3R4KCZ1 cC0+cG9ydCk7Ci0JCQlicmVhazsKLQkJfQotCQl3cml0ZWIoeG1pdC0+YnVmW3htaXQtPnRhaWxd LCB1cC0+YmFzZSArIFJQMl9EQVRBX0JZVEUpOwotCQl4bWl0LT50YWlsID0gKHhtaXQtPnRhaWwg KyAxKSAmIChVQVJUX1hNSVRfU0laRSAtIDEpOwotCQl1cC0+cG9ydC5pY291bnQudHgrKzsKLQl9 Ci0KLQlpZiAodWFydF9jaXJjX2NoYXJzX3BlbmRpbmcoeG1pdCkgPCBXQUtFVVBfQ0hBUlMpCi0J CXVhcnRfd3JpdGVfd2FrZXVwKCZ1cC0+cG9ydCk7CisJdWFydF9wb3J0X3R4X2xpbWl0KCZ1cC0+ cG9ydCwKKwkJCUZJRk9fU0laRSAtIHJlYWR3KHVwLT5iYXNlICsgUlAyX1RYX0ZJRk9fQ09VTlQp KTsKIH0KIAogc3RhdGljIHZvaWQgcnAyX2NoX2ludGVycnVwdChzdHJ1Y3QgcnAyX3VhcnRfcG9y dCAqdXApCkBAIC01NzUsNiArNTU4LDcgQEAgc3RhdGljIGludCBycDJfdWFydF92ZXJpZnlfcG9y dChzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0LAogCiBzdGF0aWMgY29uc3Qgc3RydWN0IHVhcnRfb3Bz IHJwMl91YXJ0X29wcyA9IHsKIAkudHhfZW1wdHkJPSBycDJfdWFydF90eF9lbXB0eSwKKwkucHV0 X2NoYXIJPSBycDJfcHV0X2NoYXIsCiAJLnNldF9tY3RybAk9IHJwMl91YXJ0X3NldF9tY3RybCwK IAkuZ2V0X21jdHJsCT0gcnAyX3VhcnRfZ2V0X21jdHJsLAogCS5zdG9wX3R4CT0gcnAyX3VhcnRf c3RvcF90eCwKZGlmZiAtLWdpdCBhL2RyaXZlcnMvdHR5L3NlcmlhbC9zZXJpYWxfdHh4OS5jIGIv ZHJpdmVycy90dHkvc2VyaWFsL3NlcmlhbF90eHg5LmMKaW5kZXggMjIxM2U2Yjg0MWQzLi40MWI0 YjMzYjExMGUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvdHR5L3NlcmlhbC9zZXJpYWxfdHh4OS5jCisr KyBiL2RyaXZlcnMvdHR5L3NlcmlhbC9zZXJpYWxfdHh4OS5jCkBAIC0zMTksMzggKzMxOSw2IEBA IHJlY2VpdmVfY2hhcnMoc3RydWN0IHVhcnRfcG9ydCAqdXAsIHVuc2lnbmVkIGludCAqc3RhdHVz KQogCSpzdGF0dXMgPSBkaXNyOwogfQogCi1zdGF0aWMgaW5saW5lIHZvaWQgdHJhbnNtaXRfY2hh cnMoc3RydWN0IHVhcnRfcG9ydCAqdXApCi17Ci0Jc3RydWN0IGNpcmNfYnVmICp4bWl0ID0gJnVw LT5zdGF0ZS0+eG1pdDsKLQlpbnQgY291bnQ7Ci0KLQlpZiAodXAtPnhfY2hhcikgewotCQlzaW9f b3V0KHVwLCBUWFg5X1NJVEZJRk8sIHVwLT54X2NoYXIpOwotCQl1cC0+aWNvdW50LnR4Kys7Ci0J CXVwLT54X2NoYXIgPSAwOwotCQlyZXR1cm47Ci0JfQotCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1p dCkgfHwgdWFydF90eF9zdG9wcGVkKHVwKSkgewotCQlzZXJpYWxfdHh4OV9zdG9wX3R4KHVwKTsK LQkJcmV0dXJuOwotCX0KLQotCWNvdW50ID0gVFhYOV9TSU9fVFhfRklGTzsKLQlkbyB7Ci0JCXNp b19vdXQodXAsIFRYWDlfU0lURklGTywgeG1pdC0+YnVmW3htaXQtPnRhaWxdKTsKLQkJeG1pdC0+ dGFpbCA9ICh4bWl0LT50YWlsICsgMSkgJiAoVUFSVF9YTUlUX1NJWkUgLSAxKTsKLQkJdXAtPmlj b3VudC50eCsrOwotCQlpZiAodWFydF9jaXJjX2VtcHR5KHhtaXQpKQotCQkJYnJlYWs7Ci0JfSB3 aGlsZSAoLS1jb3VudCA+IDApOwotCi0JaWYgKHVhcnRfY2lyY19jaGFyc19wZW5kaW5nKHhtaXQp IDwgV0FLRVVQX0NIQVJTKQotCQl1YXJ0X3dyaXRlX3dha2V1cCh1cCk7Ci0KLQlpZiAodWFydF9j aXJjX2VtcHR5KHhtaXQpKQotCQlzZXJpYWxfdHh4OV9zdG9wX3R4KHVwKTsKLX0KLQogc3RhdGlj IGlycXJldHVybl90IHNlcmlhbF90eHg5X2ludGVycnVwdChpbnQgaXJxLCB2b2lkICpkZXZfaWQp CiB7CiAJaW50IHBhc3NfY291bnRlciA9IDA7CkBAIC0zNzEsNyArMzM5LDcgQEAgc3RhdGljIGly cXJldHVybl90IHNlcmlhbF90eHg5X2ludGVycnVwdChpbnQgaXJxLCB2b2lkICpkZXZfaWQpCiAJ CWlmIChzdGF0dXMgJiBUWFg5X1NJRElTUl9SRElTKQogCQkJcmVjZWl2ZV9jaGFycyh1cCwgJnN0 YXR1cyk7CiAJCWlmIChzdGF0dXMgJiBUWFg5X1NJRElTUl9URElTKQotCQkJdHJhbnNtaXRfY2hh cnModXApOworCQkJdWFydF9wb3J0X3R4X2xpbWl0KHVwLCBUWFg5X1NJT19UWF9GSUZPKTsKIAkJ LyogQ2xlYXIgVFgvUlggSW50LiBTdGF0dXMgKi8KIAkJc2lvX21hc2sodXAsIFRYWDlfU0lESVNS LAogCQkJIFRYWDlfU0lESVNSX1RESVMgfCBUWFg5X1NJRElTUl9SRElTIHwKQEAgLTM5Nyw2ICsz NjUsMTEgQEAgc3RhdGljIHVuc2lnbmVkIGludCBzZXJpYWxfdHh4OV90eF9lbXB0eShzdHJ1Y3Qg dWFydF9wb3J0ICp1cCkKIAlyZXR1cm4gcmV0OwogfQogCitzdGF0aWMgdm9pZCBzZXJpYWxfdHh4 OV9wdXRfY2hhcihzdHJ1Y3QgdWFydF9wb3J0ICp1cCwgdW5zaWduZWQgY2hhciBjaCkKK3sKKwlz aW9fb3V0KHVwLCBUWFg5X1NJVEZJRk8sIGNoKTsKK30KKwogc3RhdGljIHVuc2lnbmVkIGludCBz ZXJpYWxfdHh4OV9nZXRfbWN0cmwoc3RydWN0IHVhcnRfcG9ydCAqdXApCiB7CiAJdW5zaWduZWQg aW50IHJldDsKQEAgLTgxMCw2ICs3ODMsNyBAQCBzZXJpYWxfdHh4OV90eXBlKHN0cnVjdCB1YXJ0 X3BvcnQgKnBvcnQpCiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3QgdWFydF9vcHMgc2VyaWFsX3R4eDlf cG9wcyA9IHsKIAkudHhfZW1wdHkJPSBzZXJpYWxfdHh4OV90eF9lbXB0eSwKKwkucHV0X2NoYXIJ PSBzZXJpYWxfdHh4OV9wdXRfY2hhciwKIAkuc2V0X21jdHJsCT0gc2VyaWFsX3R4eDlfc2V0X21j dHJsLAogCS5nZXRfbWN0cmwJPSBzZXJpYWxfdHh4OV9nZXRfbWN0cmwsCiAJLnN0b3BfdHgJPSBz ZXJpYWxfdHh4OV9zdG9wX3R4LApkaWZmIC0tZ2l0IGEvZHJpdmVycy90dHkvc2VyaWFsL3NpZml2 ZS5jIGIvZHJpdmVycy90dHkvc2VyaWFsL3NpZml2ZS5jCmluZGV4IGY1YWMxNGMzODRjNC4uN2Vj OWVmNzMyZWI4IDEwMDY0NAotLS0gYS9kcml2ZXJzL3R0eS9zZXJpYWwvc2lmaXZlLmMKKysrIGIv ZHJpdmVycy90dHkvc2VyaWFsL3NpZml2ZS5jCkBAIC0yODksNDYgKzI4OSw2IEBAIHN0YXRpYyB2 b2lkIF9fc3NwX3RyYW5zbWl0X2NoYXIoc3RydWN0IHNpZml2ZV9zZXJpYWxfcG9ydCAqc3NwLCBp bnQgY2gpCiAJX19zc3Bfd3JpdGVsKGNoLCBTSUZJVkVfU0VSSUFMX1RYREFUQV9PRkZTLCBzc3Ap OwogfQogCi0vKioKLSAqIF9fc3NwX3RyYW5zbWl0X2NoYXJzKCkgLSBlbnF1ZXVlIG11bHRpcGxl IGJ5dGVzIG9udG8gdGhlIFRYIEZJRk8KLSAqIEBzc3A6IHBvaW50ZXIgdG8gYSBzdHJ1Y3Qgc2lm aXZlX3NlcmlhbF9wb3J0Ci0gKgotICogVHJhbnNmZXIgdXAgdG8gYSBUWCBGSUZPIHNpemUncyB3 b3J0aCBvZiBjaGFyYWN0ZXJzIGZyb20gdGhlIExpbnV4IHNlcmlhbAotICogdHJhbnNtaXQgYnVm ZmVyIHRvIHRoZSBTaUZpdmUgVUFSVCBUWCBGSUZPLgotICoKLSAqIENvbnRleHQ6IEFueSBjb250 ZXh0LiAgRXhwZWN0cyBAc3NwLT5wb3J0LmxvY2sgdG8gYmUgaGVsZCBieSBjYWxsZXIuCi0gKi8K LXN0YXRpYyB2b2lkIF9fc3NwX3RyYW5zbWl0X2NoYXJzKHN0cnVjdCBzaWZpdmVfc2VyaWFsX3Bv cnQgKnNzcCkKLXsKLQlzdHJ1Y3QgY2lyY19idWYgKnhtaXQgPSAmc3NwLT5wb3J0LnN0YXRlLT54 bWl0OwotCWludCBjb3VudDsKLQotCWlmIChzc3AtPnBvcnQueF9jaGFyKSB7Ci0JCV9fc3NwX3Ry YW5zbWl0X2NoYXIoc3NwLCBzc3AtPnBvcnQueF9jaGFyKTsKLQkJc3NwLT5wb3J0Lmljb3VudC50 eCsrOwotCQlzc3AtPnBvcnQueF9jaGFyID0gMDsKLQkJcmV0dXJuOwotCX0KLQlpZiAodWFydF9j aXJjX2VtcHR5KHhtaXQpIHx8IHVhcnRfdHhfc3RvcHBlZCgmc3NwLT5wb3J0KSkgewotCQlzaWZp dmVfc2VyaWFsX3N0b3BfdHgoJnNzcC0+cG9ydCk7Ci0JCXJldHVybjsKLQl9Ci0JY291bnQgPSBT SUZJVkVfVFhfRklGT19ERVBUSDsKLQlkbyB7Ci0JCV9fc3NwX3RyYW5zbWl0X2NoYXIoc3NwLCB4 bWl0LT5idWZbeG1pdC0+dGFpbF0pOwotCQl4bWl0LT50YWlsID0gKHhtaXQtPnRhaWwgKyAxKSAm IChVQVJUX1hNSVRfU0laRSAtIDEpOwotCQlzc3AtPnBvcnQuaWNvdW50LnR4Kys7Ci0JCWlmICh1 YXJ0X2NpcmNfZW1wdHkoeG1pdCkpCi0JCQlicmVhazsKLQl9IHdoaWxlICgtLWNvdW50ID4gMCk7 Ci0KLQlpZiAodWFydF9jaXJjX2NoYXJzX3BlbmRpbmcoeG1pdCkgPCBXQUtFVVBfQ0hBUlMpCi0J CXVhcnRfd3JpdGVfd2FrZXVwKCZzc3AtPnBvcnQpOwotCi0JaWYgKHVhcnRfY2lyY19lbXB0eSh4 bWl0KSkKLQkJc2lmaXZlX3NlcmlhbF9zdG9wX3R4KCZzc3AtPnBvcnQpOwotfQotCiAvKioKICAq IF9fc3NwX2VuYWJsZV90eHdtKCkgLSBlbmFibGUgdHJhbnNtaXQgd2F0ZXJtYXJrIGludGVycnVw dHMKICAqIEBzc3A6IHBvaW50ZXIgdG8gYSBzdHJ1Y3Qgc2lmaXZlX3NlcmlhbF9wb3J0CkBAIC01 NjUsNyArNTI1LDcgQEAgc3RhdGljIGlycXJldHVybl90IHNpZml2ZV9zZXJpYWxfaXJxKGludCBp cnEsIHZvaWQgKmRldl9pZCkKIAlpZiAoaXAgJiBTSUZJVkVfU0VSSUFMX0lQX1JYV01fTUFTSykK IAkJX19zc3BfcmVjZWl2ZV9jaGFycyhzc3ApOwogCWlmIChpcCAmIFNJRklWRV9TRVJJQUxfSVBf VFhXTV9NQVNLKQotCQlfX3NzcF90cmFuc21pdF9jaGFycyhzc3ApOworCQl1YXJ0X3BvcnRfdHhf bGltaXQoJnNzcC0+cG9ydCwgU0lGSVZFX1RYX0ZJRk9fREVQVEgpOwogCiAJc3Bpbl91bmxvY2so JnNzcC0+cG9ydC5sb2NrKTsKIApAQCAtNTc3LDYgKzUzNywxMSBAQCBzdGF0aWMgdW5zaWduZWQg aW50IHNpZml2ZV9zZXJpYWxfdHhfZW1wdHkoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCkKIAlyZXR1 cm4gVElPQ1NFUl9URU1UOwogfQogCitzdGF0aWMgdm9pZCBzaWZpdmVfc2VyaWFsX3B1dF9jaGFy KHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQsIHVuc2lnbmVkIGNoYXIgY2gpCit7CisJX19zc3BfdHJh bnNtaXRfY2hhcihwb3J0X3RvX3NpZml2ZV9zZXJpYWxfcG9ydChwb3J0KSwgY2gpOworfQorCiBz dGF0aWMgdW5zaWduZWQgaW50IHNpZml2ZV9zZXJpYWxfZ2V0X21jdHJsKHN0cnVjdCB1YXJ0X3Bv cnQgKnBvcnQpCiB7CiAJcmV0dXJuIFRJT0NNX0NBUiB8IFRJT0NNX0NUUyB8IFRJT0NNX0RTUjsK QEAgLTkwNSw2ICs4NzAsNyBAQCBzdGF0aWMgdm9pZCBfX3NzcF9yZW1vdmVfY29uc29sZV9wb3J0 KHN0cnVjdCBzaWZpdmVfc2VyaWFsX3BvcnQgKnNzcCkKIAogc3RhdGljIGNvbnN0IHN0cnVjdCB1 YXJ0X29wcyBzaWZpdmVfc2VyaWFsX3VvcHMgPSB7CiAJLnR4X2VtcHR5CT0gc2lmaXZlX3Nlcmlh bF90eF9lbXB0eSwKKwkucHV0X2NoYXIJPSBzaWZpdmVfc2VyaWFsX3B1dF9jaGFyLAogCS5zZXRf bWN0cmwJPSBzaWZpdmVfc2VyaWFsX3NldF9tY3RybCwKIAkuZ2V0X21jdHJsCT0gc2lmaXZlX3Nl cmlhbF9nZXRfbWN0cmwsCiAJLnN0b3BfdHgJPSBzaWZpdmVfc2VyaWFsX3N0b3BfdHgsCmRpZmYg LS1naXQgYS9kcml2ZXJzL3R0eS9zZXJpYWwvc3ByZF9zZXJpYWwuYyBiL2RyaXZlcnMvdHR5L3Nl cmlhbC9zcHJkX3NlcmlhbC5jCmluZGV4IDQzMjliOWM5Y2JmMC4uZDkyZGMwN2YwZWJiIDEwMDY0 NAotLS0gYS9kcml2ZXJzL3R0eS9zZXJpYWwvc3ByZF9zZXJpYWwuYworKysgYi9kcml2ZXJzL3R0 eS9zZXJpYWwvc3ByZF9zZXJpYWwuYwpAQCAtMTU0LDYgKzE1NCwxMSBAQCBzdGF0aWMgdW5zaWdu ZWQgaW50IHNwcmRfdHhfZW1wdHkoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCkKIAkJcmV0dXJuIFRJ T0NTRVJfVEVNVDsKIH0KIAorc3RhdGljIHZvaWQgc3ByZF9wdXRfY2hhcihzdHJ1Y3QgdWFydF9w b3J0ICpwb3J0LCB1bnNpZ25lZCBjaGFyIGNoKQoreworCXNlcmlhbF9vdXQocG9ydCwgU1BSRF9U WEQsIGNoKTsKK30KKwogc3RhdGljIHVuc2lnbmVkIGludCBzcHJkX2dldF9tY3RybChzdHJ1Y3Qg dWFydF9wb3J0ICpwb3J0KQogewogCXJldHVybiBUSU9DTV9EU1IgfCBUSU9DTV9DVFM7CkBAIC02 MjQsMzkgKzYyOSw2IEBAIHN0YXRpYyBpbmxpbmUgdm9pZCBzcHJkX3J4KHN0cnVjdCB1YXJ0X3Bv cnQgKnBvcnQpCiAJdHR5X2ZsaXBfYnVmZmVyX3B1c2godHR5KTsKIH0KIAotc3RhdGljIGlubGlu ZSB2b2lkIHNwcmRfdHgoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCkKLXsKLQlzdHJ1Y3QgY2lyY19i dWYgKnhtaXQgPSAmcG9ydC0+c3RhdGUtPnhtaXQ7Ci0JaW50IGNvdW50OwotCi0JaWYgKHBvcnQt PnhfY2hhcikgewotCQlzZXJpYWxfb3V0KHBvcnQsIFNQUkRfVFhELCBwb3J0LT54X2NoYXIpOwot CQlwb3J0LT5pY291bnQudHgrKzsKLQkJcG9ydC0+eF9jaGFyID0gMDsKLQkJcmV0dXJuOwotCX0K LQotCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkgfHwgdWFydF90eF9zdG9wcGVkKHBvcnQpKSB7 Ci0JCXNwcmRfc3RvcF90eChwb3J0KTsKLQkJcmV0dXJuOwotCX0KLQotCWNvdW50ID0gVEhMRF9U WF9FTVBUWTsKLQlkbyB7Ci0JCXNlcmlhbF9vdXQocG9ydCwgU1BSRF9UWEQsIHhtaXQtPmJ1Zlt4 bWl0LT50YWlsXSk7Ci0JCXhtaXQtPnRhaWwgPSAoeG1pdC0+dGFpbCArIDEpICYgKFVBUlRfWE1J VF9TSVpFIC0gMSk7Ci0JCXBvcnQtPmljb3VudC50eCsrOwotCQlpZiAodWFydF9jaXJjX2VtcHR5 KHhtaXQpKQotCQkJYnJlYWs7Ci0JfSB3aGlsZSAoLS1jb3VudCA+IDApOwotCi0JaWYgKHVhcnRf Y2lyY19jaGFyc19wZW5kaW5nKHhtaXQpIDwgV0FLRVVQX0NIQVJTKQotCQl1YXJ0X3dyaXRlX3dh a2V1cChwb3J0KTsKLQotCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkpCi0JCXNwcmRfc3RvcF90 eChwb3J0KTsKLX0KLQogLyogdGhpcyBoYW5kbGVzIHRoZSBpbnRlcnJ1cHQgZnJvbSBvbmUgcG9y dCAqLwogc3RhdGljIGlycXJldHVybl90IHNwcmRfaGFuZGxlX2lycShpbnQgaXJxLCB2b2lkICpk ZXZfaWQpCiB7CkBAIC02ODMsNyArNjU1LDcgQEAgc3RhdGljIGlycXJldHVybl90IHNwcmRfaGFu ZGxlX2lycShpbnQgaXJxLCB2b2lkICpkZXZfaWQpCiAJCXNwcmRfcngocG9ydCk7CiAKIAlpZiAo aW1zICYgU1BSRF9JTVNSX1RYX0ZJRk9fRU1QVFkpCi0JCXNwcmRfdHgocG9ydCk7CisJCXVhcnRf cG9ydF90eF9saW1pdChwb3J0LCBUSExEX1RYX0VNUFRZKTsKIAogCXNwaW5fdW5sb2NrKCZwb3J0 LT5sb2NrKTsKIApAQCAtOTQ4LDYgKzkyMCw3IEBAIHN0YXRpYyB2b2lkIHNwcmRfcG9sbF9wdXRf Y2hhcihzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0LCB1bnNpZ25lZCBjaGFyIGNoKQogCiBzdGF0aWMg Y29uc3Qgc3RydWN0IHVhcnRfb3BzIHNlcmlhbF9zcHJkX29wcyA9IHsKIAkudHhfZW1wdHkgPSBz cHJkX3R4X2VtcHR5LAorCS5wdXRfY2hhciA9IHNwcmRfcHV0X2NoYXIsCiAJLmdldF9tY3RybCA9 IHNwcmRfZ2V0X21jdHJsLAogCS5zZXRfbWN0cmwgPSBzcHJkX3NldF9tY3RybCwKIAkuc3RvcF90 eCA9IHNwcmRfc3RvcF90eCwKZGlmZiAtLWdpdCBhL2RyaXZlcnMvdHR5L3NlcmlhbC9zdC1hc2Mu YyBiL2RyaXZlcnMvdHR5L3NlcmlhbC9zdC1hc2MuYwppbmRleCBkN2ZkNjkyMjg2Y2YuLmU5YmI5 NzdkYTU3NiAxMDA2NDQKLS0tIGEvZHJpdmVycy90dHkvc2VyaWFsL3N0LWFzYy5jCisrKyBiL2Ry aXZlcnMvdHR5L3NlcmlhbC9zdC1hc2MuYwpAQCAtMjM4LDUwICsyMzgsNyBAQCBzdGF0aWMgaW5s aW5lIHVuc2lnbmVkIGFzY19od190eHJvb20oc3RydWN0IHVhcnRfcG9ydCAqcG9ydCkKICAqLwog c3RhdGljIHZvaWQgYXNjX3RyYW5zbWl0X2NoYXJzKHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQpCiB7 Ci0Jc3RydWN0IGNpcmNfYnVmICp4bWl0ID0gJnBvcnQtPnN0YXRlLT54bWl0OwotCWludCB0eHJv b207Ci0JdW5zaWduZWQgY2hhciBjOwotCi0JdHhyb29tID0gYXNjX2h3X3R4cm9vbShwb3J0KTsK LQotCWlmICgodHhyb29tICE9IDApICYmIHBvcnQtPnhfY2hhcikgewotCQljID0gcG9ydC0+eF9j aGFyOwotCQlwb3J0LT54X2NoYXIgPSAwOwotCQlhc2Nfb3V0KHBvcnQsIEFTQ19UWEJVRiwgYyk7 Ci0JCXBvcnQtPmljb3VudC50eCsrOwotCQl0eHJvb20gPSBhc2NfaHdfdHhyb29tKHBvcnQpOwot CX0KLQotCWlmICh1YXJ0X3R4X3N0b3BwZWQocG9ydCkpIHsKLQkJLyoKLQkJICogV2Ugc2hvdWxk IHRyeSBhbmQgc3RvcCB0aGUgaGFyZHdhcmUgaGVyZSwgYnV0IEkKLQkJICogZG9uJ3QgdGhpbmsg dGhlIEFTQyBoYXMgYW55IHdheSB0byBkbyB0aGF0LgotCQkgKi8KLQkJYXNjX2Rpc2FibGVfdHhf aW50ZXJydXB0cyhwb3J0KTsKLQkJcmV0dXJuOwotCX0KLQotCWlmICh1YXJ0X2NpcmNfZW1wdHko eG1pdCkpIHsKLQkJYXNjX2Rpc2FibGVfdHhfaW50ZXJydXB0cyhwb3J0KTsKLQkJcmV0dXJuOwot CX0KLQotCWlmICh0eHJvb20gPT0gMCkKLQkJcmV0dXJuOwotCi0JZG8gewotCQljID0geG1pdC0+ YnVmW3htaXQtPnRhaWxdOwotCQl4bWl0LT50YWlsID0gKHhtaXQtPnRhaWwgKyAxKSAmIChVQVJU X1hNSVRfU0laRSAtIDEpOwotCQlhc2Nfb3V0KHBvcnQsIEFTQ19UWEJVRiwgYyk7Ci0JCXBvcnQt Pmljb3VudC50eCsrOwotCQl0eHJvb20tLTsKLQl9IHdoaWxlICgodHhyb29tID4gMCkgJiYgKCF1 YXJ0X2NpcmNfZW1wdHkoeG1pdCkpKTsKLQotCWlmICh1YXJ0X2NpcmNfY2hhcnNfcGVuZGluZyh4 bWl0KSA8IFdBS0VVUF9DSEFSUykKLQkJdWFydF93cml0ZV93YWtldXAocG9ydCk7Ci0KLQlpZiAo dWFydF9jaXJjX2VtcHR5KHhtaXQpKQotCQlhc2NfZGlzYWJsZV90eF9pbnRlcnJ1cHRzKHBvcnQp OworCXVhcnRfcG9ydF90eF9saW1pdChwb3J0LCBhc2NfaHdfdHhyb29tKHBvcnQpKTsKIH0KIAog c3RhdGljIHZvaWQgYXNjX3JlY2VpdmVfY2hhcnMoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCkKQEAg LTM4OSw2ICszNDYsMTEgQEAgc3RhdGljIHVuc2lnbmVkIGludCBhc2NfdHhfZW1wdHkoc3RydWN0 IHVhcnRfcG9ydCAqcG9ydCkKIAlyZXR1cm4gYXNjX3R4Zmlmb19pc19lbXB0eShwb3J0KSA/IFRJ T0NTRVJfVEVNVCA6IDA7CiB9CiAKK3N0YXRpYyB2b2lkIGFzY19wdXRfY2hhcihzdHJ1Y3QgdWFy dF9wb3J0ICpwb3J0LCB1bnNpZ25lZCBjaGFyIGNoKQoreworCWFzY19vdXQocG9ydCwgQVNDX1RY QlVGLCBjaCk7Cit9CisKIHN0YXRpYyB2b2lkIGFzY19zZXRfbWN0cmwoc3RydWN0IHVhcnRfcG9y dCAqcG9ydCwgdW5zaWduZWQgaW50IG1jdHJsKQogewogCXN0cnVjdCBhc2NfcG9ydCAqYXNjcG9y dCA9IHRvX2FzY19wb3J0KHBvcnQpOwpAQCAtNjkwLDYgKzY1Miw3IEBAIHN0YXRpYyB2b2lkIGFz Y19wdXRfcG9sbF9jaGFyKHN0cnVjdCB1YXJ0X3BvcnQgKnBvcnQsIHVuc2lnbmVkIGNoYXIgYykK IAogc3RhdGljIGNvbnN0IHN0cnVjdCB1YXJ0X29wcyBhc2NfdWFydF9vcHMgPSB7CiAJLnR4X2Vt cHR5CT0gYXNjX3R4X2VtcHR5LAorCS5wdXRfY2hhcgk9IGFzY19wdXRfY2hhciwKIAkuc2V0X21j dHJsCT0gYXNjX3NldF9tY3RybCwKIAkuZ2V0X21jdHJsCT0gYXNjX2dldF9tY3RybCwKIAkuc3Rh cnRfdHgJPSBhc2Nfc3RhcnRfdHgsCmRpZmYgLS1naXQgYS9kcml2ZXJzL3R0eS9zZXJpYWwvdnI0 MXh4X3NpdS5jIGIvZHJpdmVycy90dHkvc2VyaWFsL3ZyNDF4eF9zaXUuYwppbmRleCBlMGJmMDAz Y2EzYTEuLjgzYzI4Mjg4ZGZlMSAxMDA2NDQKLS0tIGEvZHJpdmVycy90dHkvc2VyaWFsL3ZyNDF4 eF9zaXUuYworKysgYi9kcml2ZXJzL3R0eS9zZXJpYWwvdnI0MXh4X3NpdS5jCkBAIC0xODMsNiAr MTgzLDExIEBAIHN0YXRpYyB1bnNpZ25lZCBpbnQgc2l1X3R4X2VtcHR5KHN0cnVjdCB1YXJ0X3Bv cnQgKnBvcnQpCiAJcmV0dXJuIDA7CiB9CiAKK3N0YXRpYyB2b2lkIHNpdV9wdXRfY2hhcihzdHJ1 Y3QgdWFydF9wb3J0ICpwb3J0LCB1bnNpZ25lZCBjaGFyIGNoKQoreworCXNpdV93cml0ZShwb3J0 LCBVQVJUX1RYLCBjaCk7Cit9CisKIHN0YXRpYyB2b2lkIHNpdV9zZXRfbWN0cmwoc3RydWN0IHVh cnRfcG9ydCAqcG9ydCwgdW5zaWduZWQgaW50IG1jdHJsKQogewogCXVpbnQ4X3QgbWNyID0gMDsK QEAgLTM3MCw0MCArMzc1LDYgQEAgc3RhdGljIGlubGluZSB2b2lkIGNoZWNrX21vZGVtX3N0YXR1 cyhzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0KQogCXdha2VfdXBfaW50ZXJydXB0aWJsZSgmcG9ydC0+ c3RhdGUtPnBvcnQuZGVsdGFfbXNyX3dhaXQpOwogfQogCi1zdGF0aWMgaW5saW5lIHZvaWQgdHJh bnNtaXRfY2hhcnMoc3RydWN0IHVhcnRfcG9ydCAqcG9ydCkKLXsKLQlzdHJ1Y3QgY2lyY19idWYg KnhtaXQ7Ci0JaW50IG1heF9jb3VudCA9IFRYX01BWF9DT1VOVDsKLQotCXhtaXQgPSAmcG9ydC0+ c3RhdGUtPnhtaXQ7Ci0KLQlpZiAocG9ydC0+eF9jaGFyKSB7Ci0JCXNpdV93cml0ZShwb3J0LCBV QVJUX1RYLCBwb3J0LT54X2NoYXIpOwotCQlwb3J0LT5pY291bnQudHgrKzsKLQkJcG9ydC0+eF9j aGFyID0gMDsKLQkJcmV0dXJuOwotCX0KLQotCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkgfHwg dWFydF90eF9zdG9wcGVkKHBvcnQpKSB7Ci0JCXNpdV9zdG9wX3R4KHBvcnQpOwotCQlyZXR1cm47 Ci0JfQotCi0JZG8gewotCQlzaXVfd3JpdGUocG9ydCwgVUFSVF9UWCwgeG1pdC0+YnVmW3htaXQt PnRhaWxdKTsKLQkJeG1pdC0+dGFpbCA9ICh4bWl0LT50YWlsICsgMSkgJiAoVUFSVF9YTUlUX1NJ WkUgLSAxKTsKLQkJcG9ydC0+aWNvdW50LnR4Kys7Ci0JCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1p dCkpCi0JCQlicmVhazsKLQl9IHdoaWxlIChtYXhfY291bnQtLSA+IDApOwotCi0JaWYgKHVhcnRf Y2lyY19jaGFyc19wZW5kaW5nKHhtaXQpIDwgV0FLRVVQX0NIQVJTKQotCQl1YXJ0X3dyaXRlX3dh a2V1cChwb3J0KTsKLQotCWlmICh1YXJ0X2NpcmNfZW1wdHkoeG1pdCkpCi0JCXNpdV9zdG9wX3R4 KHBvcnQpOwotfQotCiBzdGF0aWMgaXJxcmV0dXJuX3Qgc2l1X2ludGVycnVwdChpbnQgaXJxLCB2 b2lkICpkZXZfaWQpCiB7CiAJc3RydWN0IHVhcnRfcG9ydCAqcG9ydDsKQEAgLTQyMiw3ICszOTMs NyBAQCBzdGF0aWMgaXJxcmV0dXJuX3Qgc2l1X2ludGVycnVwdChpbnQgaXJxLCB2b2lkICpkZXZf aWQpCiAJY2hlY2tfbW9kZW1fc3RhdHVzKHBvcnQpOwogCiAJaWYgKGxzciAmIFVBUlRfTFNSX1RI UkUpCi0JCXRyYW5zbWl0X2NoYXJzKHBvcnQpOworCQl1YXJ0X3BvcnRfdHhfbGltaXQocG9ydCwg VFhfTUFYX0NPVU5UKTsKIAogCXJldHVybiBJUlFfSEFORExFRDsKIH0KQEAgLTY1Myw2ICs2MjQs NyBAQCBzdGF0aWMgaW50IHNpdV92ZXJpZnlfcG9ydChzdHJ1Y3QgdWFydF9wb3J0ICpwb3J0LCBz dHJ1Y3Qgc2VyaWFsX3N0cnVjdCAqc2VyaWFsKQogCiBzdGF0aWMgY29uc3Qgc3RydWN0IHVhcnRf b3BzIHNpdV91YXJ0X29wcyA9IHsKIAkudHhfZW1wdHkJPSBzaXVfdHhfZW1wdHksCisJLnB1dF9j aGFyCT0gc2l1X3B1dF9jaGFyLAogCS5zZXRfbWN0cmwJPSBzaXVfc2V0X21jdHJsLAogCS5nZXRf bWN0cmwJPSBzaXVfZ2V0X21jdHJsLAogCS5zdG9wX3R4CT0gc2l1X3N0b3BfdHgsCi0tIAoyLjM1 LjEKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaW51 eC1yaXNjdiBtYWlsaW5nIGxpc3QKbGludXgtcmlzY3ZAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRw Oi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LXJpc2N2Cg==