From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19E35C433F5 for ; Tue, 12 Apr 2022 00:50:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244032AbiDLAwS (ORCPT ); Mon, 11 Apr 2022 20:52:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244125AbiDLAuo (ORCPT ); Mon, 11 Apr 2022 20:50:44 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAA5031DED; Mon, 11 Apr 2022 17:46:53 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 67AFBB819B5; Tue, 12 Apr 2022 00:46:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7DBDEC385A4; Tue, 12 Apr 2022 00:46:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1649724411; bh=ResghmII99n/SG65QwcSI9j5RgNFRUjFsjQqNkCWCW4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ctypd+poFqFg7rBujnj8wa7m73RImaS6Q1aXN1XI/l1DiMuaTU4oqzJpl+lEnUfYH 14MXe1blFfOZ5j2+ipXVHUJBv4tF3B2YEImUicYy7zIxRv21Jvxj5xRSTlS3oBsp53 F/6ywdf/6zVjAQGmnJD4B6us+sUJi1LGMXRLZS06RZTbn0uwauLw1YgkHtie56pwjm YTmX3nKm07+tdMtdEa/54MU2Qk9aiyp+COObxEnH3ajfM6tr2KBKyzPp0xdBiFwq/k L4v2kIi6glZIdkxIwTOIgzBr9lZF5/YcDDWdZSxJGgAd15510JoPWKZBn/myQFJczF VWaE7ISpvLCaQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Chanho Park , Catalin Marinas , Mark Rutland , Will Deacon , James Morse , Sasha Levin , suzuki.poulose@arm.com, anshuman.khandual@arm.com, lcherian@marvell.com, rmk+kernel@armlinux.org.uk, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 5.17 48/49] arm64: Add part number for Arm Cortex-A78AE Date: Mon, 11 Apr 2022 20:44:06 -0400 Message-Id: <20220412004411.349427-48-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220412004411.349427-1-sashal@kernel.org> References: <20220412004411.349427-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chanho Park [ Upstream commit 83bea32ac7ed37bbda58733de61fc9369513f9f9 ] Add the MIDR part number info for the Arm Cortex-A78AE[1] and add it to spectre-BHB affected list[2]. [1]: https://developer.arm.com/Processors/Cortex-A78AE [2]: https://developer.arm.com/Arm%20Security%20Center/Spectre-BHB Cc: Catalin Marinas Cc: Mark Rutland Cc: Will Deacon Cc: James Morse Signed-off-by: Chanho Park Link: https://lore.kernel.org/r/20220407091128.8700-1-chanho61.park@samsung.com Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- arch/arm64/include/asm/cputype.h | 2 ++ arch/arm64/kernel/proton-pack.c | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index bfbf0c4c7c5e..39f5c1672f48 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -75,6 +75,7 @@ #define ARM_CPU_PART_CORTEX_A77 0xD0D #define ARM_CPU_PART_NEOVERSE_V1 0xD40 #define ARM_CPU_PART_CORTEX_A78 0xD41 +#define ARM_CPU_PART_CORTEX_A78AE 0xD42 #define ARM_CPU_PART_CORTEX_X1 0xD44 #define ARM_CPU_PART_CORTEX_A510 0xD46 #define ARM_CPU_PART_CORTEX_A710 0xD47 @@ -123,6 +124,7 @@ #define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77) #define MIDR_NEOVERSE_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1) #define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78) +#define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE) #define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1) #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510) #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c index 5777929d35bf..40be3a7c2c53 100644 --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -853,6 +853,7 @@ u8 spectre_bhb_loop_affected(int scope) if (scope == SCOPE_LOCAL_CPU) { static const struct midr_range spectre_bhb_k32_list[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A78), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE), MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C), MIDR_ALL_VERSIONS(MIDR_CORTEX_X1), MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), -- 2.35.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77673C433F5 for ; Tue, 12 Apr 2022 00:48:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yUYOY0TLIWShnCY9aZkLM+R/xjrqgFX4ZwEPAD3B3k4=; b=DpbB3I1A5mpgiI Jdb83UxlIW+/gbiqtB4rt1MvLcLxybSUvhD7d+Av+7RlgrhPuzFiaLxPyEm9kglULcV6Lk9DrRw/g OEKLhRLuXr27d4im8+dv1AOqqhjIWH/aS0MXaShckkbi9TMVM/EYogRmcZBAFJqKzUTHoxdcIiEGm VB9GI8wYGvzb8TQ6oCr2tSX2GB3iMwP2nGnM927cZ2H+eRzYKkCN6rQiu7D4iGMdhGhEYLXbyE5zM G8suWTFZkne+G8oiLjyyu5e5+iAfnAgCX4xlyi4bq2F/US60KF/KSu9jBaoQh617iQbggmC9MqSzu a6MFdgZ29i693odwTKPQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ne4gV-00B1YT-LS; Tue, 12 Apr 2022 00:47:07 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ne4gH-00B1Qi-OO for linux-arm-kernel@lists.infradead.org; Tue, 12 Apr 2022 00:46:56 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 6205BB819BC; Tue, 12 Apr 2022 00:46:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7DBDEC385A4; Tue, 12 Apr 2022 00:46:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1649724411; bh=ResghmII99n/SG65QwcSI9j5RgNFRUjFsjQqNkCWCW4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ctypd+poFqFg7rBujnj8wa7m73RImaS6Q1aXN1XI/l1DiMuaTU4oqzJpl+lEnUfYH 14MXe1blFfOZ5j2+ipXVHUJBv4tF3B2YEImUicYy7zIxRv21Jvxj5xRSTlS3oBsp53 F/6ywdf/6zVjAQGmnJD4B6us+sUJi1LGMXRLZS06RZTbn0uwauLw1YgkHtie56pwjm YTmX3nKm07+tdMtdEa/54MU2Qk9aiyp+COObxEnH3ajfM6tr2KBKyzPp0xdBiFwq/k L4v2kIi6glZIdkxIwTOIgzBr9lZF5/YcDDWdZSxJGgAd15510JoPWKZBn/myQFJczF VWaE7ISpvLCaQ== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Chanho Park , Catalin Marinas , Mark Rutland , Will Deacon , James Morse , Sasha Levin , suzuki.poulose@arm.com, anshuman.khandual@arm.com, lcherian@marvell.com, rmk+kernel@armlinux.org.uk, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 5.17 48/49] arm64: Add part number for Arm Cortex-A78AE Date: Mon, 11 Apr 2022 20:44:06 -0400 Message-Id: <20220412004411.349427-48-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220412004411.349427-1-sashal@kernel.org> References: <20220412004411.349427-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220411_174654_168915_CC0709C8 X-CRM114-Status: GOOD ( 12.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Chanho Park [ Upstream commit 83bea32ac7ed37bbda58733de61fc9369513f9f9 ] Add the MIDR part number info for the Arm Cortex-A78AE[1] and add it to spectre-BHB affected list[2]. [1]: https://developer.arm.com/Processors/Cortex-A78AE [2]: https://developer.arm.com/Arm%20Security%20Center/Spectre-BHB Cc: Catalin Marinas Cc: Mark Rutland Cc: Will Deacon Cc: James Morse Signed-off-by: Chanho Park Link: https://lore.kernel.org/r/20220407091128.8700-1-chanho61.park@samsung.com Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- arch/arm64/include/asm/cputype.h | 2 ++ arch/arm64/kernel/proton-pack.c | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index bfbf0c4c7c5e..39f5c1672f48 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -75,6 +75,7 @@ #define ARM_CPU_PART_CORTEX_A77 0xD0D #define ARM_CPU_PART_NEOVERSE_V1 0xD40 #define ARM_CPU_PART_CORTEX_A78 0xD41 +#define ARM_CPU_PART_CORTEX_A78AE 0xD42 #define ARM_CPU_PART_CORTEX_X1 0xD44 #define ARM_CPU_PART_CORTEX_A510 0xD46 #define ARM_CPU_PART_CORTEX_A710 0xD47 @@ -123,6 +124,7 @@ #define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77) #define MIDR_NEOVERSE_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1) #define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78) +#define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE) #define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1) #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510) #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c index 5777929d35bf..40be3a7c2c53 100644 --- a/arch/arm64/kernel/proton-pack.c +++ b/arch/arm64/kernel/proton-pack.c @@ -853,6 +853,7 @@ u8 spectre_bhb_loop_affected(int scope) if (scope == SCOPE_LOCAL_CPU) { static const struct midr_range spectre_bhb_k32_list[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A78), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE), MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C), MIDR_ALL_VERSIONS(MIDR_CORTEX_X1), MIDR_ALL_VERSIONS(MIDR_CORTEX_A710), -- 2.35.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel