From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9AF36C433F5 for ; Tue, 12 Apr 2022 13:21:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qPNt9sBEM1/1HLOG43CFFaGvkjHO8Rky/Cvxbipp8p0=; b=yt/md5YEh71+6o tsn6yA4ahZWFevEsGR3ifMcIpwP3EyhsGEipohYFaU+l9Yt2m4XLJILQqUzfNJzlf4GxePXrlEbzt 7D//4pVpc4Naz6YD5sB3rDCTyt2UFe6huH8EWaO5pR1tN/8PCSvEU4RIQYW9ZA3WkJbsjdivlL609 bkajYD7tHe9y9FY3rveAWi3n3GGwgDGf5xuhJBnLRzXaztGIgNc5M4Zh84IaEX5QF1oYXIlEKHgL0 t4i9GTJkWwaUUCekywOCIk30jQBDrokZys03bF/1dacZnin6FCbxihI3qMLiY/EwNnBz5k/gb5NSJ G/caYl+lA2xpLgRL9YGg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1neGRc-00EWhE-MM; Tue, 12 Apr 2022 13:20:33 +0000 Received: from muru.com ([72.249.23.125]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1neGOK-00EUyQ-Qu for linux-arm-kernel@lists.infradead.org; Tue, 12 Apr 2022 13:17:10 +0000 Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 89BE38061; Tue, 12 Apr 2022 13:14:33 +0000 (UTC) From: Tony Lindgren To: Rob Herring , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, Daniel Lezcano , Keerthy , Nishanth Menon , Vignesh Raghavendra , Krzysztof Kozlowski Subject: [PATCH 2/2] dt-bindings: timer: Add compatible for am6 for TI timer-dm Date: Tue, 12 Apr 2022 16:16:44 +0300 Message-Id: <20220412131644.59195-3-tony@atomide.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220412131644.59195-1-tony@atomide.com> References: <20220412131644.59195-1-tony@atomide.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220412_061708_969055_40AE537E X-CRM114-Status: GOOD ( 12.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Let's add compatible for ti,am654-timer for TI am64, am65 and j72 SoCs. As the timer hardware is the same between am64, am65 and j72 we use the compatible name for the earliest SoC with this timer. The timer interrupts are not routable for the operating system for some timers on am6. Let's make sure the interrupts are configured for the timers on all other SoCs. Cc: Daniel Lezcano Cc: Keerthy Cc: Nishanth Menon Cc: Vignesh Raghavendra Acked-by: Krzysztof Kozlowski Signed-off-by: Tony Lindgren --- .../devicetree/bindings/timer/ti,timer-dm.yaml | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml b/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml --- a/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml +++ b/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml @@ -19,6 +19,7 @@ properties: - enum: - ti,am335x-timer - ti,am335x-timer-1ms + - ti,am654-timer - ti,dm814-timer - ti,dm816-timer - ti,omap2420-timer @@ -82,11 +83,20 @@ properties: required: - compatible - reg - - interrupts additionalProperties: false allOf: + - if: + not: + properties: + compatible: + contains: + const: ti,am654-timer + then: + required: + - interrupts + - if: properties: compatible: -- 2.35.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DBD9C43217 for ; Tue, 12 Apr 2022 13:23:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356021AbiDLNZf (ORCPT ); Tue, 12 Apr 2022 09:25:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351207AbiDLNY6 (ORCPT ); Tue, 12 Apr 2022 09:24:58 -0400 Received: from muru.com (muru.com [72.249.23.125]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C25E6C10; Tue, 12 Apr 2022 06:17:08 -0700 (PDT) Received: from hillo.muru.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTP id 89BE38061; Tue, 12 Apr 2022 13:14:33 +0000 (UTC) From: Tony Lindgren To: Rob Herring , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, Daniel Lezcano , Keerthy , Nishanth Menon , Vignesh Raghavendra , Krzysztof Kozlowski Subject: [PATCH 2/2] dt-bindings: timer: Add compatible for am6 for TI timer-dm Date: Tue, 12 Apr 2022 16:16:44 +0300 Message-Id: <20220412131644.59195-3-tony@atomide.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220412131644.59195-1-tony@atomide.com> References: <20220412131644.59195-1-tony@atomide.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Let's add compatible for ti,am654-timer for TI am64, am65 and j72 SoCs. As the timer hardware is the same between am64, am65 and j72 we use the compatible name for the earliest SoC with this timer. The timer interrupts are not routable for the operating system for some timers on am6. Let's make sure the interrupts are configured for the timers on all other SoCs. Cc: Daniel Lezcano Cc: Keerthy Cc: Nishanth Menon Cc: Vignesh Raghavendra Acked-by: Krzysztof Kozlowski Signed-off-by: Tony Lindgren --- .../devicetree/bindings/timer/ti,timer-dm.yaml | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml b/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml --- a/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml +++ b/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml @@ -19,6 +19,7 @@ properties: - enum: - ti,am335x-timer - ti,am335x-timer-1ms + - ti,am654-timer - ti,dm814-timer - ti,dm816-timer - ti,omap2420-timer @@ -82,11 +83,20 @@ properties: required: - compatible - reg - - interrupts additionalProperties: false allOf: + - if: + not: + properties: + compatible: + contains: + const: ti,am654-timer + then: + required: + - interrupts + - if: properties: compatible: -- 2.35.1