[PATCH v2] ARM: imx: Enable instruction cache early on on i.MX8M

[PATCH v2] ARM: imx: Enable instruction cache early on on i.MX8M

[Marek Vasut]

Enable instruction cache early on to speed up the boot process on i.MX8M.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
V2: Protect the icache_enable with !CONFIG_IS_ENABLED(SYS_ICACHE_OFF),
    the symbol might be undefined in case CONFIG_(SPL_)SYS_ICACHE_OFF
    is set
---
 arch/arm/mach-imx/imx8m/soc.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index bb94ef51492..8171631db10 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -550,6 +550,11 @@ EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock);
 int arch_cpu_init(void)
 {
 	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+
+#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
+	icache_enable();
+#endif
+
 	/*
 	 * ROM might disable clock for SCTR,
 	 * enable the clock before timer_init.
-- 
2.35.1

Re: [PATCH v2] ARM: imx: Enable instruction cache early on on i.MX8M

[Stefano Babic]

On 13.04.22 00:41, Marek Vasut wrote:
> Enable instruction cache early on to speed up the boot process on i.MX8M.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> V2: Protect the icache_enable with !CONFIG_IS_ENABLED(SYS_ICACHE_OFF),
>      the symbol might be undefined in case CONFIG_(SPL_)SYS_ICACHE_OFF
>      is set
> ---
>   arch/arm/mach-imx/imx8m/soc.c | 5 +++++
>   1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
> index bb94ef51492..8171631db10 100644
> --- a/arch/arm/mach-imx/imx8m/soc.c
> +++ b/arch/arm/mach-imx/imx8m/soc.c
> @@ -550,6 +550,11 @@ EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock);
>   int arch_cpu_init(void)
>   {
>   	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
> +
> +#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
> +	icache_enable();
> +#endif
> +
>   	/*
>   	 * ROM might disable clock for SCTR,
>   	 * enable the clock before timer_init.

Thanks for fast fix - I apply this before my PR.

Regards,
Stefano

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de
=====================================================================

[PATCH v2] ARM: imx: Enable instruction cache early on on i.MX8M

[sbabic]

> Enable instruction cache early on to speed up the boot process on i.MX8M.
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de
=====================================================================