[PATCH] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet

* [PATCH] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet
@ 2022-04-17 20:42 Tony Dinh
  2022-05-02 15:44 ` Stefan Roese
  0 siblings, 1 reply; 2+ messages in thread
From: Tony Dinh @ 2022-04-17 20:42 UTC (permalink / raw)
  To: U-Boot Mailing List, Stefan Roese; +Cc: Tom Rini, Tony Dinh, Luka Perkov

The Zyxel NSA310s board has the network chip Marvell Alaska 88E1318S.
Use uclass mvgbe and the compatible driver M88E1310 driver to bring
up Ethernet.

- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Remove CONFIG_RESET_PHY_R.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add phy mode RGMII to kirkwood-nsa310s.dts
- Miscellaneous changes: Move constants to .c file and remove header file
board/zyxel/nsa310s/nsa310s.h, add support for large USB and SATA HDDs,
use BIT macro, add/cleanup comments, and cosmetic changes.

Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220412201820.10291-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

 arch/arm/dts/kirkwood-nsa310s.dts |   1 +
 board/zyxel/nsa310s/nsa310s.c     | 119 +++++++++---------------------
 board/zyxel/nsa310s/nsa310s.h     |  46 ------------
 configs/nsa310s_defconfig         |   6 +-
 include/configs/nsa310s.h         |  11 +--
 5 files changed, 41 insertions(+), 142 deletions(-)
 delete mode 100644 board/zyxel/nsa310s/nsa310s.h

diff --git a/arch/arm/dts/kirkwood-nsa310s.dts b/arch/arm/dts/kirkwood-nsa310s.dts
index e1c9c9080c..09ee76c2a2 100644
--- a/arch/arm/dts/kirkwood-nsa310s.dts
+++ b/arch/arm/dts/kirkwood-nsa310s.dts
@@ -306,6 +306,7 @@
 	status = "okay";
 	ethernet0-port@0 {
 		phy-handle = <&ethphy0>;
+		phy-mode = "rgmii";
 	};
 };
 
diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c
index b71de4e11f..b3ea660891 100644
--- a/board/zyxel/nsa310s/nsa310s.c
+++ b/board/zyxel/nsa310s/nsa310s.c
@@ -1,22 +1,49 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2015, 2021 Tony Dinh <mibodhi@gmail.com>
+ * Copyright (C) 2015, 2021-2022 Tony Dinh <mibodhi@gmail.com>
  * Copyright (C) 2015 Gerald Kerma <dreagle@doukki.net>
  */
 
 #include <common.h>
 #include <init.h>
-#include <miiphy.h>
-#include <net.h>
+#include <netdev.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
-#include "nsa310s.h"
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/*
+ * low GPIO's
+ */
+#define HDD1_GREEN_LED		BIT(16)
+#define HDD1_RED_LED		BIT(13)
+#define USB_GREEN_LED		BIT(15)
+#define USB_POWER		BIT(21)
+#define SYS_GREEN_LED		BIT(28)
+#define SYS_ORANGE_LED		BIT(29)
+
+#define COPY_GREEN_LED		BIT(22)
+#define COPY_RED_LED		BIT(23)
+
+#define PIN_USB_GREEN_LED	15
+#define PIN_USB_POWER		21
+
+#define NSA310S_OE_LOW		(~(0))
+#define NSA310S_VAL_LOW		(SYS_GREEN_LED | USB_POWER)
+
+/*
+ * high GPIO's
+ */
+#define HDD2_GREEN_LED		BIT(2)
+#define HDD2_POWER		BIT(1)
+
+#define NSA310S_OE_HIGH		(~(0))
+#define NSA310S_VAL_HIGH	(HDD2_POWER)
+
 int board_early_init_f(void)
 {
 	/*
@@ -80,87 +107,7 @@ int board_init(void)
 	return 0;
 }
 
-static int fdt_get_phy_addr(const char *path)
-{
-	const void *fdt = gd->fdt_blob;
-	const u32 *reg;
-	const u32 *val;
-	int node, phandle, addr;
-
-	/* Find the node by its full path */
-	node = fdt_path_offset(fdt, path);
-	if (node >= 0) {
-		/* Look up phy-handle */
-		val = fdt_getprop(fdt, node, "phy-handle", NULL);
-		if (val) {
-			phandle = fdt32_to_cpu(*val);
-			if (!phandle)
-				return -1;
-			/* Follow it to its node */
-			node = fdt_node_offset_by_phandle(fdt, phandle);
-			if (node) {
-				/* Look up reg */
-				reg = fdt_getprop(fdt, node, "reg", NULL);
-				if (reg) {
-					addr = fdt32_to_cpu(*reg);
-					return addr;
-				}
-			}
-		}
-	}
-	return -1;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
+int board_eth_init(struct bd_info *bis)
 {
-	u16 reg;
-	u16 phyaddr;
-	char *name = "ethernet-controller@72000";
-	char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
-
-	if (miiphy_set_current_dev(name))
-		return;
-
-	phyaddr = fdt_get_phy_addr(eth0_path);
-	if (phyaddr < 0)
-		return;
-
-	/* set RGMII delay */
-	miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
-	miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, &reg);
-	reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL);
-	miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg);
-	miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
-
-	/* reset PHY */
-	if (miiphy_reset(name, phyaddr))
-		return;
-
-	/*
-	 * ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to 88E1318)
-	 * and has an MCU attached to the LED[2] via tristate interrupt
-	 */
-
-	/* switch to LED register page */
-	miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG);
-	/* read out LED polarity register */
-	miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, &reg);
-	/* clear 4, set 5 - LED2 low, tri-state */
-	reg &= ~(MV88E1318_LED2_4);
-	reg |= (MV88E1318_LED2_5);
-	/* write back LED polarity register */
-	miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg);
-	/* jump back to page 0, per the PHY chip documenation. */
-	miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
-
-	/* set PHY back to auto-negotiation mode */
-	miiphy_write(name, phyaddr, 0x4, 0x1e1);
-	miiphy_write(name, phyaddr, 0x9, 0x300);
-	/* downshift */
-	miiphy_write(name, phyaddr, 0x10, 0x3860);
-	miiphy_write(name, phyaddr, 0x0, 0x9140);
-
-	printf("MV88E1318 PHY initialized on %s\n", name);
+	return cpu_eth_init(bis);
 }
-#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/zyxel/nsa310s/nsa310s.h b/board/zyxel/nsa310s/nsa310s.h
deleted file mode 100644
index d8bd9a586f..0000000000
--- a/board/zyxel/nsa310s/nsa310s.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015
- * Gerald Kerma <dreagle@doukki.net>
- * Tony Dinh <mibodhi@gmail.com>
- */
-
-#ifndef __NSA310S_H
-#define __NSA310S_H
-
-/* low GPIO's */
-#define HDD1_GREEN_LED		(1 << 16)
-#define HDD1_RED_LED		(1 << 13)
-#define USB_GREEN_LED		(1 << 15)
-#define USB_POWER			(1 << 21)
-#define SYS_GREEN_LED		(1 << 28)
-#define SYS_ORANGE_LED		(1 << 29)
-
-#define COPY_GREEN_LED		(1 << 22)
-#define COPY_RED_LED		(1 << 23)
-
-#define PIN_USB_GREEN_LED	15
-#define PIN_USB_POWER		21
-
-#define NSA310S_OE_LOW		(~(0))
-#define NSA310S_VAL_LOW		(SYS_GREEN_LED | USB_POWER)
-
-/* high GPIO's */
-#define HDD2_GREEN_LED		(1 << 2)
-#define HDD2_POWER			(1 << 1)
-
-#define NSA310S_OE_HIGH		(~(0))
-#define NSA310S_VAL_HIGH	(HDD2_POWER)
-
-/* PHY related */
-#define MV88E1318_PGADR_REG		22
-#define MV88E1318_MAC_CTRL_PG	2
-#define MV88E1318_MAC_CTRL_REG	21
-#define MV88E1318_RGMII_TX_CTRL	(1 << 4)
-#define MV88E1318_RGMII_RX_CTRL	(1 << 5)
-#define MV88E1318_LED_PG		3
-#define MV88E1318_LED_POL_REG	17
-#define MV88E1318_LED2_4		(1 << 4)
-#define MV88E1318_LED2_5		(1 << 5)
-
-#endif /* __NSA310S_H */
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index d003b7ee0a..fc29162abc 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
+CONFIG_SYS_THUMB_BUILD=y
 CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_KWD_CONFIG="board/zyxel/nsa310s/kwbimage.cfg"
 CONFIG_SYS_TEXT_BASE=0x600000
@@ -17,9 +18,8 @@ CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000"
 CONFIG_USE_PREBOOT=y
 # CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_RESET_PHY_R=y
 CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="nsa310s => "
+CONFIG_SYS_PROMPT="NSA310s> "
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_NAND=y
@@ -31,6 +31,7 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_JFFS2=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(root)"
@@ -49,6 +50,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=1
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_MARVELL=y
 CONFIG_DM_ETH=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h
index 485a3fe42d..1e6b8d8b0e 100644
--- a/include/configs/nsa310s.h
+++ b/include/configs/nsa310s.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2015, 2021 Tony Dinh <mibodhi@gmail.com>
+ * Copyright (C) 2015, 2021-2022 Tony Dinh <mibodhi@gmail.com>
  * Copyright (C) 2015
  * Gerald Kerma <dreagle@doukki.net>
  * Luka Perkov <luka.perkov@sartura.hr>
@@ -11,8 +11,6 @@
 
 #include "mv-common.h"
 
-/* environment variables configuration */
-
 /* default environment variables */
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -24,14 +22,11 @@
 	"bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0"
 
 /* Ethernet driver configuration */
-#ifdef CONFIG_CMD_NET
 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
 #define CONFIG_PHY_BASE_ADR	1
-#endif /* CONFIG_CMD_NET */
 
-/* SATA driver configuration */
-#ifdef CONFIG_SATA
+/* Support large HDDs for USB and SATA */
 #define CONFIG_LBA48
-#endif /* CONFIG_SATA */
+#define CONFIG_SYS_64BIT_LBA
 
 #endif /* _CONFIG_NSA310S_H */
-- 
2.30.2


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