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From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Shuah Khan <shuah@kernel.org>
Cc: Basant Kumar Dwivedi <Basant.KumarDwivedi@arm.com>,
	Luis Machado <luis.machado@arm.com>,
	Szabolcs Nagy <szabolcs.nagy@arm.com>,
	Mark Brown <broonie@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kselftest@vger.kernel.org,
	Alan Hayward <alan.hayward@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	Salil Akerkar <Salil.Akerkar@arm.com>,
	Luca Salabrino <luca.scalabrino@arm.com>
Subject: [PATCH v14 03/39] kselftest/arm64: Validate setting via FPSIMD and read via SVE regsets
Date: Tue, 19 Apr 2022 12:22:11 +0100	[thread overview]
Message-ID: <20220419112247.711548-4-broonie@kernel.org> (raw)
In-Reply-To: <20220419112247.711548-1-broonie@kernel.org>

Currently we validate that we can set the floating point state via the SVE
regset and read the data via the FPSIMD regset but we do not valiate that
the opposite case works as expected. Add a test that covers this case,
noting that when reading via SVE regset the kernel has the option of
returning either SVE or FPSIMD data so we need to accept both formats.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Shuah Khan <skhan@linuxfoundation.org>
---
 tools/testing/selftests/arm64/fp/sve-ptrace.c | 123 +++++++++++++++++-
 1 file changed, 122 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/arm64/fp/sve-ptrace.c b/tools/testing/selftests/arm64/fp/sve-ptrace.c
index 8f6146d89ca4..c2564480b750 100644
--- a/tools/testing/selftests/arm64/fp/sve-ptrace.c
+++ b/tools/testing/selftests/arm64/fp/sve-ptrace.c
@@ -44,7 +44,7 @@ static const struct vec_type vec_types[] = {
 	},
 };
 
-#define VL_TESTS (((SVE_VQ_MAX - SVE_VQ_MIN) + 1) * 3)
+#define VL_TESTS (((SVE_VQ_MAX - SVE_VQ_MIN) + 1) * 4)
 #define FLAG_TESTS 2
 #define FPSIMD_TESTS 2
 
@@ -78,6 +78,15 @@ static int get_fpsimd(pid_t pid, struct user_fpsimd_state *fpsimd)
 	return ptrace(PTRACE_GETREGSET, pid, NT_PRFPREG, &iov);
 }
 
+static int set_fpsimd(pid_t pid, struct user_fpsimd_state *fpsimd)
+{
+	struct iovec iov;
+
+	iov.iov_base = fpsimd;
+	iov.iov_len = sizeof(*fpsimd);
+	return ptrace(PTRACE_SETREGSET, pid, NT_PRFPREG, &iov);
+}
+
 static struct user_sve_header *get_sve(pid_t pid, const struct vec_type *type,
 				       void **buf, size_t *size)
 {
@@ -473,6 +482,115 @@ static void ptrace_set_sve_get_fpsimd_data(pid_t child,
 	free(write_buf);
 }
 
+/* Validate attempting to set FPSIMD data and read it via the SVE regset */
+static void ptrace_set_fpsimd_get_sve_data(pid_t child,
+					   const struct vec_type *type,
+					   unsigned int vl)
+{
+	void *read_buf = NULL;
+	unsigned char *p;
+	struct user_sve_header *read_sve;
+	unsigned int vq = sve_vq_from_vl(vl);
+	struct user_fpsimd_state write_fpsimd;
+	int ret, i, j;
+	size_t read_sve_size = 0;
+	size_t expected_size;
+	int errors = 0;
+
+	if (__BYTE_ORDER == __BIG_ENDIAN) {
+		ksft_test_result_skip("Big endian not supported\n");
+		return;
+	}
+
+	for (i = 0; i < 32; ++i) {
+		p = (unsigned char *)&write_fpsimd.vregs[i];
+
+		for (j = 0; j < sizeof(write_fpsimd.vregs[i]); ++j)
+			p[j] = j;
+	}
+
+	ret = set_fpsimd(child, &write_fpsimd);
+	if (ret != 0) {
+		ksft_test_result_fail("Failed to set FPSIMD state: %d\n)",
+				      ret);
+		return;
+	}
+
+	if (!get_sve(child, type, (void **)&read_buf, &read_sve_size)) {
+		ksft_test_result_fail("Failed to read %s VL %u data\n",
+				      type->name, vl);
+		return;
+	}
+	read_sve = read_buf;
+
+	if (read_sve->vl != vl) {
+		ksft_test_result_fail("Child VL != expected VL %d\n",
+				      read_sve->vl, vl);
+		goto out;
+	}
+
+	/* The kernel may return either SVE or FPSIMD format */
+	switch (read_sve->flags & SVE_PT_REGS_MASK) {
+	case SVE_PT_REGS_FPSIMD:
+		expected_size = SVE_PT_FPSIMD_SIZE(vq, SVE_PT_REGS_FPSIMD);
+		if (read_sve_size < expected_size) {
+			ksft_test_result_fail("Read %d bytes, expected %d\n",
+					      read_sve_size, expected_size);
+			goto out;
+		}
+
+		ret = memcmp(&write_fpsimd, read_buf + SVE_PT_FPSIMD_OFFSET,
+			     sizeof(write_fpsimd));
+		if (ret != 0) {
+			ksft_print_msg("Read FPSIMD data mismatch\n");
+			errors++;
+		}
+		break;
+
+	case SVE_PT_REGS_SVE:
+		expected_size = SVE_PT_SVE_SIZE(vq, SVE_PT_REGS_SVE);
+		if (read_sve_size < expected_size) {
+			ksft_test_result_fail("Read %d bytes, expected %d\n",
+					      read_sve_size, expected_size);
+			goto out;
+		}
+
+		for (i = 0; i < __SVE_NUM_ZREGS; i++) {
+			__uint128_t tmp = 0;
+
+			/*
+			 * Z regs are stored endianness invariant, this won't
+			 * work for big endian
+			 */
+			memcpy(&tmp, read_buf + SVE_PT_SVE_ZREG_OFFSET(vq, i),
+			       sizeof(tmp));
+
+			if (tmp != write_fpsimd.vregs[i]) {
+				printf("# Mismatch in FPSIMD for %s VL %u Z%d/V%d\n",
+				       type->name, vl, i, i);
+				errors++;
+			}
+		}
+
+		check_u32(vl, "FPSR", &write_fpsimd.fpsr,
+			  read_buf + SVE_PT_SVE_FPSR_OFFSET(vq), &errors);
+		check_u32(vl, "FPCR", &write_fpsimd.fpcr,
+			  read_buf + SVE_PT_SVE_FPCR_OFFSET(vq), &errors);
+		break;
+	default:
+		ksft_print_msg("Unexpected regs type %d\n",
+			       read_sve->flags & SVE_PT_REGS_MASK);
+		errors++;
+		break;
+	}
+
+	ksft_test_result(errors == 0, "Set FPSIMD, read via SVE for %s VL %u\n",
+			 type->name, vl);
+
+out:
+	free(read_buf);
+}
+
 static int do_parent(pid_t child)
 {
 	int ret = EXIT_FAILURE;
@@ -578,11 +696,14 @@ static int do_parent(pid_t child)
 			if (vl_supported) {
 				ptrace_set_sve_get_sve_data(child, &vec_types[i], vl);
 				ptrace_set_sve_get_fpsimd_data(child, &vec_types[i], vl);
+				ptrace_set_fpsimd_get_sve_data(child, &vec_types[i], vl);
 			} else {
 				ksft_test_result_skip("%s set SVE get SVE for VL %d\n",
 						      vec_types[i].name, vl);
 				ksft_test_result_skip("%s set SVE get FPSIMD for VL %d\n",
 						      vec_types[i].name, vl);
+				ksft_test_result_skip("%s set FPSIMD get SVE for VL %d\n",
+						      vec_types[i].name, vl);
 			}
 		}
 	}
-- 
2.30.2

_______________________________________________
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kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Shuah Khan <shuah@kernel.org>
Cc: Alan Hayward <alan.hayward@arm.com>,
	Luis Machado <luis.machado@arm.com>,
	Salil Akerkar <Salil.Akerkar@arm.com>,
	Basant Kumar Dwivedi <Basant.KumarDwivedi@arm.com>,
	Szabolcs Nagy <szabolcs.nagy@arm.com>,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Luca Salabrino <luca.scalabrino@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kselftest@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v14 03/39] kselftest/arm64: Validate setting via FPSIMD and read via SVE regsets
Date: Tue, 19 Apr 2022 12:22:11 +0100	[thread overview]
Message-ID: <20220419112247.711548-4-broonie@kernel.org> (raw)
In-Reply-To: <20220419112247.711548-1-broonie@kernel.org>

Currently we validate that we can set the floating point state via the SVE
regset and read the data via the FPSIMD regset but we do not valiate that
the opposite case works as expected. Add a test that covers this case,
noting that when reading via SVE regset the kernel has the option of
returning either SVE or FPSIMD data so we need to accept both formats.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Shuah Khan <skhan@linuxfoundation.org>
---
 tools/testing/selftests/arm64/fp/sve-ptrace.c | 123 +++++++++++++++++-
 1 file changed, 122 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/arm64/fp/sve-ptrace.c b/tools/testing/selftests/arm64/fp/sve-ptrace.c
index 8f6146d89ca4..c2564480b750 100644
--- a/tools/testing/selftests/arm64/fp/sve-ptrace.c
+++ b/tools/testing/selftests/arm64/fp/sve-ptrace.c
@@ -44,7 +44,7 @@ static const struct vec_type vec_types[] = {
 	},
 };
 
-#define VL_TESTS (((SVE_VQ_MAX - SVE_VQ_MIN) + 1) * 3)
+#define VL_TESTS (((SVE_VQ_MAX - SVE_VQ_MIN) + 1) * 4)
 #define FLAG_TESTS 2
 #define FPSIMD_TESTS 2
 
@@ -78,6 +78,15 @@ static int get_fpsimd(pid_t pid, struct user_fpsimd_state *fpsimd)
 	return ptrace(PTRACE_GETREGSET, pid, NT_PRFPREG, &iov);
 }
 
+static int set_fpsimd(pid_t pid, struct user_fpsimd_state *fpsimd)
+{
+	struct iovec iov;
+
+	iov.iov_base = fpsimd;
+	iov.iov_len = sizeof(*fpsimd);
+	return ptrace(PTRACE_SETREGSET, pid, NT_PRFPREG, &iov);
+}
+
 static struct user_sve_header *get_sve(pid_t pid, const struct vec_type *type,
 				       void **buf, size_t *size)
 {
@@ -473,6 +482,115 @@ static void ptrace_set_sve_get_fpsimd_data(pid_t child,
 	free(write_buf);
 }
 
+/* Validate attempting to set FPSIMD data and read it via the SVE regset */
+static void ptrace_set_fpsimd_get_sve_data(pid_t child,
+					   const struct vec_type *type,
+					   unsigned int vl)
+{
+	void *read_buf = NULL;
+	unsigned char *p;
+	struct user_sve_header *read_sve;
+	unsigned int vq = sve_vq_from_vl(vl);
+	struct user_fpsimd_state write_fpsimd;
+	int ret, i, j;
+	size_t read_sve_size = 0;
+	size_t expected_size;
+	int errors = 0;
+
+	if (__BYTE_ORDER == __BIG_ENDIAN) {
+		ksft_test_result_skip("Big endian not supported\n");
+		return;
+	}
+
+	for (i = 0; i < 32; ++i) {
+		p = (unsigned char *)&write_fpsimd.vregs[i];
+
+		for (j = 0; j < sizeof(write_fpsimd.vregs[i]); ++j)
+			p[j] = j;
+	}
+
+	ret = set_fpsimd(child, &write_fpsimd);
+	if (ret != 0) {
+		ksft_test_result_fail("Failed to set FPSIMD state: %d\n)",
+				      ret);
+		return;
+	}
+
+	if (!get_sve(child, type, (void **)&read_buf, &read_sve_size)) {
+		ksft_test_result_fail("Failed to read %s VL %u data\n",
+				      type->name, vl);
+		return;
+	}
+	read_sve = read_buf;
+
+	if (read_sve->vl != vl) {
+		ksft_test_result_fail("Child VL != expected VL %d\n",
+				      read_sve->vl, vl);
+		goto out;
+	}
+
+	/* The kernel may return either SVE or FPSIMD format */
+	switch (read_sve->flags & SVE_PT_REGS_MASK) {
+	case SVE_PT_REGS_FPSIMD:
+		expected_size = SVE_PT_FPSIMD_SIZE(vq, SVE_PT_REGS_FPSIMD);
+		if (read_sve_size < expected_size) {
+			ksft_test_result_fail("Read %d bytes, expected %d\n",
+					      read_sve_size, expected_size);
+			goto out;
+		}
+
+		ret = memcmp(&write_fpsimd, read_buf + SVE_PT_FPSIMD_OFFSET,
+			     sizeof(write_fpsimd));
+		if (ret != 0) {
+			ksft_print_msg("Read FPSIMD data mismatch\n");
+			errors++;
+		}
+		break;
+
+	case SVE_PT_REGS_SVE:
+		expected_size = SVE_PT_SVE_SIZE(vq, SVE_PT_REGS_SVE);
+		if (read_sve_size < expected_size) {
+			ksft_test_result_fail("Read %d bytes, expected %d\n",
+					      read_sve_size, expected_size);
+			goto out;
+		}
+
+		for (i = 0; i < __SVE_NUM_ZREGS; i++) {
+			__uint128_t tmp = 0;
+
+			/*
+			 * Z regs are stored endianness invariant, this won't
+			 * work for big endian
+			 */
+			memcpy(&tmp, read_buf + SVE_PT_SVE_ZREG_OFFSET(vq, i),
+			       sizeof(tmp));
+
+			if (tmp != write_fpsimd.vregs[i]) {
+				printf("# Mismatch in FPSIMD for %s VL %u Z%d/V%d\n",
+				       type->name, vl, i, i);
+				errors++;
+			}
+		}
+
+		check_u32(vl, "FPSR", &write_fpsimd.fpsr,
+			  read_buf + SVE_PT_SVE_FPSR_OFFSET(vq), &errors);
+		check_u32(vl, "FPCR", &write_fpsimd.fpcr,
+			  read_buf + SVE_PT_SVE_FPCR_OFFSET(vq), &errors);
+		break;
+	default:
+		ksft_print_msg("Unexpected regs type %d\n",
+			       read_sve->flags & SVE_PT_REGS_MASK);
+		errors++;
+		break;
+	}
+
+	ksft_test_result(errors == 0, "Set FPSIMD, read via SVE for %s VL %u\n",
+			 type->name, vl);
+
+out:
+	free(read_buf);
+}
+
 static int do_parent(pid_t child)
 {
 	int ret = EXIT_FAILURE;
@@ -578,11 +696,14 @@ static int do_parent(pid_t child)
 			if (vl_supported) {
 				ptrace_set_sve_get_sve_data(child, &vec_types[i], vl);
 				ptrace_set_sve_get_fpsimd_data(child, &vec_types[i], vl);
+				ptrace_set_fpsimd_get_sve_data(child, &vec_types[i], vl);
 			} else {
 				ksft_test_result_skip("%s set SVE get SVE for VL %d\n",
 						      vec_types[i].name, vl);
 				ksft_test_result_skip("%s set SVE get FPSIMD for VL %d\n",
 						      vec_types[i].name, vl);
+				ksft_test_result_skip("%s set FPSIMD get SVE for VL %d\n",
+						      vec_types[i].name, vl);
 			}
 		}
 	}
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Shuah Khan <shuah@kernel.org>
Cc: Alan Hayward <alan.hayward@arm.com>,
	Luis Machado <luis.machado@arm.com>,
	Salil Akerkar <Salil.Akerkar@arm.com>,
	Basant Kumar Dwivedi <Basant.KumarDwivedi@arm.com>,
	Szabolcs Nagy <szabolcs.nagy@arm.com>,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Luca Salabrino <luca.scalabrino@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kselftest@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v14 03/39] kselftest/arm64: Validate setting via FPSIMD and read via SVE regsets
Date: Tue, 19 Apr 2022 12:22:11 +0100	[thread overview]
Message-ID: <20220419112247.711548-4-broonie@kernel.org> (raw)
In-Reply-To: <20220419112247.711548-1-broonie@kernel.org>

Currently we validate that we can set the floating point state via the SVE
regset and read the data via the FPSIMD regset but we do not valiate that
the opposite case works as expected. Add a test that covers this case,
noting that when reading via SVE regset the kernel has the option of
returning either SVE or FPSIMD data so we need to accept both formats.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Shuah Khan <skhan@linuxfoundation.org>
---
 tools/testing/selftests/arm64/fp/sve-ptrace.c | 123 +++++++++++++++++-
 1 file changed, 122 insertions(+), 1 deletion(-)

diff --git a/tools/testing/selftests/arm64/fp/sve-ptrace.c b/tools/testing/selftests/arm64/fp/sve-ptrace.c
index 8f6146d89ca4..c2564480b750 100644
--- a/tools/testing/selftests/arm64/fp/sve-ptrace.c
+++ b/tools/testing/selftests/arm64/fp/sve-ptrace.c
@@ -44,7 +44,7 @@ static const struct vec_type vec_types[] = {
 	},
 };
 
-#define VL_TESTS (((SVE_VQ_MAX - SVE_VQ_MIN) + 1) * 3)
+#define VL_TESTS (((SVE_VQ_MAX - SVE_VQ_MIN) + 1) * 4)
 #define FLAG_TESTS 2
 #define FPSIMD_TESTS 2
 
@@ -78,6 +78,15 @@ static int get_fpsimd(pid_t pid, struct user_fpsimd_state *fpsimd)
 	return ptrace(PTRACE_GETREGSET, pid, NT_PRFPREG, &iov);
 }
 
+static int set_fpsimd(pid_t pid, struct user_fpsimd_state *fpsimd)
+{
+	struct iovec iov;
+
+	iov.iov_base = fpsimd;
+	iov.iov_len = sizeof(*fpsimd);
+	return ptrace(PTRACE_SETREGSET, pid, NT_PRFPREG, &iov);
+}
+
 static struct user_sve_header *get_sve(pid_t pid, const struct vec_type *type,
 				       void **buf, size_t *size)
 {
@@ -473,6 +482,115 @@ static void ptrace_set_sve_get_fpsimd_data(pid_t child,
 	free(write_buf);
 }
 
+/* Validate attempting to set FPSIMD data and read it via the SVE regset */
+static void ptrace_set_fpsimd_get_sve_data(pid_t child,
+					   const struct vec_type *type,
+					   unsigned int vl)
+{
+	void *read_buf = NULL;
+	unsigned char *p;
+	struct user_sve_header *read_sve;
+	unsigned int vq = sve_vq_from_vl(vl);
+	struct user_fpsimd_state write_fpsimd;
+	int ret, i, j;
+	size_t read_sve_size = 0;
+	size_t expected_size;
+	int errors = 0;
+
+	if (__BYTE_ORDER == __BIG_ENDIAN) {
+		ksft_test_result_skip("Big endian not supported\n");
+		return;
+	}
+
+	for (i = 0; i < 32; ++i) {
+		p = (unsigned char *)&write_fpsimd.vregs[i];
+
+		for (j = 0; j < sizeof(write_fpsimd.vregs[i]); ++j)
+			p[j] = j;
+	}
+
+	ret = set_fpsimd(child, &write_fpsimd);
+	if (ret != 0) {
+		ksft_test_result_fail("Failed to set FPSIMD state: %d\n)",
+				      ret);
+		return;
+	}
+
+	if (!get_sve(child, type, (void **)&read_buf, &read_sve_size)) {
+		ksft_test_result_fail("Failed to read %s VL %u data\n",
+				      type->name, vl);
+		return;
+	}
+	read_sve = read_buf;
+
+	if (read_sve->vl != vl) {
+		ksft_test_result_fail("Child VL != expected VL %d\n",
+				      read_sve->vl, vl);
+		goto out;
+	}
+
+	/* The kernel may return either SVE or FPSIMD format */
+	switch (read_sve->flags & SVE_PT_REGS_MASK) {
+	case SVE_PT_REGS_FPSIMD:
+		expected_size = SVE_PT_FPSIMD_SIZE(vq, SVE_PT_REGS_FPSIMD);
+		if (read_sve_size < expected_size) {
+			ksft_test_result_fail("Read %d bytes, expected %d\n",
+					      read_sve_size, expected_size);
+			goto out;
+		}
+
+		ret = memcmp(&write_fpsimd, read_buf + SVE_PT_FPSIMD_OFFSET,
+			     sizeof(write_fpsimd));
+		if (ret != 0) {
+			ksft_print_msg("Read FPSIMD data mismatch\n");
+			errors++;
+		}
+		break;
+
+	case SVE_PT_REGS_SVE:
+		expected_size = SVE_PT_SVE_SIZE(vq, SVE_PT_REGS_SVE);
+		if (read_sve_size < expected_size) {
+			ksft_test_result_fail("Read %d bytes, expected %d\n",
+					      read_sve_size, expected_size);
+			goto out;
+		}
+
+		for (i = 0; i < __SVE_NUM_ZREGS; i++) {
+			__uint128_t tmp = 0;
+
+			/*
+			 * Z regs are stored endianness invariant, this won't
+			 * work for big endian
+			 */
+			memcpy(&tmp, read_buf + SVE_PT_SVE_ZREG_OFFSET(vq, i),
+			       sizeof(tmp));
+
+			if (tmp != write_fpsimd.vregs[i]) {
+				printf("# Mismatch in FPSIMD for %s VL %u Z%d/V%d\n",
+				       type->name, vl, i, i);
+				errors++;
+			}
+		}
+
+		check_u32(vl, "FPSR", &write_fpsimd.fpsr,
+			  read_buf + SVE_PT_SVE_FPSR_OFFSET(vq), &errors);
+		check_u32(vl, "FPCR", &write_fpsimd.fpcr,
+			  read_buf + SVE_PT_SVE_FPCR_OFFSET(vq), &errors);
+		break;
+	default:
+		ksft_print_msg("Unexpected regs type %d\n",
+			       read_sve->flags & SVE_PT_REGS_MASK);
+		errors++;
+		break;
+	}
+
+	ksft_test_result(errors == 0, "Set FPSIMD, read via SVE for %s VL %u\n",
+			 type->name, vl);
+
+out:
+	free(read_buf);
+}
+
 static int do_parent(pid_t child)
 {
 	int ret = EXIT_FAILURE;
@@ -578,11 +696,14 @@ static int do_parent(pid_t child)
 			if (vl_supported) {
 				ptrace_set_sve_get_sve_data(child, &vec_types[i], vl);
 				ptrace_set_sve_get_fpsimd_data(child, &vec_types[i], vl);
+				ptrace_set_fpsimd_get_sve_data(child, &vec_types[i], vl);
 			} else {
 				ksft_test_result_skip("%s set SVE get SVE for VL %d\n",
 						      vec_types[i].name, vl);
 				ksft_test_result_skip("%s set SVE get FPSIMD for VL %d\n",
 						      vec_types[i].name, vl);
+				ksft_test_result_skip("%s set FPSIMD get SVE for VL %d\n",
+						      vec_types[i].name, vl);
 			}
 		}
 	}
-- 
2.30.2


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  parent reply	other threads:[~2022-04-19 11:23 UTC|newest]

Thread overview: 177+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-19 11:22 [PATCH v14 00/39] arm64/sme: Initial support for the Scalable Matrix Extension Mark Brown
2022-04-19 11:22 ` Mark Brown
2022-04-19 11:22 ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 01/39] kselftest/arm64: Fix comment for ptrace_sve_get_fpsimd_data() Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 02/39] kselftest/arm64: Remove assumption that tasks start FPSIMD only Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` Mark Brown [this message]
2022-04-19 11:22   ` [PATCH v14 03/39] kselftest/arm64: Validate setting via FPSIMD and read via SVE regsets Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 04/39] arm64/sme: Provide ABI documentation for SME Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-28  9:19   ` Catalin Marinas
2022-04-28  9:19     ` Catalin Marinas
2022-04-28  9:19     ` Catalin Marinas
2022-05-03  8:13     ` Szabolcs Nagy
2022-05-03  8:13       ` Szabolcs Nagy
2022-05-03  8:13       ` Szabolcs Nagy
2022-04-19 11:22 ` [PATCH v14 05/39] arm64/sme: System register and exception syndrome definitions Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 06/39] arm64/sme: Manually encode SME instructions Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 07/39] arm64/sme: Early CPU setup for SME Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 08/39] arm64/sme: Basic enumeration support Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 09/39] arm64/sme: Identify supported SME vector lengths at boot Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 10/39] arm64/sme: Implement sysctl to set the default vector length Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 11/39] arm64/sme: Implement vector length configuration prctl()s Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 12/39] arm64/sme: Implement support for TPIDR2 Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 13/39] arm64/sme: Implement SVCR context switching Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 14/39] arm64/sme: Implement streaming SVE " Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 15/39] arm64/sme: Implement ZA " Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 16/39] arm64/sme: Implement traps and syscall handling for SME Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-22 16:28   ` Catalin Marinas
2022-04-22 16:28     ` Catalin Marinas
2022-04-22 16:28     ` Catalin Marinas
2022-12-07 14:00   ` Zenghui Yu
2022-12-07 14:00     ` Zenghui Yu
2022-12-07 14:00     ` Zenghui Yu
2022-12-07 14:16     ` Mark Brown
2022-12-07 14:16       ` Mark Brown
2022-12-07 14:16       ` Mark Brown
2022-12-08  2:15       ` Zenghui Yu
2022-12-08  2:15         ` Zenghui Yu
2022-12-08  2:15         ` Zenghui Yu
2022-04-19 11:22 ` [PATCH v14 17/39] arm64/sme: Disable ZA and streaming mode when handling signals Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 18/39] arm64/sme: Implement streaming SVE signal handling Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 19/39] arm64/sme: Implement ZA " Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 20/39] arm64/sme: Implement ptrace support for streaming mode SVE registers Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 21/39] arm64/sme: Add ptrace support for ZA Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 22/39] arm64/sme: Disable streaming mode and ZA when flushing CPU state Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 23/39] arm64/sme: Save and restore streaming mode over EFI runtime calls Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 24/39] KVM: arm64: Hide SME system registers from guests Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 25/39] KVM: arm64: Trap SME usage in guest Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 26/39] KVM: arm64: Handle SME host state when running guests Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 27/39] arm64/sme: Provide Kconfig for SME Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
     [not found]   ` <CGME20220426221433eucas1p253f6350eacf87d8cac2c05adc903656e@eucas1p2.samsung.com>
2022-04-26 22:14     ` Marek Szyprowski
2022-04-26 22:14       ` Marek Szyprowski
2022-04-26 22:14       ` Marek Szyprowski
2022-04-27 12:55       ` Mark Brown
2022-04-27 12:55         ` Mark Brown
2022-04-27 12:55         ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 28/39] kselftest/arm64: Add manual encodings for SME instructions Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 29/39] kselftest/arm64: sme: Add SME support to vlset Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 30/39] kselftest/arm64: Add tests for TPIDR2 Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 31/39] kselftest/arm64: Extend vector configuration API tests to cover SME Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 32/39] kselftest/arm64: sme: Provide streaming mode SVE stress test Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 33/39] kselftest/arm64: signal: Handle ZA signal context in core code Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 34/39] kselftest/arm64: Add stress test for SME ZA context switching Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 35/39] kselftest/arm64: signal: Add SME signal handling tests Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 36/39] kselftest/arm64: Add streaming SVE to SVE ptrace tests Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 37/39] kselftest/arm64: Add coverage for the ZA ptrace interface Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 38/39] kselftest/arm64: Add SME support to syscall ABI test Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22 ` [PATCH v14 39/39] selftests/arm64: Add a testcase for handling of ZA on clone() Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-19 11:22   ` Mark Brown
2022-04-22 17:10 ` [PATCH v14 00/39] arm64/sme: Initial support for the Scalable Matrix Extension Marc Zyngier
2022-04-22 17:10   ` Marc Zyngier
2022-04-22 17:10   ` Marc Zyngier
2022-04-22 18:35   ` Catalin Marinas
2022-04-22 18:35     ` Catalin Marinas
2022-04-22 18:35     ` Catalin Marinas
2022-04-22 18:26 ` (subset) " Catalin Marinas
2022-04-22 18:26   ` Catalin Marinas
2022-04-22 18:26   ` Catalin Marinas
2022-04-27 17:08 ` Qian Cai
2022-04-27 17:08   ` Qian Cai
2022-04-27 17:08   ` Qian Cai
2022-04-27 17:14   ` Mark Brown
2022-04-27 17:14     ` Mark Brown
2022-04-27 17:14     ` Mark Brown
2022-04-27 21:08     ` Qian Cai
2022-04-27 21:08       ` Qian Cai
2022-04-27 21:08       ` Qian Cai
2022-04-27 22:13       ` Mark Brown
2022-04-27 22:13         ` Mark Brown
2022-04-27 22:13         ` Mark Brown
2022-05-03 22:23 ` Qian Cai
2022-05-03 22:23   ` Qian Cai
2022-05-03 22:23   ` Qian Cai
2022-05-03 23:52   ` Mark Brown
2022-05-03 23:52     ` Mark Brown
2022-05-03 23:52     ` Mark Brown
2022-05-04  5:25     ` Naresh Kamboju
2022-05-04  5:25       ` Naresh Kamboju
2022-05-04  5:25       ` Naresh Kamboju
2022-05-04  7:49     ` Naresh Kamboju
2022-05-04  7:49       ` Naresh Kamboju
2022-05-04  7:49       ` Naresh Kamboju

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