From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70C9FC433F5 for ; Wed, 20 Apr 2022 07:25:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356199AbiDTH21 (ORCPT ); Wed, 20 Apr 2022 03:28:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347075AbiDTH20 (ORCPT ); Wed, 20 Apr 2022 03:28:26 -0400 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EEE661107; Wed, 20 Apr 2022 00:25:40 -0700 (PDT) Received: by mail-lj1-x22c.google.com with SMTP id bn33so876505ljb.6; Wed, 20 Apr 2022 00:25:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=1H597dMFPUSNzIziyOeLy07NUWY4Z2MSakg0W7aOtnk=; b=WkOflpgD6bM/UUZ3jo7BHM+f7ufU2tGXuSNkQZRNZ0iJdGWik51tDVlI6WQ++RmN8w cPUYss/rPDUIejFB1RY7UB+75xSno92UBHLquqgFfD12VbS6jC3oo/s0bRCG+g5Vje4x RncZ5T4jXzVvXLDDHCPdGK0xW54CdAjoDuOqBJQA/38jvykII9KlSVlxGqjQfwTsKrp1 QiLlu3iPPGJVTP+tiwgCeRSxJykbudihhlcgtRHQBCaCIBW6R4zmk8N9utBCzbFgo5Sk Dz+LC2aR+teLjZU0Nm6aKqE2bG4EJv8039jRgyRCRZk9OasIjQ1xHMnt1lTYl3oYu/MR vOwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=1H597dMFPUSNzIziyOeLy07NUWY4Z2MSakg0W7aOtnk=; b=0MDOX2ConMVx7TbL2Y3v7yqIoTXXpg5oyRl6S5mVBjGmhmmXo006XPPClBYJ/+BN76 Y2x4oI2r7udHeZZ9CJ/rVCf4dyL86elxEQAZBq/BzGo/7T8mkou0p5fgkh7nYUSnSQAd mSEuWNbAALurKBGTihAdbvkQEM0oFPDEHxav7g0FSr/KVuyGaL8w2Vh/fiPXhK0vKUOs QfuPA7SSZ3NvbDZc1zBOkKU2ieI8VgBsVnOPjuNhVkW7ZqVzyRDOiwhR5Oc8FUMyg+Jz TFGF84a63o3b7gw/c9Ds6eb7NoX6DP5mlPcXLlxoo9zKho3mM/li/WX39JZXu5dPro5I 5zLA== X-Gm-Message-State: AOAM5315Rn4c+c5dq0yKtPooYngP14kyw0xUAddJ6cv0gw4NPDQxXYxl 8ImPeDhg4te0N08gLpGhO8Q= X-Google-Smtp-Source: ABdhPJxZIeHNPL0lUMU9xkeopnNDkBAkeFigL35nZyK/LHr0wOGfUaMPFg5tRZjeob22P6K85iac5g== X-Received: by 2002:a2e:800a:0:b0:24d:b4f6:f847 with SMTP id j10-20020a2e800a000000b0024db4f6f847mr10397250ljg.498.1650439539205; Wed, 20 Apr 2022 00:25:39 -0700 (PDT) Received: from mobilestation ([95.79.134.149]) by smtp.gmail.com with ESMTPSA id q11-20020a19430b000000b0046d09029ae6sm1736779lfa.42.2022.04.20.00.25.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Apr 2022 00:25:38 -0700 (PDT) Date: Wed, 20 Apr 2022 10:25:36 +0300 From: Serge Semin To: Frank Li Cc: Serge Semin , gustavo.pimentel@synopsys.com, hongxing.zhu@nxp.com, l.stach@pengutronix.de, linux-imx@nxp.com, linux-pci@vger.kernel.org, dmaengine@vger.kernel.org, lznuaa@gmail.com, helgaas@kernel.org, vkoul@kernel.org, lorenzo.pieralisi@arm.com, robh@kernel.org, kw@linux.com, bhelgaas@google.com, manivannan.sadhasivam@linaro.org Subject: Re: [PATCH v7 9/9] PCI: endpoint: Add embedded DMA controller test Message-ID: <20220420072536.626wxbtjkpxqdcec@mobilestation> References: <20220414233709.412275-1-Frank.Li@nxp.com> <20220414233709.412275-10-Frank.Li@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220414233709.412275-10-Frank.Li@nxp.com> Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org On Thu, Apr 14, 2022 at 06:37:09PM -0500, Frank Li wrote: > Designware provided eDMA support in controller. This enabled use > this eDMA controller to transfer data. > > The whole flow align with standard DMA usage module > > 1. Using dma_request_channel() and filter function to find correct > RX and TX Channel. > 2. dmaengine_slave_config() config remote side physcial address. > 3. using dmaengine_prep_slave_single() create transfer descriptor > 4. tx_submit(); > 5. dma_async_issue_pending(); > > Tested at i.MX8DXL platform. > > root@imx8qmmek:~# /usr/bin/pcitest -d -w > WRITE ( 102400 bytes): OKAY > root@imx8qmmek:~# /usr/bin/pcitest -d -r > READ ( 102400 bytes): OKAY > > WRITE => Size: 102400 bytes DMA: YES Time: 0.000180145 seconds Rate: 555108 KB/s > READ => Size: 102400 bytes DMA: YES Time: 0.000194397 seconds Rate: 514411 KB/s > > READ => Size: 102400 bytes DMA: NO Time: 0.013532597 seconds Rate: 7389 KB/s > WRITE => Size: 102400 bytes DMA: NO Time: 0.000857090 seconds Rate: 116673 KB/s I don't have any DW PCIe End-point device at hands. So this part of the series is out of my patch review scope. -Sergey > > Signed-off-by: Frank Li > --- > Change from v6 to v7: > - none > Change from v5 to v6: > - change subject > Change from v4 to v5: > - none > Change from v3 to v4: > - reverse Xmas tree order > - local -> dma_local > - change error message > - IS_ERR -> IS_ERR_OR_NULL > - check return value of dmaengine_slave_config() > Change from v1 to v2: > - none > > drivers/pci/endpoint/functions/pci-epf-test.c | 108 ++++++++++++++++-- > 1 file changed, 98 insertions(+), 10 deletions(-) > > diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c > index 90d84d3bc868f..f26afd02f3a86 100644 > --- a/drivers/pci/endpoint/functions/pci-epf-test.c > +++ b/drivers/pci/endpoint/functions/pci-epf-test.c > @@ -52,9 +52,11 @@ struct pci_epf_test { > enum pci_barno test_reg_bar; > size_t msix_table_offset; > struct delayed_work cmd_handler; > - struct dma_chan *dma_chan; > + struct dma_chan *dma_chan_tx; > + struct dma_chan *dma_chan_rx; > struct completion transfer_complete; > bool dma_supported; > + bool dma_private; > const struct pci_epc_features *epc_features; > }; > > @@ -105,12 +107,15 @@ static void pci_epf_test_dma_callback(void *param) > */ > static int pci_epf_test_data_transfer(struct pci_epf_test *epf_test, > dma_addr_t dma_dst, dma_addr_t dma_src, > - size_t len) > + size_t len, dma_addr_t dma_remote, > + enum dma_transfer_direction dir) > { > + struct dma_chan *chan = (dir == DMA_DEV_TO_MEM) ? epf_test->dma_chan_tx : epf_test->dma_chan_rx; > + dma_addr_t dma_local = (dir == DMA_MEM_TO_DEV) ? dma_src : dma_dst; > enum dma_ctrl_flags flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT; > - struct dma_chan *chan = epf_test->dma_chan; > struct pci_epf *epf = epf_test->epf; > struct dma_async_tx_descriptor *tx; > + struct dma_slave_config sconf = {}; > struct device *dev = &epf->dev; > dma_cookie_t cookie; > int ret; > @@ -120,7 +125,22 @@ static int pci_epf_test_data_transfer(struct pci_epf_test *epf_test, > return -EINVAL; > } > > - tx = dmaengine_prep_dma_memcpy(chan, dma_dst, dma_src, len, flags); > + if (epf_test->dma_private) { > + sconf.direction = dir; > + if (dir == DMA_MEM_TO_DEV) > + sconf.dst_addr = dma_remote; > + else > + sconf.src_addr = dma_remote; > + > + if (dmaengine_slave_config(chan, &sconf)) { > + dev_err(dev, "DMA slave config fail\n"); > + return -EIO; > + } > + tx = dmaengine_prep_slave_single(chan, dma_local, len, dir, flags); > + } else { > + tx = dmaengine_prep_dma_memcpy(chan, dma_dst, dma_src, len, flags); > + } > + > if (!tx) { > dev_err(dev, "Failed to prepare DMA memcpy\n"); > return -EIO; > @@ -148,6 +168,23 @@ static int pci_epf_test_data_transfer(struct pci_epf_test *epf_test, > return 0; > } > > +struct epf_dma_filter { > + struct device *dev; > + u32 dma_mask; > +}; > + > +static bool epf_dma_filter_fn(struct dma_chan *chan, void *node) > +{ > + struct epf_dma_filter *filter = node; > + struct dma_slave_caps caps; > + > + memset(&caps, 0, sizeof(caps)); > + dma_get_slave_caps(chan, &caps); > + > + return chan->device->dev == filter->dev > + && (filter->dma_mask & caps.directions); > +} > + > /** > * pci_epf_test_init_dma_chan() - Function to initialize EPF test DMA channel > * @epf_test: the EPF test device that performs data transfer operation > @@ -158,10 +195,44 @@ static int pci_epf_test_init_dma_chan(struct pci_epf_test *epf_test) > { > struct pci_epf *epf = epf_test->epf; > struct device *dev = &epf->dev; > + struct epf_dma_filter filter; > struct dma_chan *dma_chan; > dma_cap_mask_t mask; > int ret; > > + filter.dev = epf->epc->dev.parent; > + filter.dma_mask = BIT(DMA_DEV_TO_MEM); > + > + dma_cap_zero(mask); > + dma_cap_set(DMA_SLAVE, mask); > + dma_chan = dma_request_channel(mask, epf_dma_filter_fn, &filter); > + if (IS_ERR_OR_NULL(dma_chan)) { > + dev_info(dev, "Failed to get private DMA channel. Falling back to generic one\n"); > + goto fail_back_tx; > + } > + > + epf_test->dma_chan_rx = dma_chan; > + > + filter.dma_mask = BIT(DMA_MEM_TO_DEV); > + dma_chan = dma_request_channel(mask, epf_dma_filter_fn, &filter); > + > + if (IS_ERR(dma_chan)) { > + dev_info(dev, "Failed to get private DMA channel. Falling back to generic one\n"); > + goto fail_back_rx; > + } > + > + epf_test->dma_chan_tx = dma_chan; > + epf_test->dma_private = true; > + > + init_completion(&epf_test->transfer_complete); > + > + return 0; > + > +fail_back_rx: > + dma_release_channel(epf_test->dma_chan_rx); > + epf_test->dma_chan_tx = NULL; > + > +fail_back_tx: > dma_cap_zero(mask); > dma_cap_set(DMA_MEMCPY, mask); > > @@ -174,7 +245,7 @@ static int pci_epf_test_init_dma_chan(struct pci_epf_test *epf_test) > } > init_completion(&epf_test->transfer_complete); > > - epf_test->dma_chan = dma_chan; > + epf_test->dma_chan_tx = epf_test->dma_chan_rx = dma_chan; > > return 0; > } > @@ -190,8 +261,17 @@ static void pci_epf_test_clean_dma_chan(struct pci_epf_test *epf_test) > if (!epf_test->dma_supported) > return; > > - dma_release_channel(epf_test->dma_chan); > - epf_test->dma_chan = NULL; > + dma_release_channel(epf_test->dma_chan_tx); > + if (epf_test->dma_chan_tx == epf_test->dma_chan_rx) { > + epf_test->dma_chan_tx = NULL; > + epf_test->dma_chan_rx = NULL; > + return; > + } > + > + dma_release_channel(epf_test->dma_chan_rx); > + epf_test->dma_chan_rx = NULL; > + > + return; > } > > static void pci_epf_test_print_rate(const char *ops, u64 size, > @@ -280,8 +360,14 @@ static int pci_epf_test_copy(struct pci_epf_test *epf_test) > goto err_map_addr; > } > > + if (epf_test->dma_private) { > + dev_err(dev, "Cannot transfer data using DMA\n"); > + ret = -EINVAL; > + goto err_map_addr; > + } > + > ret = pci_epf_test_data_transfer(epf_test, dst_phys_addr, > - src_phys_addr, reg->size); > + src_phys_addr, reg->size, 0, DMA_MEM_TO_MEM); > if (ret) > dev_err(dev, "Data transfer failed\n"); > } else { > @@ -363,7 +449,8 @@ static int pci_epf_test_read(struct pci_epf_test *epf_test) > > ktime_get_ts64(&start); > ret = pci_epf_test_data_transfer(epf_test, dst_phys_addr, > - phys_addr, reg->size); > + phys_addr, reg->size, > + reg->src_addr, DMA_DEV_TO_MEM); > if (ret) > dev_err(dev, "Data transfer failed\n"); > ktime_get_ts64(&end); > @@ -453,8 +540,9 @@ static int pci_epf_test_write(struct pci_epf_test *epf_test) > } > > ktime_get_ts64(&start); > + > ret = pci_epf_test_data_transfer(epf_test, phys_addr, > - src_phys_addr, reg->size); > + src_phys_addr, reg->size, reg->dst_addr, DMA_MEM_TO_DEV); > if (ret) > dev_err(dev, "Data transfer failed\n"); > ktime_get_ts64(&end); > -- > 2.35.1 >