From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C32DC433EF for ; Thu, 21 Apr 2022 16:13:31 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C89F783ECB; Thu, 21 Apr 2022 18:12:13 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=google.com header.i=@google.com header.b="SHSRcTTK"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 030BF83E70; Thu, 21 Apr 2022 18:11:47 +0200 (CEST) Received: from mail-wm1-x349.google.com (mail-wm1-x349.google.com [IPv6:2a00:1450:4864:20::349]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 03D6A83E72 for ; Thu, 21 Apr 2022 18:11:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=3P4JhYgYKBuIEWGYPPKSSKPI.GSQY-FSSXPMWXW.HIRb.HI@flex--ascull.bounces.google.com Received: by mail-wm1-x349.google.com with SMTP id r83-20020a1c4456000000b0038ff033b654so46356wma.0 for ; Thu, 21 Apr 2022 09:11:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=m+ovqevAwq7A2xR1RbPBFZqU8MboS/s9OXjtX1bTFsE=; b=SHSRcTTKce/yWppZgEG/t5euI77e7Gspo9scT00URkBRGkhBMyqO5NdEJid6g+KnTa MKuBnqcn9188hr51d7mQ0VIOMrT4Lkhv/ltOQs0o5nBETeJizfe2AXV2mnUuBpsw2b8W ulHZaLG9VCmYUNCOPa8lPDuN0EJww3/YQWdncGYZBHPcBXPtxxQmJX1rvmc5zbGl4ibV C64x6HbE9pKfFjuc3nbvyZwDZJs/BBkemP5VC0N3Adclei4swrEHYNq7w5/F6r0j60bJ 33GvOyaGPyUTOszixVlg6/cNwBldqTNM9lvuBv02zE1rKUA4ZPzVSCFR4h3oTiPkSxmM cYIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=m+ovqevAwq7A2xR1RbPBFZqU8MboS/s9OXjtX1bTFsE=; b=2LZFpDN0g27lRwbPpW2I1mV2E7SN4QCNZXaZH7vEL7mepnhGafZTeBzrjSwf5XiKLK qA5hKNFk29uA5TjbQPhFBuJFoA+xjWqzCu//vkdo5Ho/Gk5dfr1U/i9DniNgISB7l/Sq 4uQpwA177NHIIadSy3Bbzkdtgh/BkYUuVUp1vE9LMI1zjffc2pBS6tWPVDlMRKEOqiZs AHENMG99YYAIRAoTSHsbL6qU2hZapTkctYi7AIiO9OGird5E5yXNVSekmpVEZRssYucH upYkWLg3eXB2KGnOKP6bvNsklY9+fDsAzpY3ADXtIeYl2ihAhDH7vR6/sWv5/eYppMwA ku7Q== X-Gm-Message-State: AOAM533ELDpCP6aTVTeSd/8SXpYhBVAoO+vBn93QWuQIrwVTSGM3b+qG a4tr5vjKgTVbcm1GkFA/PgihEUr+Q7YOUApESDJ9jfJ8oWJ8qwAFtbrBm6kcuRdQRv8ZEXRVb2E pT+f9u/SIAj+GMnwbwNJSfw+XriWWigWmm4BOb4PD2vMPlbPp6998VuYRHkc= X-Google-Smtp-Source: ABdhPJzqlEkmb0vnzDjXCDHsixG3IcA082d0fKdKxy9TPWB9JgLdIjZS8n63YhU81+a/8lr5Ddr11vGUm6w= X-Received: from ascull.c.googlers.com ([fda3:e722:ac3:cc00:28:9cb1:c0a8:1510]) (user=ascull job=sendgmr) by 2002:a7b:c347:0:b0:37e:68e6:d85c with SMTP id l7-20020a7bc347000000b0037e68e6d85cmr9594419wmj.176.1650557503561; Thu, 21 Apr 2022 09:11:43 -0700 (PDT) Date: Thu, 21 Apr 2022 16:11:09 +0000 In-Reply-To: <20220421161116.1202023-1-ascull@google.com> Message-Id: <20220421161116.1202023-12-ascull@google.com> Mime-Version: 1.0 References: <20220421161116.1202023-1-ascull@google.com> X-Mailer: git-send-email 2.36.0.rc2.479.g8af0fa9b8e-goog Subject: [PATCH v3 11/18] test: pci: Test PCI address conversion functions From: Andrew Scull To: u-boot@lists.denx.de Cc: sjg@chromium.org, bmeng.cn@gmail.com, trini@konsulko.com, Andrew Scull Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Add tests for the functions dm_pci_bus_to_phys() and dm_pci_phys_to_bus() which convert between PCI bus addresses and physical addresses based on the ranges declared for the PCI controller. The ranges of bus#1 are used for the tests, adding a translation to one of the ranges to cover more cases. Signed-off-by: Andrew Scull --- arch/sandbox/dts/test.dts | 2 +- test/dm/pci.c | 102 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 103 insertions(+), 1 deletion(-) diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 05c1cd5e1a..2b5f6ae92d 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -971,7 +971,7 @@ #address-cells = <3>; #size-cells = <2>; ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0 - 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1 + 0x02000000 0 0x31000000 0x3e000000 0 0x2000 // MEM1 0x01000000 0 0x40000000 0x40000000 0 0x2000>; sandbox,dev-info = <0x08 0x00 0x1234 0x5678 0x0c 0x00 0x1234 0x5678 diff --git a/test/dm/pci.c b/test/dm/pci.c index 00e4440a9d..eff599ef32 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -376,3 +376,105 @@ static int dm_test_pci_region_multi(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_pci_region_multi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* + * Test the translation of PCI bus addresses to physical addresses using the + * ranges from bus#1. + */ +static int dm_test_pci_bus_to_phys(struct unit_test_state *uts) +{ + struct udevice *dev; + phys_addr_t phys_addr; + + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &dev)); + + /* Before any of the ranges. */ + phys_addr = dm_pci_bus_to_phys(dev, 0x20000000, 0x400, PCI_REGION_MEM); + ut_asserteq(0, phys_addr); + + /* Identity range: whole, start, mid, end */ + phys_addr = dm_pci_bus_to_phys(dev, 0x2ffff000, 0x2000, PCI_REGION_MEM); + ut_asserteq(0, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x2000, PCI_REGION_MEM); + ut_asserteq(0x30000000, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x1000, PCI_REGION_MEM); + ut_asserteq(0x30000000, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x30000abc, 0x12, PCI_REGION_MEM); + ut_asserteq(0x30000abc, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x30000800, 0x1800, PCI_REGION_MEM); + ut_asserteq(0x30000800, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x30008000, 0x1801, PCI_REGION_MEM); + ut_asserteq(0, phys_addr); + + /* Translated range: whole, start, mid, end */ + phys_addr = dm_pci_bus_to_phys(dev, 0x30fff000, 0x2000, PCI_REGION_MEM); + ut_asserteq(0, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x2000, PCI_REGION_MEM); + ut_asserteq(0x3e000000, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x1000, PCI_REGION_MEM); + ut_asserteq(0x3e000000, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x31000abc, 0x12, PCI_REGION_MEM); + ut_asserteq(0x3e000abc, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x31000800, 0x1800, PCI_REGION_MEM); + ut_asserteq(0x3e000800, phys_addr); + phys_addr = dm_pci_bus_to_phys(dev, 0x31008000, 0x1801, PCI_REGION_MEM); + ut_asserteq(0, phys_addr); + + /* Beyond all of the ranges. */ + phys_addr = dm_pci_bus_to_phys(dev, 0x32000000, 0x400, PCI_REGION_MEM); + ut_asserteq(0, phys_addr); + + return 0; +} +DM_TEST(dm_test_pci_bus_to_phys, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* + * Test the translation of physical addresses to PCI bus addresses using the + * ranges from bus#1. + */ +static int dm_test_pci_phys_to_bus(struct unit_test_state *uts) +{ + struct udevice *dev; + pci_addr_t pci_addr; + + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &dev)); + + /* Before any of the ranges. */ + pci_addr = dm_pci_phys_to_bus(dev, 0x20000000, 0x400, PCI_REGION_MEM); + ut_asserteq(0, pci_addr); + + /* Identity range: partial overlap, whole, start, mid, end */ + pci_addr = dm_pci_phys_to_bus(dev, 0x2ffff000, 0x2000, PCI_REGION_MEM); + ut_asserteq(0, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x2000, PCI_REGION_MEM); + ut_asserteq(0x30000000, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x1000, PCI_REGION_MEM); + ut_asserteq(0x30000000, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x30000abc, 0x12, PCI_REGION_MEM); + ut_asserteq(0x30000abc, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x30000800, 0x1800, PCI_REGION_MEM); + ut_asserteq(0x30000800, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x30008000, 0x1801, PCI_REGION_MEM); + ut_asserteq(0, pci_addr); + + /* Translated range: partial overlap, whole, start, mid, end */ + pci_addr = dm_pci_phys_to_bus(dev, 0x3dfff000, 0x2000, PCI_REGION_MEM); + ut_asserteq(0, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x2000, PCI_REGION_MEM); + ut_asserteq(0x31000000, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x1000, PCI_REGION_MEM); + ut_asserteq(0x31000000, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x3e000abc, 0x12, PCI_REGION_MEM); + ut_asserteq(0x31000abc, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x3e000800, 0x1800, PCI_REGION_MEM); + ut_asserteq(0x31000800, pci_addr); + pci_addr = dm_pci_phys_to_bus(dev, 0x3e008000, 0x1801, PCI_REGION_MEM); + ut_asserteq(0, pci_addr); + + /* Beyond all of the ranges. */ + pci_addr = dm_pci_phys_to_bus(dev, 0x3f000000, 0x400, PCI_REGION_MEM); + ut_asserteq(0, pci_addr); + + return 0; +} +DM_TEST(dm_test_pci_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- 2.36.0.rc2.479.g8af0fa9b8e-goog