From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3BE01C433F5 for ; Thu, 28 Apr 2022 11:12:20 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D3A6283D6B; Thu, 28 Apr 2022 13:12:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=microchip.com header.i=@microchip.com header.b="JjnmX/5g"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8CF9F83EC6; Thu, 28 Apr 2022 13:12:16 +0200 (CEST) Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 32BC283919 for ; Thu, 28 Apr 2022 13:12:12 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Eugen.Hristev@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1651144332; x=1682680332; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=9UJmJKkqoCWkxeb1VkleGEPvzYHYtDCvjDAg67UtJi8=; b=JjnmX/5gid+xW8/gcOsPUWhP8w25MB9+/XASqzCQhco7PtZI5JGysNM/ hbSGx5rjfAPUk+Ba12NkiK0xskkLeUM5Jsq3q+UiroN6lJPsSsc5pggOW jWcycKyl0kAC5vSofKKnve802ERHnR2zvbU4h05xQCZzdOqGVB2SH06UH nCjMqcNSKtxh1yQvX/eHhJJJJQRyrASamGnQls9hVxDMFAOxWWjNCIG5l 3/Z7i6ej+T576JkGMiHr0+5KiSOIV7j7BgWAGXWsItB7dqY2Yl4C7wYYK jFnUG6yPtuT5kBnyUKnYIMIG5jrQB33MTqPkZ8i5R9A8y+pJniDmkrb6c A==; X-IronPort-AV: E=Sophos;i="5.90,295,1643698800"; d="scan'208";a="171253741" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Apr 2022 04:12:09 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 28 Apr 2022 04:12:07 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 28 Apr 2022 04:11:53 -0700 From: Eugen Hristev To: , , CC: , , Eugen Hristev , Sergiu Moga , Claudiu Beznea Subject: [PATCH] misc: i2c_eeprom: fix at24c32 offset_len Date: Thu, 28 Apr 2022 14:11:39 +0300 Message-ID: <20220428111139.153017-1-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean According to at24c32 datasheet: RANDOM READ: A random read requires a “dummy” byte write sequence to load in the dataword address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. BYTE WRITE: A write operation requires two 8-bit data word addresses following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. >From this, my understanding is that dataword is 1 byte, and when reading the offset is just 1 byte. By having an offset len of 2 bytes, reading from the eeprom at boot time to read the stored MAC address fails on sam9x60ek board which has this eeprom. When changing the offset len to 1 byte, reading the MAC address from the offset inside the EEPROM works correctly. Fixes: 821c982e35 ("misc: i2c_eeprom: set offset len and chip addr offset mask") Reported-by: Sergiu Moga Signed-off-by: Eugen Hristev Tested-by: Claudiu Beznea --- Hi everyone, We tested this on sam9x60ek board. I see in DT that various other boards use this eeprom. I have added several people to the patch e-mail, however not comprehensively everyone. I do not wish to affect functionality for other boards, even though this patch appears correct. Some other tests would be welcome, on other boards having this EEPROM. Thanks! Eugen drivers/misc/i2c_eeprom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 89a450d0f8..c8c67cf028 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -230,7 +230,7 @@ static const struct i2c_eeprom_drv_data atmel24c32_data = { .size = 4096, .pagesize = 32, .addr_offset_mask = 0, - .offset_len = 2, + .offset_len = 1, }; static const struct i2c_eeprom_drv_data atmel24c64_data = { -- 2.25.1