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From: Robert Beckett <bob.beckett@collabora.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	Jani Nikula <jani.nikula@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "Robert Beckett" <bob.beckett@collabora.com>,
	"Matthew Auld" <matthew.auld@intel.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 3/4] drm/i915: allow volatile buffers to use ttm pool allocator
Date: Tue,  3 May 2022 19:13:15 +0000	[thread overview]
Message-ID: <20220503191316.1145124-4-bob.beckett@collabora.com> (raw)
In-Reply-To: <20220503191316.1145124-1-bob.beckett@collabora.com>

internal buffers should be shmem backed.
if a volatile buffer is requested, allow ttm to use the pool allocator
to provide volatile pages as backing

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 4c25d9b2f138..fdb3a1c18cb6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -309,7 +309,8 @@ static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo,
 		page_flags |= TTM_TT_FLAG_ZERO_ALLOC;
 
 	caching = i915_ttm_select_tt_caching(obj);
-	if (i915_gem_object_is_shrinkable(obj) && caching == ttm_cached) {
+	if (i915_gem_object_is_shrinkable(obj) && caching == ttm_cached &&
+	    !i915_gem_object_is_volatile(obj)) {
 		page_flags |= TTM_TT_FLAG_EXTERNAL |
 			      TTM_TT_FLAG_EXTERNAL_MAPPABLE;
 		i915_tt->is_shmem = true;
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Robert Beckett <bob.beckett@collabora.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	Jani Nikula <jani.nikula@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "Robert Beckett" <bob.beckett@collabora.com>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Matthew Auld" <matthew.auld@intel.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH 3/4] drm/i915: allow volatile buffers to use ttm pool allocator
Date: Tue,  3 May 2022 19:13:15 +0000	[thread overview]
Message-ID: <20220503191316.1145124-4-bob.beckett@collabora.com> (raw)
In-Reply-To: <20220503191316.1145124-1-bob.beckett@collabora.com>

internal buffers should be shmem backed.
if a volatile buffer is requested, allow ttm to use the pool allocator
to provide volatile pages as backing

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 4c25d9b2f138..fdb3a1c18cb6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -309,7 +309,8 @@ static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo,
 		page_flags |= TTM_TT_FLAG_ZERO_ALLOC;
 
 	caching = i915_ttm_select_tt_caching(obj);
-	if (i915_gem_object_is_shrinkable(obj) && caching == ttm_cached) {
+	if (i915_gem_object_is_shrinkable(obj) && caching == ttm_cached &&
+	    !i915_gem_object_is_volatile(obj)) {
 		page_flags |= TTM_TT_FLAG_EXTERNAL |
 			      TTM_TT_FLAG_EXTERNAL_MAPPABLE;
 		i915_tt->is_shmem = true;
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Robert Beckett <bob.beckett@collabora.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	Jani Nikula <jani.nikula@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Matthew Auld" <matthew.auld@intel.com>,
	linux-kernel@vger.kernel.org
Subject: [Intel-gfx] [PATCH 3/4] drm/i915: allow volatile buffers to use ttm pool allocator
Date: Tue,  3 May 2022 19:13:15 +0000	[thread overview]
Message-ID: <20220503191316.1145124-4-bob.beckett@collabora.com> (raw)
In-Reply-To: <20220503191316.1145124-1-bob.beckett@collabora.com>

internal buffers should be shmem backed.
if a volatile buffer is requested, allow ttm to use the pool allocator
to provide volatile pages as backing

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 4c25d9b2f138..fdb3a1c18cb6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -309,7 +309,8 @@ static struct ttm_tt *i915_ttm_tt_create(struct ttm_buffer_object *bo,
 		page_flags |= TTM_TT_FLAG_ZERO_ALLOC;
 
 	caching = i915_ttm_select_tt_caching(obj);
-	if (i915_gem_object_is_shrinkable(obj) && caching == ttm_cached) {
+	if (i915_gem_object_is_shrinkable(obj) && caching == ttm_cached &&
+	    !i915_gem_object_is_volatile(obj)) {
 		page_flags |= TTM_TT_FLAG_EXTERNAL |
 			      TTM_TT_FLAG_EXTERNAL_MAPPABLE;
 		i915_tt->is_shmem = true;
-- 
2.25.1


  parent reply	other threads:[~2022-05-03 19:13 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-03 19:13 [PATCH 0/4] ttm for internal Robert Beckett
2022-05-03 19:13 ` [Intel-gfx] " Robert Beckett
2022-05-03 19:13 ` [PATCH 1/4] drm/i915: add gen6 ppgtt dummy creation function Robert Beckett
2022-05-03 19:13   ` [Intel-gfx] " Robert Beckett
2022-05-03 19:13   ` Robert Beckett
2022-05-11 10:13   ` Thomas Hellström
2022-05-11 10:13     ` [Intel-gfx] " Thomas Hellström
2022-05-23 15:52     ` Robert Beckett
2022-05-23 15:52       ` [Intel-gfx] " Robert Beckett
2022-05-03 19:13 ` [PATCH 2/4] drm/i915: setup ggtt scratch page after memory regions Robert Beckett
2022-05-03 19:13   ` [Intel-gfx] " Robert Beckett
2022-05-03 19:13   ` Robert Beckett
2022-05-11 11:24   ` Thomas Hellström
2022-05-11 11:24     ` [Intel-gfx] " Thomas Hellström
2022-05-03 19:13 ` Robert Beckett [this message]
2022-05-03 19:13   ` [Intel-gfx] [PATCH 3/4] drm/i915: allow volatile buffers to use ttm pool allocator Robert Beckett
2022-05-03 19:13   ` Robert Beckett
2022-05-11 12:42   ` Thomas Hellström
2022-05-11 12:42     ` [Intel-gfx] " Thomas Hellström
2022-05-23 15:53     ` Robert Beckett
2022-05-23 15:53       ` [Intel-gfx] " Robert Beckett
2022-05-03 19:13 ` [PATCH 4/4] drm/i915: internal buffers use ttm backend Robert Beckett
2022-05-03 19:13   ` [Intel-gfx] " Robert Beckett
2022-05-03 19:13   ` Robert Beckett
2022-05-11 14:14   ` Thomas Hellström
2022-05-11 14:14     ` [Intel-gfx] " Thomas Hellström
2022-05-23 15:52     ` Robert Beckett
2022-05-23 15:52       ` [Intel-gfx] " Robert Beckett
2022-05-03 19:52 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for ttm for internal Patchwork
2022-05-06  3:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for ttm for internal (rev2) Patchwork
2022-05-10 21:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for ttm for internal (rev3) Patchwork
2022-05-11  2:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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