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From: Anusha Srivatsa <anusha.srivatsa@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915/dmc: Load DMC on DG2
Date: Thu,  5 May 2022 09:57:06 -0700	[thread overview]
Message-ID: <20220505165707.813926-2-anusha.srivatsa@intel.com> (raw)
In-Reply-To: <20220505165707.813926-1-anusha.srivatsa@intel.com>

Add Support for DC states on Dg2.

v2: Add dc9 as the max supported DC states and disable DC5.
v3: set max_dc to 0. (Imre)

Cc: Imre Deak <imre.deak@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>(v1)
---
 drivers/gpu/drm/i915/display/intel_display_power.c |  4 +++-
 drivers/gpu/drm/i915/display/intel_dmc.c           | 10 +++++++++-
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 1d9bd5808849..15b15f434fcf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -907,7 +907,9 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
 	if (!HAS_DISPLAY(dev_priv))
 		return 0;
 
-	if (IS_DG1(dev_priv))
+	if (IS_DG2(dev_priv))
+		max_dc = 0;
+	else if (IS_DG1(dev_priv))
 		max_dc = 3;
 	else if (DISPLAY_VER(dev_priv) >= 12)
 		max_dc = 4;
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 257cf662f9f4..2f01aca4d981 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -52,6 +52,10 @@
 
 #define DISPLAY_VER12_DMC_MAX_FW_SIZE	ICL_DMC_MAX_FW_SIZE
 
+#define DG2_DMC_PATH			DMC_PATH(dg2, 2, 06)
+#define DG2_DMC_VERSION_REQUIRED	DMC_VERSION(2, 06)
+MODULE_FIRMWARE(DG2_DMC_PATH);
+
 #define ADLP_DMC_PATH			DMC_PATH(adlp, 2, 16)
 #define ADLP_DMC_VERSION_REQUIRED	DMC_VERSION(2, 16)
 MODULE_FIRMWARE(ADLP_DMC_PATH);
@@ -688,7 +692,11 @@ void intel_dmc_ucode_init(struct drm_i915_private *dev_priv)
 	 */
 	intel_dmc_runtime_pm_get(dev_priv);
 
-	if (IS_ALDERLAKE_P(dev_priv)) {
+	if (IS_DG2(dev_priv)) {
+		dmc->fw_path = DG2_DMC_PATH;
+		dmc->required_version = DG2_DMC_VERSION_REQUIRED;
+		dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
+	} else if (IS_ALDERLAKE_P(dev_priv)) {
 		dmc->fw_path = ADLP_DMC_PATH;
 		dmc->required_version = ADLP_DMC_VERSION_REQUIRED;
 		dmc->max_fw_size = DISPLAY_VER13_DMC_MAX_FW_SIZE;
-- 
2.25.1


  reply	other threads:[~2022-05-05 17:00 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-05 16:57 [Intel-gfx] [PATCH 0/1] DG2 DMC Support Anusha Srivatsa
2022-05-05 16:57 ` Anusha Srivatsa [this message]
  -- strict thread matches above, loose matches on Subject: below --
2022-05-06 17:13 Anusha Srivatsa
2022-05-06 17:13 ` [Intel-gfx] [PATCH] drm/i915/dmc: Load DMC on DG2 Anusha Srivatsa
2022-05-05 17:38 [Intel-gfx] [PATCH 0/1] DG2 DMC Support Anusha Srivatsa
2022-05-05 17:38 ` [Intel-gfx] [PATCH] drm/i915/dmc: Load DMC on DG2 Anusha Srivatsa
2022-05-05 16:58 [Intel-gfx] [PATCH 0/1] DG2 DMC Support Anusha Srivatsa
2022-05-05 16:58 ` [Intel-gfx] [PATCH] drm/i915/dmc: Load DMC on DG2 Anusha Srivatsa
2022-05-05 17:04   ` Vivi, Rodrigo
2022-05-04 20:22 [Intel-gfx] [PATCH 0/1] DG2 DMC Support Anusha Srivatsa
2022-05-04 20:22 ` [Intel-gfx] [PATCH] drm/i915/dmc: Load DMC on DG2 Anusha Srivatsa
2022-04-13  0:57 Anusha Srivatsa
2022-04-13 20:56 ` Rodrigo Vivi
2022-04-15  4:32 ` Lucas De Marchi

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