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* [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA
@ 2022-05-08 17:55 Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 01/92] iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large Jonathan Cameron
                   ` (92 more replies)
  0 siblings, 93 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron,
	catalin.marinas

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Changes since v1:
- Rename IIO_ALIGN to more specific IIO_DMA_MINALIGN
- Fix a few patch descriptions (wrong drive names and such like)
- Fixed a bunch of typos in the intro text in this email (I clearly
  forgot to spell check that!)
- Stopped removing 'to' in some comment updates. The English is fine either
  way and this reduces the patch set size.
- Pick up tags (thanks all!)

A few bits of feedback I haven't acted on:
- Use of a general kernel define with a generic name. ARCH_DMA_MINALIGN
  isn't yet available on all architectures, so the use of IIO_DMA_MINALIGN
  provides a good path to fix this now in a fashion that can be easily
  back ported.
- Adding a define for __aligned(IIO_DMA_MINALIGN). I think that
  such a define would obscure what was going a little. I couldn't think
  of a reason we'd want to add anything else across all these locations
  (which is the other reason we might want such a define).
- Dropping some unnecessary marking of second buffers. I left these alone
  because explaining why they aren't needed would require additional
  commentary and is a separate cleanup that can wait for another time.#

Many years ago, IIO started using ____cacheline_aligned to ensure
that buffers that might be used for DMA were not sharing a cacheline
with other data that might lead to DMA safety issues.

As it turns out, that was fine at the time, but not based on the
correct alignment requirement (though I believe it was a conservative
choice at the time).  Note that on many architectures this was introducing
unnecessary padding.  We should have been using ARCH_KMALLOC_MINALIGN
as other subsystems such as crypto have done for a long time.

Patch 1 description contains more information but in short, there are
ARM64 SoCs out their that have a larger cacheline size for caches beyond
L1. In many cases they maintain coherency for all DMA devices attached
and so this isn't a problem, but there are exceptions that do not.

So, this is a rather large patch set and just covers those drivers
that are in the last kernel release and in drivers/iio.

Many of these drivers are somewhat old so I haven't specifically
cc'd anyone so will be relying on those kind enough to sanity check
patches on drivers that are beyond their own.

Given there is ongoing discussion around reducing the alignment
requirements where possible, I've adopted the existing IIO_ALIGN
define throughout.  That way we have a single point to update if
that becomes relevant in future.

Cc: catalin.marinas@arm.com

Jonathan Cameron (92):
  iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large
  iio: accel: adxl313: Fix alignment for DMA safety
  iio: accel: adxl355: Fix alignment for DMA safety
  iio: accel: adxl367: Fix alignment for DMA safety
  iio: accel: bma220: Fix alignment for DMA safety
  iio: accel: bmi088: Fix alignment for DMA safety
  iio: accel: sca3000: Fix alignment for DMA safety
  iio: accel: sca3300: Fix alignment for DMA safety
  iio: adc: ad7266: Fix alignment for DMA safety
  iio: adc: ad7280a: Fix alignment for DMA safety
  iio: adc: ad7292: Fix alignment for DMA safety
  iio: adc: ad7298: Fix alignment for DMA safety
  iio: adc: ad7476: Fix alignment for DMA safety
  iio: adc: ad7606: Fix alignment for DMA safety
  iio: adc: ad7766: Fix alignment for DMA safety
  iio: adc: ad7768-1: Fix alignment for DMA safety
  iio: adc: ad7887: Fix alignment for DMA safety
  iio: adc: ad7923: Fix alignment for DMA safety
  iio: adc: ad7949: Fix alignment for DMA safety
  iio: adc: hi8435: Fix alignment for DMA safety
  iio: adc: ltc2496: Fix alignment for DMA safety
  iio: adc: ltc2497: Fix alignment for DMA safety
  iio: adc: max1027: Fix alignment for DMA safety
  iio: adc: max11100: Fix alignment for DMA safety
  iio: adc: max1118: Fix alignment for DMA safety
  iio: adc: max1241: Fix alignment for DMA safety
  iio: adc: mcp320x: Fix alignment for DMA safety
  iio: adc: ti-adc0832: Fix alignment for DMA safety
  iio: adc: ti-adc084s021: Fix alignment for DMA safety
  iio: adc: ti-adc108s102: Fix alignment for DMA safety
  iio: adc: ti-adc12138: Fix alignment for DMA safety
  iio: adc: ti-adc128s052: Fix alignment for DMA safety
  iio: adc: ti-adc161s626: Fix alignment for DMA safety
  iio: adc: ti-ads124s08: Fix alignment for DMA safety
  iio: adc: ti-ads131e08: Fix alignment for DMA safety
  iio: adc: ti-ads7950: Fix alignment for DMA safety
  iio: adc: ti-ads8344: Fix alignment for DMA safety
  iio: adc: ti-ads8688: Fix alignment for DMA safety
  iio: adc: ti-tlc4541: Fix alignment for DMA safety
  iio: addac: ad74413r: Fix alignment for DMA safety
  iio: amplifiers: ad8366: Fix alignment for DMA safety
  iio: common: ssp: Fix alignment for DMA safety
  iio: dac: ad5064: Fix alignment for DMA safety
  iio: dac: ad5360: Fix alignment for DMA safety
  iio: dac: ad5421: Fix alignment for DMA safety
  iio: dac: ad5449: Fix alignment for DMA safety
  iio: dac: ad5504: Fix alignment for DMA safety
  iio: dac: ad5592r: Fix alignment for DMA safety
  iio: dac: ad5686: Fix alignment for DMA safety
  iio: dac: ad5755: Fix alignment for DMA safety
  iio: dac: ad5761: Fix alignment for DMA safety
  iio: dac: ad5764: Fix alignment for DMA safety
  iio: dac: ad5766: Fix alignment for DMA safety
  iio: dac: ad5770r: Fix alignment for DMA safety
  iio: dac: ad5791: Fix alignment for DMA saftey
  iio: dac: ad7293: Fix alignment for DMA safety
  iio: dac: ad7303: Fix alignment for DMA safety
  iio: dac: ad8801: Fix alignment for DMA safety
  iio: dac: ltc2688: Fix alignment for DMA safety
  iio: dac: mcp4922: Fix alignment for DMA safety
  iio: dac: ti-dac082s085: Fix alignment for DMA safety
  iio: dac: ti-dac5571: Fix alignment for DMA safety
  iio: dac: ti-dac7311: Fix alignment for DMA safety
  iio: dac: ti-dac7612: Fix alignment for DMA safety
  iio: frequency: ad9523: Fix alignment for DMA safety
  iio: frequency: adf4350: Fix alignment for DMA safety
  iio: frequency: adf4371: Fix alignment for DMA safety
  iio: frequency: admv1013: Fix alignment for DMA safety
  iio: frequency: admv1014: Fix alignment for DMA safety
  iio: frequency: admv4420: Fix alignment for DMA safety
  iio: frequency: adrf6780: Fix alignment for DMA safety
  iio: gyro: adis16080: Fix alignment for DMA safety
  iio: gyro: adis16130: Fix alignment for DMA safety
  iio: gyro: adxrs450: Fix alignment for DMA safety
  iio: gyro: fxas210002c: Fix alignment for DMA safety
  iio: imu: fxos8700: Fix alignment for DMA safety
  iio: imu: inv_icm42600: Fix alignment for DMA safety
  iio: imu: inv_icm42600: Fix alignment for DMA safety in buffer code.
  iio: imu: mpu6050: Fix alignment for DMA safety
  iio: potentiometer: ad5110: Fix alignment for DMA safety
  iio: potentiometer: ad5272: Fix alignment for DMA safety
  iio: potentiometer: max5481: Fix alignment for DMA safety
  iio: potentiometer: mcp41010: Fix alignment for DMA safety
  iio: potentiometer: mcp4131: Fix alignment for DMA safety
  iio: pressure: dlhl60d: Drop unnecessary alignment forcing.
  iio: proximity: as3935: Fix alignment for DMA safety
  iio: proximity: vcnl3020: Drop unnecessary alignment requirement for
    i2c device
  iio: resolver: ad2s1200: Fix alignment for DMA safety
  iio: resolver: ad2s90: Fix alignment for DMA safety
  iio: temp: ltc2983: Fix alignment for DMA safety
  iio: temp: max31865: Fix alignment for DMA safety
  iio: temp: maxim_thermocouple: Fix alignment for DMA safety

 drivers/iio/accel/adxl313_core.c                   |  2 +-
 drivers/iio/accel/adxl355_core.c                   |  2 +-
 drivers/iio/accel/adxl367.c                        |  2 +-
 drivers/iio/accel/adxl367_spi.c                    |  8 +++++---
 drivers/iio/accel/bma220_spi.c                     |  2 +-
 drivers/iio/accel/bmi088-accel-core.c              |  2 +-
 drivers/iio/accel/sca3000.c                        |  4 ++--
 drivers/iio/accel/sca3300.c                        |  2 +-
 drivers/iio/adc/ad7266.c                           |  4 ++--
 drivers/iio/adc/ad7280a.c                          |  2 +-
 drivers/iio/adc/ad7292.c                           |  2 +-
 drivers/iio/adc/ad7298.c                           |  2 +-
 drivers/iio/adc/ad7476.c                           |  5 ++---
 drivers/iio/adc/ad7606.h                           |  4 ++--
 drivers/iio/adc/ad7766.c                           |  5 ++---
 drivers/iio/adc/ad7768-1.c                         |  4 ++--
 drivers/iio/adc/ad7887.c                           |  5 ++---
 drivers/iio/adc/ad7923.c                           |  4 ++--
 drivers/iio/adc/ad7949.c                           |  2 +-
 drivers/iio/adc/adi-axi-adc.c                      |  7 ++++---
 drivers/iio/adc/hi8435.c                           |  2 +-
 drivers/iio/adc/ltc2496.c                          |  4 ++--
 drivers/iio/adc/ltc2497.c                          |  4 ++--
 drivers/iio/adc/max1027.c                          |  2 +-
 drivers/iio/adc/max11100.c                         |  4 ++--
 drivers/iio/adc/max1118.c                          |  2 +-
 drivers/iio/adc/max1241.c                          |  2 +-
 drivers/iio/adc/mcp320x.c                          |  2 +-
 drivers/iio/adc/ti-adc0832.c                       |  2 +-
 drivers/iio/adc/ti-adc084s021.c                    |  4 ++--
 drivers/iio/adc/ti-adc108s102.c                    |  4 ++--
 drivers/iio/adc/ti-adc12138.c                      |  2 +-
 drivers/iio/adc/ti-adc128s052.c                    |  2 +-
 drivers/iio/adc/ti-adc161s626.c                    |  2 +-
 drivers/iio/adc/ti-ads124s08.c                     |  2 +-
 drivers/iio/adc/ti-ads131e08.c                     |  2 +-
 drivers/iio/adc/ti-ads7950.c                       |  4 ++--
 drivers/iio/adc/ti-ads8344.c                       |  2 +-
 drivers/iio/adc/ti-ads8688.c                       |  2 +-
 drivers/iio/adc/ti-tlc4541.c                       |  4 ++--
 drivers/iio/addac/ad74413r.c                       |  4 ++--
 drivers/iio/amplifiers/ad8366.c                    |  4 ++--
 drivers/iio/common/ssp_sensors/ssp.h               |  3 +--
 drivers/iio/dac/ad5064.c                           |  4 ++--
 drivers/iio/dac/ad5360.c                           |  4 ++--
 drivers/iio/dac/ad5421.c                           |  4 ++--
 drivers/iio/dac/ad5449.c                           |  4 ++--
 drivers/iio/dac/ad5504.c                           |  2 +-
 drivers/iio/dac/ad5592r-base.h                     |  4 +++-
 drivers/iio/dac/ad5686.h                           |  6 ++++--
 drivers/iio/dac/ad5755.c                           |  4 ++--
 drivers/iio/dac/ad5761.c                           |  4 ++--
 drivers/iio/dac/ad5764.c                           |  4 ++--
 drivers/iio/dac/ad5766.c                           |  2 +-
 drivers/iio/dac/ad5770r.c                          |  2 +-
 drivers/iio/dac/ad5791.c                           |  2 +-
 drivers/iio/dac/ad7293.c                           |  2 +-
 drivers/iio/dac/ad7303.c                           |  4 ++--
 drivers/iio/dac/ad8801.c                           |  2 +-
 drivers/iio/dac/ltc2688.c                          |  4 ++--
 drivers/iio/dac/mcp4922.c                          |  2 +-
 drivers/iio/dac/ti-dac082s085.c                    |  2 +-
 drivers/iio/dac/ti-dac5571.c                       |  2 +-
 drivers/iio/dac/ti-dac7311.c                       |  2 +-
 drivers/iio/dac/ti-dac7612.c                       |  4 ++--
 drivers/iio/frequency/ad9523.c                     |  6 +++---
 drivers/iio/frequency/adf4350.c                    |  6 +++---
 drivers/iio/frequency/adf4371.c                    |  2 +-
 drivers/iio/frequency/admv1013.c                   |  2 +-
 drivers/iio/frequency/admv1014.c                   |  2 +-
 drivers/iio/frequency/admv4420.c                   |  2 +-
 drivers/iio/frequency/adrf6780.c                   |  2 +-
 drivers/iio/gyro/adis16080.c                       |  2 +-
 drivers/iio/gyro/adis16130.c                       |  2 +-
 drivers/iio/gyro/adxrs450.c                        |  2 +-
 drivers/iio/gyro/fxas21002c_core.c                 |  6 +++---
 drivers/iio/imu/fxos8700_core.c                    |  2 +-
 drivers/iio/imu/inv_icm42600/inv_icm42600.h        |  2 +-
 drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.h |  2 +-
 drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h          |  2 +-
 drivers/iio/industrialio-core.c                    |  4 ++--
 drivers/iio/potentiometer/ad5110.c                 |  4 ++--
 drivers/iio/potentiometer/ad5272.c                 |  2 +-
 drivers/iio/potentiometer/max5481.c                |  2 +-
 drivers/iio/potentiometer/mcp41010.c               |  2 +-
 drivers/iio/potentiometer/mcp4131.c                |  2 +-
 drivers/iio/pressure/dlhl60d.c                     |  2 +-
 drivers/iio/proximity/as3935.c                     |  2 +-
 drivers/iio/proximity/vcnl3020.c                   |  4 ++--
 drivers/iio/resolver/ad2s1200.c                    |  2 +-
 drivers/iio/resolver/ad2s90.c                      |  2 +-
 drivers/iio/temperature/ltc2983.c                  |  4 ++--
 drivers/iio/temperature/max31865.c                 |  2 +-
 drivers/iio/temperature/maxim_thermocouple.c       |  2 +-
 include/linux/iio/iio.h                            | 10 ++++++++--
 95 files changed, 151 insertions(+), 142 deletions(-)

-- 
2.36.0


^ permalink raw reply	[flat|nested] 97+ messages in thread

* [PATCH v2 01/92] iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-06-04 16:56   ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 02/92] iio: accel: adxl313: Fix alignment for DMA safety Jonathan Cameron
                   ` (91 subsequent siblings)
  92 siblings, 1 reply; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Discussion of the series:
https://lore.kernel.org/all/20220405135758.774016-1-catalin.marinas@arm.com/
mm, arm64: Reduce ARCH_KMALLOC_MINALIGN brought to my attention that
our current IIO usage of L1CACHE_ALIGN is insufficient as their are Arm
platforms out their with non coherent DMA and larger cache lines at
at higher levels of their cache hierarchy.

Rename the define to make it's purpose more explicit. It will be used
much more widely going forwards (to replace incorrect ____cacheline_aligned
markings.

Note this patch will greatly reduce the padding on some architectures
that have smaller requirements for DMA safe buffers.

The history of changing values of ARCH_KMALLOC_MINALIGN via
ARCH_DMA_MINALIGN on arm64 is rather complex. I'm not tagging this
as fixing a particular patch from that route as it's not clear what to tag.

Most recently a change to bring them back inline was reverted because
of some Qualcomm Kryo cores with an L2 cache with 128-byte lines
sitting above the point of coherency.

c1132702c71f Revert "arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES)"
That reverts:
65688d2a05de arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES) which
refers to the change originally being motivated by Thunder x1 performance
rather than correctness.

Fixes: 6f7c8ee585e9d ("staging:iio: Add ability to allocate private data space to iio_allocate_device")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/adi-axi-adc.c   |  7 ++++---
 drivers/iio/industrialio-core.c |  4 ++--
 include/linux/iio/iio.h         | 10 ++++++++--
 3 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/iio/adc/adi-axi-adc.c b/drivers/iio/adc/adi-axi-adc.c
index a73e3c2d212f..099be9d47223 100644
--- a/drivers/iio/adc/adi-axi-adc.c
+++ b/drivers/iio/adc/adi-axi-adc.c
@@ -84,7 +84,8 @@ void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv)
 {
 	struct adi_axi_adc_client *cl = conv_to_client(conv);
 
-	return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN);
+	return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client),
+				  IIO_DMA_MINALIGN);
 }
 EXPORT_SYMBOL_GPL(adi_axi_adc_conv_priv);
 
@@ -169,9 +170,9 @@ static struct adi_axi_adc_conv *adi_axi_adc_conv_register(struct device *dev,
 	struct adi_axi_adc_client *cl;
 	size_t alloc_size;
 
-	alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN);
+	alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_DMA_MINALIGN);
 	if (sizeof_priv)
-		alloc_size += ALIGN(sizeof_priv, IIO_ALIGN);
+		alloc_size += ALIGN(sizeof_priv, IIO_DMA_MINALIGN);
 
 	cl = kzalloc(alloc_size, GFP_KERNEL);
 	if (!cl)
diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c
index e1ed44dec2ab..b4218f3b1ac2 100644
--- a/drivers/iio/industrialio-core.c
+++ b/drivers/iio/industrialio-core.c
@@ -1640,7 +1640,7 @@ struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv)
 
 	alloc_size = sizeof(struct iio_dev_opaque);
 	if (sizeof_priv) {
-		alloc_size = ALIGN(alloc_size, IIO_ALIGN);
+		alloc_size = ALIGN(alloc_size, IIO_DMA_MINALIGN);
 		alloc_size += sizeof_priv;
 	}
 
@@ -1650,7 +1650,7 @@ struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv)
 
 	indio_dev = &iio_dev_opaque->indio_dev;
 	indio_dev->priv = (char *)iio_dev_opaque +
-		ALIGN(sizeof(struct iio_dev_opaque), IIO_ALIGN);
+		ALIGN(sizeof(struct iio_dev_opaque), IIO_DMA_MINALIGN);
 
 	indio_dev->dev.parent = parent;
 	indio_dev->dev.type = &iio_device_type;
diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h
index faf00f2c0be6..c4ce02293f1f 100644
--- a/include/linux/iio/iio.h
+++ b/include/linux/iio/iio.h
@@ -9,6 +9,7 @@
 
 #include <linux/device.h>
 #include <linux/cdev.h>
+#include <linux/slab.h>
 #include <linux/iio/types.h>
 #include <linux/of.h>
 /* IIO TODO LIST */
@@ -657,8 +658,13 @@ static inline void *iio_device_get_drvdata(const struct iio_dev *indio_dev)
 	return dev_get_drvdata(&indio_dev->dev);
 }
 
-/* Can we make this smaller? */
-#define IIO_ALIGN L1_CACHE_BYTES
+/*
+ * Used to ensure the iio_priv() structure is aligned to allow that structure
+ * to in turn include IIO_DMA_MINALIGN'd elements such as buffers which
+ * must not share  cachelines with the rest of the structure, thus making
+ * them safe for use with non-coherent DMA.
+ */
+#define IIO_DMA_MINALIGN ARCH_KMALLOC_MINALIGN
 struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv);
 
 /* The information at the returned address is guaranteed to be cacheline aligned */
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 02/92] iio: accel: adxl313: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 01/92] iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 03/92] iio: accel: adxl355: " Jonathan Cameron
                   ` (90 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.

Fixes: 636d44633039 ("iio: accel: Add driver support for ADXL313")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/accel/adxl313_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/accel/adxl313_core.c b/drivers/iio/accel/adxl313_core.c
index 9e4193e64765..afeef779e1d0 100644
--- a/drivers/iio/accel/adxl313_core.c
+++ b/drivers/iio/accel/adxl313_core.c
@@ -46,7 +46,7 @@ EXPORT_SYMBOL_NS_GPL(adxl313_writable_regs_table, IIO_ADXL313);
 struct adxl313_data {
 	struct regmap	*regmap;
 	struct mutex	lock; /* lock to protect transf_buf */
-	__le16		transf_buf ____cacheline_aligned;
+	__le16		transf_buf __aligned(IIO_DMA_MINALIGN);
 };
 
 static const int adxl313_odr_freqs[][2] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 03/92] iio: accel: adxl355: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 01/92] iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 02/92] iio: accel: adxl313: Fix alignment for DMA safety Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 04/92] iio: accel: adxl367: " Jonathan Cameron
                   ` (89 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

 ____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.

Fixes: 327a0eaf19d53 ("iio: accel: adxl355: Add triggered buffer support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Puranjay Mohan <puranjay12@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/accel/adxl355_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/accel/adxl355_core.c b/drivers/iio/accel/adxl355_core.c
index e9c10c8c32f0..2dfe780d6144 100644
--- a/drivers/iio/accel/adxl355_core.c
+++ b/drivers/iio/accel/adxl355_core.c
@@ -177,7 +177,7 @@ struct adxl355_data {
 			u8 buf[14];
 			s64 ts;
 		} buffer;
-	} ____cacheline_aligned;
+	} __aligned(IIO_DMA_MINALIGN);
 };
 
 static int adxl355_set_op_mode(struct adxl355_data *data,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 04/92] iio: accel: adxl367: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (2 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 03/92] iio: accel: adxl355: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 05/92] iio: accel: bma220: " Jonathan Cameron
                   ` (88 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron,
	Cosmin Tanislav

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.

Update comment to reflect that DMA safety may require separate
cachelines.

Fixes: cbab791c5e2a5 ("iio: accel: add ADXL367 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Cosmin Tanislav <demonsingur@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/accel/adxl367.c     | 2 +-
 drivers/iio/accel/adxl367_spi.c | 8 +++++---
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/iio/accel/adxl367.c b/drivers/iio/accel/adxl367.c
index 62960134ea19..d680bec05efc 100644
--- a/drivers/iio/accel/adxl367.c
+++ b/drivers/iio/accel/adxl367.c
@@ -179,7 +179,7 @@ struct adxl367_state {
 	unsigned int	fifo_set_size;
 	unsigned int	fifo_watermark;
 
-	__be16		fifo_buf[ADXL367_FIFO_SIZE] ____cacheline_aligned;
+	__be16		fifo_buf[ADXL367_FIFO_SIZE] __aligned(IIO_DMA_MINALIGN);
 	__be16		sample_buf;
 	u8		act_threshold_buf[2];
 	u8		inact_time_buf[2];
diff --git a/drivers/iio/accel/adxl367_spi.c b/drivers/iio/accel/adxl367_spi.c
index 26dfc821ebbe..118c894015a5 100644
--- a/drivers/iio/accel/adxl367_spi.c
+++ b/drivers/iio/accel/adxl367_spi.c
@@ -9,6 +9,8 @@
 #include <linux/regmap.h>
 #include <linux/spi/spi.h>
 
+#include <linux/iio/iio.h>
+
 #include "adxl367.h"
 
 #define ADXL367_SPI_WRITE_COMMAND	0x0A
@@ -28,10 +30,10 @@ struct adxl367_spi_state {
 	struct spi_transfer	fifo_xfer[2];
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
-	 * transfer buffers to live in their own cache lines.
+	 * DMA (thus cache coherency maintenance) may require the
+	 * transfer buffers live in their own cache lines.
 	 */
-	u8			reg_write_tx_buf[1] ____cacheline_aligned;
+	u8			reg_write_tx_buf[1] __aligned(IIO_DMA_MINALIGN);
 	u8			reg_read_tx_buf[2];
 	u8			fifo_tx_buf[1];
 };
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 05/92] iio: accel: bma220: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (3 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 04/92] iio: accel: adxl367: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 06/92] iio: accel: bmi088: " Jonathan Cameron
                   ` (87 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.

Fixes: bf2a5600a3ebc ("iio: accel: Add support for Bosch BMA220")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/accel/bma220_spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/accel/bma220_spi.c b/drivers/iio/accel/bma220_spi.c
index 74024d7ce5ac..b6d9ab8e2054 100644
--- a/drivers/iio/accel/bma220_spi.c
+++ b/drivers/iio/accel/bma220_spi.c
@@ -67,7 +67,7 @@ struct bma220_data {
 		/* Ensure timestamp is naturally aligned. */
 		s64 timestamp __aligned(8);
 	} scan;
-	u8 tx_buf[2] ____cacheline_aligned;
+	u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct iio_chan_spec bma220_channels[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 06/92] iio: accel: bmi088: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (4 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 05/92] iio: accel: bma220: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 07/92] iio: accel: sca3000: " Jonathan Cameron
                   ` (86 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/accel/bmi088-accel-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/accel/bmi088-accel-core.c b/drivers/iio/accel/bmi088-accel-core.c
index 8b2728bbcade..00894038987c 100644
--- a/drivers/iio/accel/bmi088-accel-core.c
+++ b/drivers/iio/accel/bmi088-accel-core.c
@@ -124,7 +124,7 @@ struct bmi088_accel_chip_info {
 struct bmi088_accel_data {
 	struct regmap *regmap;
 	const struct bmi088_accel_chip_info *chip_info;
-	u8 buffer[2] ____cacheline_aligned; /* shared DMA safe buffer */
+	u8 buffer[2] __aligned(IIO_DMA_MINALIGN); /* shared DMA safe buffer */
 };
 
 static const struct regmap_range bmi088_volatile_ranges[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 07/92] iio: accel: sca3000: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (5 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 06/92] iio: accel: bmi088: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 08/92] iio: accel: sca3300: " Jonathan Cameron
                   ` (85 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.

The second alignment marking is left in place to avoid doing more than
the simple fix in this patch.

Fixes: ced5c03d360ae ("staging:iio:accel:sca3000 merge files into one.")
Fixes: 152a6a884ae13 ("staging:iio:accel:sca3000 move to hybrid hard / soft buffer design.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/accel/sca3000.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/accel/sca3000.c b/drivers/iio/accel/sca3000.c
index 83c81072511e..2eecd2ab72dd 100644
--- a/drivers/iio/accel/sca3000.c
+++ b/drivers/iio/accel/sca3000.c
@@ -167,8 +167,8 @@ struct sca3000_state {
 	int				mo_det_use_count;
 	struct mutex			lock;
 	/* Can these share a cacheline ? */
-	u8				rx[384] ____cacheline_aligned;
-	u8				tx[6] ____cacheline_aligned;
+	u8				rx[384] __aligned(IIO_DMA_MINALIGN);
+	u8				tx[6] __aligned(IIO_DMA_MINALIGN);
 };
 
 /**
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 08/92] iio: accel: sca3300: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (6 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 07/92] iio: accel: sca3000: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 09/92] iio: adc: ad7266: " Jonathan Cameron
                   ` (84 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is insufficient guarantee for non-coherent DMA.
Switch to the updated IIO_DMA_MINALIGN definition.

Fixes: 9cc9806e22178 ("iio: accel: Add driver for Murata SCA3300 accelerometer")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/accel/sca3300.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/accel/sca3300.c b/drivers/iio/accel/sca3300.c
index f7ef8ecfd34a..39e0c24364ae 100644
--- a/drivers/iio/accel/sca3300.c
+++ b/drivers/iio/accel/sca3300.c
@@ -115,7 +115,7 @@ struct sca3300_data {
 		s16 channels[4];
 		s64 ts __aligned(sizeof(s64));
 	} scan;
-	u8 txbuf[4] ____cacheline_aligned;
+	u8 txbuf[4] __aligned(IIO_DMA_MINALIGN);
 	u8 rxbuf[4];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 09/92] iio: adc: ad7266: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (7 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 08/92] iio: accel: sca3300: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 10/92] iio: adc: ad7280a: " Jonathan Cameron
                   ` (83 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to reflect that DMA safety 'may' require separate
cachelines.

Fixes: 54e018da3141 ("iio:ad7266: Mark transfer buffer as __be16")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7266.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ad7266.c b/drivers/iio/adc/ad7266.c
index c17d9b5fbaf6..53c83e04dde5 100644
--- a/drivers/iio/adc/ad7266.c
+++ b/drivers/iio/adc/ad7266.c
@@ -37,7 +37,7 @@ struct ad7266_state {
 	struct gpio_desc	*gpios[3];
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 * The buffer needs to be large enough to hold two samples (4 bytes) and
 	 * the naturally aligned timestamp (8 bytes).
@@ -45,7 +45,7 @@ struct ad7266_state {
 	struct {
 		__be16 sample[2];
 		s64 timestamp;
-	} data ____cacheline_aligned;
+	} data __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ad7266_wakeup(struct ad7266_state *st)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 10/92] iio: adc: ad7280a: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (8 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 09/92] iio: adc: ad7266: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 11/92] iio: adc: ad7292: " Jonathan Cameron
                   ` (82 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 003f1d48de52 ("staging:iio:adc:ad7280a: Split buff[2] into tx and rx parts")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7280a.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ad7280a.c b/drivers/iio/adc/ad7280a.c
index ec9acbf12b9a..047a9d0dbcf7 100644
--- a/drivers/iio/adc/ad7280a.c
+++ b/drivers/iio/adc/ad7280a.c
@@ -183,7 +183,7 @@ struct ad7280_state {
 	unsigned char			cb_mask[AD7280A_MAX_CHAIN];
 	struct mutex			lock; /* protect sensor state */
 
-	__be32				tx ____cacheline_aligned;
+	__be32				tx __aligned(IIO_DMA_MINALIGN);
 	__be32				rx;
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 11/92] iio: adc: ad7292: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (9 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 10/92] iio: adc: ad7280a: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 12/92] iio: adc: ad7298: " Jonathan Cameron
                   ` (81 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 506d2e317a0a ("iio: adc: Add driver support for AD7292")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
Acked-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7292.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ad7292.c b/drivers/iio/adc/ad7292.c
index 3271a31afde1..92c68d467c50 100644
--- a/drivers/iio/adc/ad7292.c
+++ b/drivers/iio/adc/ad7292.c
@@ -80,7 +80,7 @@ struct ad7292_state {
 	struct regulator *reg;
 	unsigned short vref_mv;
 
-	__be16 d16 ____cacheline_aligned;
+	__be16 d16 __aligned(IIO_DMA_MINALIGN);
 	u8 d8[2];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 12/92] iio: adc: ad7298: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (10 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 11/92] iio: adc: ad7292: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 13/92] iio: adc: ad7476: " Jonathan Cameron
                   ` (80 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: be7fd3b86ad2 ("iio:adc:ad7298 make the tx and rx buffers __be16")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7298.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ad7298.c b/drivers/iio/adc/ad7298.c
index 3f4e73f7d35a..c0430f71f592 100644
--- a/drivers/iio/adc/ad7298.c
+++ b/drivers/iio/adc/ad7298.c
@@ -49,7 +49,7 @@ struct ad7298_state {
 	 * DMA (thus cache coherency maintenance) requires the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	__be16				rx_buf[12] ____cacheline_aligned;
+	__be16				rx_buf[12] __aligned(IIO_DMA_MINALIGN);
 	__be16				tx_buf[2];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 13/92] iio: adc: ad7476: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (11 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 12/92] iio: adc: ad7298: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 14/92] iio: adc: ad7606: " Jonathan Cameron
                   ` (79 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

 ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to reflect that DMA safety 'may' require separate
cachelines.

Fixes tag is unlikely to be the actual introdution of the problem but is
far enough back to cover any likely backporting.

Fixes: 7a28fe3c93d6 ("staging:iio:ad7476: Squash driver into a single file.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7476.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/adc/ad7476.c b/drivers/iio/adc/ad7476.c
index a1e8b32671cf..94776f696290 100644
--- a/drivers/iio/adc/ad7476.c
+++ b/drivers/iio/adc/ad7476.c
@@ -44,13 +44,12 @@ struct ad7476_state {
 	struct spi_transfer		xfer;
 	struct spi_message		msg;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 * Make the buffer large enough for one 16 bit sample and one 64 bit
 	 * aligned 64 bit timestamp.
 	 */
-	unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)]
-			____cacheline_aligned;
+	unsigned char data[ALIGN(2, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ad7476_supported_device_ids {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 14/92] iio: adc: ad7606: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (12 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 13/92] iio: adc: ad7476: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 15/92] iio: adc: ad7766: " Jonathan Cameron
                   ` (78 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_ALIGN definition.

Update the comment to reflect the fact DMA safety 'may' require
separate cachelines.

Fixes: 7989b4bb23fe ("iio: adc: ad7616: Add support for AD7616 ADC")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7606.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h
index 4f82d7c9acfd..2dc4f599f9df 100644
--- a/drivers/iio/adc/ad7606.h
+++ b/drivers/iio/adc/ad7606.h
@@ -116,11 +116,11 @@ struct ad7606_state {
 	struct completion		completion;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 * 16 * 16-bit samples + 64-bit timestamp
 	 */
-	unsigned short			data[20] ____cacheline_aligned;
+	unsigned short			data[20] __aligned(IIO_DMA_MINALIGN);
 	__be16				d16[2];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 15/92] iio: adc: ad7766: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (13 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 14/92] iio: adc: ad7606: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 16/92] iio: adc: ad7768-1: " Jonathan Cameron
                   ` (77 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to reflect the fact DMA safety 'may' require
separate cachelines.

Fixes: aa16c6bd0e09 ("iio:adc: Add support for AD7766/AD7767")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7766.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/adc/ad7766.c b/drivers/iio/adc/ad7766.c
index 51ee9482e0df..3079a0872947 100644
--- a/drivers/iio/adc/ad7766.c
+++ b/drivers/iio/adc/ad7766.c
@@ -45,13 +45,12 @@ struct ad7766 {
 	struct spi_message msg;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 * Make the buffer large enough for one 24 bit sample and one 64 bit
 	 * aligned 64 bit timestamp.
 	 */
-	unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)]
-			____cacheline_aligned;
+	unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)]	__aligned(IIO_DMA_MINALIGN);
 };
 
 /*
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 16/92] iio: adc: ad7768-1: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (14 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 15/92] iio: adc: ad7766: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 17/92] iio: adc: ad7887: " Jonathan Cameron
                   ` (76 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to reflect that separate cachelines 'may' be
required.

Fixes: a5f8c7da3dbe ("iio: adc: Add AD7768-1 ADC basic support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7768-1.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c
index aa42ba759fa1..60f394da4640 100644
--- a/drivers/iio/adc/ad7768-1.c
+++ b/drivers/iio/adc/ad7768-1.c
@@ -163,7 +163,7 @@ struct ad7768_state {
 	struct gpio_desc *gpio_sync_in;
 	const char *labels[ARRAY_SIZE(ad7768_channels)];
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	union {
@@ -173,7 +173,7 @@ struct ad7768_state {
 		} scan;
 		__be32 d32;
 		u8 d8[2];
-	} data ____cacheline_aligned;
+	} data __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ad7768_spi_reg_read(struct ad7768_state *st, unsigned int addr,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 17/92] iio: adc: ad7887: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (15 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 16/92] iio: adc: ad7768-1: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 18/92] iio: adc: ad7923: " Jonathan Cameron
                   ` (75 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes tag is clearly not where this was introduced but it is very unlikely
anyone will back port it past that point.

Fixes: 65dd3d3d7a9b ("staging:iio:ad7887: Squash everything into one file")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7887.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/adc/ad7887.c b/drivers/iio/adc/ad7887.c
index f64999714a4d..965bdc8aa696 100644
--- a/drivers/iio/adc/ad7887.c
+++ b/drivers/iio/adc/ad7887.c
@@ -66,13 +66,12 @@ struct ad7887_state {
 	unsigned char			tx_cmd_buf[4];
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 * Buffer needs to be large enough to hold two 16 bit samples and a
 	 * 64 bit aligned 64 bit timestamp.
 	 */
-	unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
-		____cacheline_aligned;
+	unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ad7887_supported_device_ids {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 18/92] iio: adc: ad7923: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (16 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 17/92] iio: adc: ad7887: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:55 ` [PATCH v2 19/92] iio: adc: ad7949: " Jonathan Cameron
                   ` (74 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Note that some other fixes have applied to this line of code
that may complicate automated backporting.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Fixes: 0eac259db28f ("IIO ADC support for AD7923")
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7923.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ad7923.c b/drivers/iio/adc/ad7923.c
index 069b561ee768..edad1f30121d 100644
--- a/drivers/iio/adc/ad7923.c
+++ b/drivers/iio/adc/ad7923.c
@@ -57,12 +57,12 @@ struct ad7923_state {
 	unsigned int			settings;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 * Ensure rx_buf can be directly used in iio_push_to_buffers_with_timetamp
 	 * Length = 8 channels + 4 extra for 8 byte timestamp
 	 */
-	__be16				rx_buf[12] ____cacheline_aligned;
+	__be16				rx_buf[12] __aligned(IIO_DMA_MINALIGN);
 	__be16				tx_buf[4];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 19/92] iio: adc: ad7949: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (17 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 18/92] iio: adc: ad7923: " Jonathan Cameron
@ 2022-05-08 17:55 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 20/92] iio: adc: hi8435: " Jonathan Cameron
                   ` (73 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:55 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Note the fixes tag predates some changes to this line of code so
automated application of this fix may fail.

Fixes: 7f40e0614317 ("iio:adc:ad7949: Add AD7949 ADC driver family")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Charles-Antoine Couret <charles-antoine.couret@essensium.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ad7949.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c
index 44bb5fde83de..ed4c1656ca75 100644
--- a/drivers/iio/adc/ad7949.c
+++ b/drivers/iio/adc/ad7949.c
@@ -86,7 +86,7 @@ struct ad7949_adc_chip {
 	u8 resolution;
 	u16 cfg;
 	unsigned int current_channel;
-	u16 buffer ____cacheline_aligned;
+	u16 buffer __aligned(IIO_DMA_MINALIGN);
 	__be16 buf8b;
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 20/92] iio: adc: hi8435: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (18 preceding siblings ...)
  2022-05-08 17:55 ` [PATCH v2 19/92] iio: adc: ad7949: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 21/92] iio: adc: ltc2496: " Jonathan Cameron
                   ` (72 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 72aa29ce0a59 ("iio: adc: hi8435: Holt HI-8435 threshold detector")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/hi8435.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/hi8435.c b/drivers/iio/adc/hi8435.c
index 8eb0140df133..771fa12bdc02 100644
--- a/drivers/iio/adc/hi8435.c
+++ b/drivers/iio/adc/hi8435.c
@@ -49,7 +49,7 @@ struct hi8435_priv {
 
 	unsigned threshold_lo[2]; /* GND-Open and Supply-Open thresholds */
 	unsigned threshold_hi[2]; /* GND-Open and Supply-Open thresholds */
-	u8 reg_buffer[3] ____cacheline_aligned;
+	u8 reg_buffer[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int hi8435_readb(struct hi8435_priv *priv, u8 reg, u8 *val)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 21/92] iio: adc: ltc2496: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (19 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 20/92] iio: adc: hi8435: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 22/92] iio: adc: ltc2497: " Jonathan Cameron
                   ` (71 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: e4c5c4dfaa88 ("iio: adc: new driver to support Linear technology's ltc2496")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ltc2496.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ltc2496.c b/drivers/iio/adc/ltc2496.c
index 5a55f79f2574..dfb3bb5997e5 100644
--- a/drivers/iio/adc/ltc2496.c
+++ b/drivers/iio/adc/ltc2496.c
@@ -24,10 +24,10 @@ struct ltc2496_driverdata {
 	struct spi_device *spi;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	unsigned char rxbuf[3] ____cacheline_aligned;
+	unsigned char rxbuf[3] __aligned(IIO_DMA_MINALIGN);
 	unsigned char txbuf[3];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 22/92] iio: adc: ltc2497: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (20 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 21/92] iio: adc: ltc2496: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 23/92] iio: adc: max1027: " Jonathan Cameron
                   ` (70 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: bc82222fcca1 ("iio:adc: Driver for Linear Technology LTC2497 ADC")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Michael Hennerich <michael.hennerich@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ltc2497.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ltc2497.c b/drivers/iio/adc/ltc2497.c
index 1adddf5a88a9..f7c786f37ceb 100644
--- a/drivers/iio/adc/ltc2497.c
+++ b/drivers/iio/adc/ltc2497.c
@@ -20,10 +20,10 @@ struct ltc2497_driverdata {
 	struct ltc2497core_driverdata common_ddata;
 	struct i2c_client *client;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	__be32 buf ____cacheline_aligned;
+	__be32 buf __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ltc2497_result_and_measure(struct ltc2497core_driverdata *ddata,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 23/92] iio: adc: max1027: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (21 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 22/92] iio: adc: ltc2497: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 24/92] iio: adc: max11100: " Jonathan Cameron
                   ` (69 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: fc167f624833 ("iio: add support of the max1027")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/max1027.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/max1027.c b/drivers/iio/adc/max1027.c
index 4daf1d576c4e..b725d012625c 100644
--- a/drivers/iio/adc/max1027.c
+++ b/drivers/iio/adc/max1027.c
@@ -272,7 +272,7 @@ struct max1027_state {
 	struct mutex			lock;
 	struct completion		complete;
 
-	u8				reg ____cacheline_aligned;
+	u8				reg __aligned(IIO_DMA_MINALIGN);
 };
 
 static int max1027_wait_eoc(struct iio_dev *indio_dev)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 24/92] iio: adc: max11100: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (22 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 23/92] iio: adc: max1027: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 25/92] iio: adc: max1118: " Jonathan Cameron
                   ` (68 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron,
	Jacopo Mondi

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: a8e7e88df9ec ("iio: adc: Add Maxim MAX11100 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Jacopo Mondi <jacopo+renesas@jmondi.org>
Acked-by: Jacopo Mondi <jacopo@jmondi.org>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/max11100.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/max11100.c b/drivers/iio/adc/max11100.c
index eb1ce6a0315c..49e38dca8fe2 100644
--- a/drivers/iio/adc/max11100.c
+++ b/drivers/iio/adc/max11100.c
@@ -33,10 +33,10 @@ struct max11100_state {
 	struct spi_device *spi;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	u8 buffer[3] ____cacheline_aligned;
+	u8 buffer[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct iio_chan_spec max11100_channels[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 25/92] iio: adc: max1118: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (23 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 24/92] iio: adc: max11100: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 26/92] iio: adc: max1241: " Jonathan Cameron
                   ` (67 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: a9e9c7153e96 ("iio: adc: add max1117/max1118/max1119 ADC driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/max1118.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/max1118.c b/drivers/iio/adc/max1118.c
index a41bc570be21..75ab57d9aef7 100644
--- a/drivers/iio/adc/max1118.c
+++ b/drivers/iio/adc/max1118.c
@@ -42,7 +42,7 @@ struct max1118 {
 		s64 ts __aligned(8);
 	} scan;
 
-	u8 data ____cacheline_aligned;
+	u8 data __aligned(IIO_DMA_MINALIGN);
 };
 
 #define MAX1118_CHANNEL(ch)						\
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 26/92] iio: adc: max1241: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (24 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 25/92] iio: adc: max1118: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 27/92] iio: adc: mcp320x: " Jonathan Cameron
                   ` (66 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 8a80a71d9020 ("iio: adc: Add MAX1241 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Alexandru Lazar <alazar@startmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/max1241.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/max1241.c b/drivers/iio/adc/max1241.c
index a5afd84af58b..a815ad1f6913 100644
--- a/drivers/iio/adc/max1241.c
+++ b/drivers/iio/adc/max1241.c
@@ -26,7 +26,7 @@ struct max1241 {
 	struct regulator *vref;
 	struct gpio_desc *shutdown;
 
-	__be16 data ____cacheline_aligned;
+	__be16 data __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct iio_chan_spec max1241_channels[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 27/92] iio: adc: mcp320x: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (25 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 26/92] iio: adc: max1241: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 28/92] iio: adc: ti-adc0832: " Jonathan Cameron
                   ` (65 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Worth noting the fixes tag refers to the same issue being observed
on a platform that probably had only 64 byte cachelines.

Fixes: 0e81bc99a082 ("iio: mcp320x: Fix occasional incorrect readings")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Michael Welling <mwelling@ieee.org>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/mcp320x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/mcp320x.c b/drivers/iio/adc/mcp320x.c
index b4c69acb33e3..f3b81798b3c9 100644
--- a/drivers/iio/adc/mcp320x.c
+++ b/drivers/iio/adc/mcp320x.c
@@ -92,7 +92,7 @@ struct mcp320x {
 	struct mutex lock;
 	const struct mcp320x_chip_info *chip_info;
 
-	u8 tx_buf ____cacheline_aligned;
+	u8 tx_buf __aligned(IIO_DMA_MINALIGN);
 	u8 rx_buf[4];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 28/92] iio: adc: ti-adc0832: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (26 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 27/92] iio: adc: mcp320x: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 29/92] iio: adc: ti-adc084s021: " Jonathan Cameron
                   ` (64 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: efc945fb729c ("iio: adc: add support for ADC0831/ADC0832/ADC0834/ADC0838 chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-adc0832.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ti-adc0832.c b/drivers/iio/adc/ti-adc0832.c
index fb5e72600b96..b11ce555ba3b 100644
--- a/drivers/iio/adc/ti-adc0832.c
+++ b/drivers/iio/adc/ti-adc0832.c
@@ -36,7 +36,7 @@ struct adc0832 {
 	 */
 	u8 data[24] __aligned(8);
 
-	u8 tx_buf[2] ____cacheline_aligned;
+	u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN);
 	u8 rx_buf[2];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 29/92] iio: adc: ti-adc084s021: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (27 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 28/92] iio: adc: ti-adc0832: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-09  8:34   ` Marten Lindahl
  2022-05-08 17:56 ` [PATCH v2 30/92] iio: adc: ti-adc108s102: " Jonathan Cameron
                   ` (63 subsequent siblings)
  92 siblings, 1 reply; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 3691e5a69449 ("iio: adc: add driver for the ti-adc084s021 chip")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Mårten Lindahl <martenli@axis.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-adc084s021.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ti-adc084s021.c b/drivers/iio/adc/ti-adc084s021.c
index c9b5d9aec3dc..1f6e53832e06 100644
--- a/drivers/iio/adc/ti-adc084s021.c
+++ b/drivers/iio/adc/ti-adc084s021.c
@@ -32,10 +32,10 @@ struct adc084s021 {
 		s64 ts __aligned(8);
 	} scan;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache line.
 	 */
-	u16 tx_buf[4] ____cacheline_aligned;
+	u16 tx_buf[4] __aligned(IIO_DMA_MINALIGN);
 	__be16 rx_buf[5]; /* First 16-bits are trash */
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 30/92] iio: adc: ti-adc108s102: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (28 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 29/92] iio: adc: ti-adc084s021: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 31/92] iio: adc: ti-adc12138: " Jonathan Cameron
                   ` (62 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Dual fixes tags as two cases that were introduced in different patches.
One of those patches is a fix however and likely to have been backported
to stable kernels.

Note the second alignment marking is likely to be unnecessary, but is
left for now to keep this fix simple.

Fixes: 3691e5a69449 ("iio: adc: add driver for the ti-adc084s021 chip")
Fixes: cbe5c6977604 ("iio: adc: ti-adc108s102: Fix alignment of buffer pushed to iio buffers.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-adc108s102.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ti-adc108s102.c b/drivers/iio/adc/ti-adc108s102.c
index c8e48881c37f..c82a161630e1 100644
--- a/drivers/iio/adc/ti-adc108s102.c
+++ b/drivers/iio/adc/ti-adc108s102.c
@@ -77,8 +77,8 @@ struct adc108s102_state {
 	 *  tx_buf: 8 channel read commands, plus 1 dummy command
 	 *  rx_buf: 1 dummy response, 8 channel responses
 	 */
-	__be16				rx_buf[9] ____cacheline_aligned;
-	__be16				tx_buf[9] ____cacheline_aligned;
+	__be16				rx_buf[9] __aligned(IIO_DMA_MINALIGN);
+	__be16				tx_buf[9] __aligned(IIO_DMA_MINALIGN);
 };
 
 #define ADC108S102_V_CHAN(index)					\
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 31/92] iio: adc: ti-adc12138: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (29 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 30/92] iio: adc: ti-adc108s102: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 32/92] iio: adc: ti-adc128s052: " Jonathan Cameron
                   ` (61 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 50a6edb1b6e0 ("iio: adc: add ADC12130/ADC12132/ADC12138 ADC driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Akinobu Mita <akinobu.mita@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-adc12138.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ti-adc12138.c b/drivers/iio/adc/ti-adc12138.c
index 59d75d09604f..c0a72d72f3a9 100644
--- a/drivers/iio/adc/ti-adc12138.c
+++ b/drivers/iio/adc/ti-adc12138.c
@@ -55,7 +55,7 @@ struct adc12138 {
 	 */
 	__be16 data[20] __aligned(8);
 
-	u8 tx_buf[2] ____cacheline_aligned;
+	u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN);
 	u8 rx_buf[2];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 32/92] iio: adc: ti-adc128s052: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (30 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 31/92] iio: adc: ti-adc12138: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 33/92] iio: adc: ti-adc161s626: " Jonathan Cameron
                   ` (60 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 913b86468674 ("iio: adc: Add TI ADC128S052")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-adc128s052.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c
index 8e7adec87755..622fd384983c 100644
--- a/drivers/iio/adc/ti-adc128s052.c
+++ b/drivers/iio/adc/ti-adc128s052.c
@@ -29,7 +29,7 @@ struct adc128 {
 	struct regulator *reg;
 	struct mutex lock;
 
-	u8 buffer[2] ____cacheline_aligned;
+	u8 buffer[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 33/92] iio: adc: ti-adc161s626: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (31 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 32/92] iio: adc: ti-adc128s052: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 34/92] iio: adc: ti-ads124s08: " Jonathan Cameron
                   ` (59 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 4d671b71beef ("iio: adc: ti-adc161s626: add support for TI 1-channel differential ADCs")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Matt Ranostay <mranostay@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-adc161s626.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ti-adc161s626.c b/drivers/iio/adc/ti-adc161s626.c
index 75ca7f1c8726..b789891dcf49 100644
--- a/drivers/iio/adc/ti-adc161s626.c
+++ b/drivers/iio/adc/ti-adc161s626.c
@@ -71,7 +71,7 @@ struct ti_adc_data {
 	u8 read_size;
 	u8 shift;
 
-	u8 buffer[16] ____cacheline_aligned;
+	u8 buffer[16] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ti_adc_read_measurement(struct ti_adc_data *data,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 34/92] iio: adc: ti-ads124s08: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (32 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 33/92] iio: adc: ti-adc161s626: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 35/92] iio: adc: ti-ads131e08: " Jonathan Cameron
                   ` (58 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: e717f8c6dfec ("iio: adc: Add the TI ads124s08 ADC code")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-ads124s08.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ti-ads124s08.c b/drivers/iio/adc/ti-ads124s08.c
index 767b3b634809..64833156c199 100644
--- a/drivers/iio/adc/ti-ads124s08.c
+++ b/drivers/iio/adc/ti-ads124s08.c
@@ -106,7 +106,7 @@ struct ads124s_private {
 	 * timestamp is maintained.
 	 */
 	u32 buffer[ADS124S08_MAX_CHANNELS + sizeof(s64)/sizeof(u32)] __aligned(8);
-	u8 data[5] ____cacheline_aligned;
+	u8 data[5] __aligned(IIO_DMA_MINALIGN);
 };
 
 #define ADS124S08_CHAN(index)					\
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 35/92] iio: adc: ti-ads131e08: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (33 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 34/92] iio: adc: ti-ads124s08: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 36/92] iio: adc: ti-ads7950: " Jonathan Cameron
                   ` (57 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: d935eddd2799 ("iio: adc: Add driver for Texas Instruments ADS131E0x ADC family")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Tomislav Denis <tomislav.denis@avl.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-ads131e08.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ti-ads131e08.c b/drivers/iio/adc/ti-ads131e08.c
index 0c2025a22575..0dd9a50a9138 100644
--- a/drivers/iio/adc/ti-ads131e08.c
+++ b/drivers/iio/adc/ti-ads131e08.c
@@ -105,7 +105,7 @@ struct ads131e08_state {
 		s64 ts __aligned(8);
 	} tmp_buf;
 
-	u8 tx_buf[3] ____cacheline_aligned;
+	u8 tx_buf[3] __aligned(IIO_DMA_MINALIGN);
 	/*
 	 * Add extra one padding byte to be able to access the last channel
 	 * value using u32 pointer
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 36/92] iio: adc: ti-ads7950: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (34 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 35/92] iio: adc: ti-ads131e08: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 37/92] iio: adc: ti-ads8344: " Jonathan Cameron
                   ` (56 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 902c4b2446d4 ("iio: adc: New driver for TI ADS7950 chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: David Lechner <david@lechnology.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-ads7950.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ti-ads7950.c b/drivers/iio/adc/ti-ads7950.c
index e3658b969c5b..2cc9a9bd9db6 100644
--- a/drivers/iio/adc/ti-ads7950.c
+++ b/drivers/iio/adc/ti-ads7950.c
@@ -102,11 +102,11 @@ struct ti_ads7950_state {
 	unsigned int		gpio_cmd_settings_bitmask;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	u16 rx_buf[TI_ADS7950_MAX_CHAN + 2 + TI_ADS7950_TIMESTAMP_SIZE]
-							____cacheline_aligned;
+		__aligned(IIO_DMA_MINALIGN);
 	u16 tx_buf[TI_ADS7950_MAX_CHAN + 2];
 	u16 single_tx;
 	u16 single_rx;
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 37/92] iio: adc: ti-ads8344: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (35 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 36/92] iio: adc: ti-ads7950: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 38/92] iio: adc: ti-ads8688: " Jonathan Cameron
                   ` (55 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-ads8344.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c
index c96d2a9ba924..bbd85cb47f81 100644
--- a/drivers/iio/adc/ti-ads8344.c
+++ b/drivers/iio/adc/ti-ads8344.c
@@ -28,7 +28,7 @@ struct ads8344 {
 	 */
 	struct mutex lock;
 
-	u8 tx_buf ____cacheline_aligned;
+	u8 tx_buf __aligned(IIO_DMA_MINALIGN);
 	u8 rx_buf[3];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 38/92] iio: adc: ti-ads8688: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (36 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 37/92] iio: adc: ti-ads8344: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 39/92] iio: adc: ti-tlc4541: " Jonathan Cameron
                   ` (54 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 3e87e7838328 ("iio: adc: Add TI ADS8688")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-ads8688.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/adc/ti-ads8688.c b/drivers/iio/adc/ti-ads8688.c
index 22c2583eedd0..7ee14c6d9f46 100644
--- a/drivers/iio/adc/ti-ads8688.c
+++ b/drivers/iio/adc/ti-ads8688.c
@@ -71,7 +71,7 @@ struct ads8688_state {
 	union {
 		__be32 d32;
 		u8 d8[4];
-	} data[2] ____cacheline_aligned;
+	} data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ads8688_id {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 39/92] iio: adc: ti-tlc4541: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (37 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 38/92] iio: adc: ti-ads8688: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 40/92] iio: addac: ad74413r: " Jonathan Cameron
                   ` (53 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: ac2bec9d587c ("iio: adc: tlc4541: add support for TI tlc4541 adc")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/adc/ti-tlc4541.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/adc/ti-tlc4541.c b/drivers/iio/adc/ti-tlc4541.c
index 2406eda9dfc6..30f629a553a1 100644
--- a/drivers/iio/adc/ti-tlc4541.c
+++ b/drivers/iio/adc/ti-tlc4541.c
@@ -37,12 +37,12 @@ struct tlc4541_state {
 	struct spi_message              scan_single_msg;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 * 2 bytes data + 6 bytes padding + 8 bytes timestamp when
 	 * call iio_push_to_buffers_with_timestamp.
 	 */
-	__be16                          rx_buf[8] ____cacheline_aligned;
+	__be16                          rx_buf[8] __aligned(IIO_DMA_MINALIGN);
 };
 
 struct tlc4541_chip_info {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 40/92] iio: addac: ad74413r: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (38 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 39/92] iio: adc: ti-tlc4541: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 41/92] iio: amplifiers: ad8366: " Jonathan Cameron
                   ` (52 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: fea251b6a5db ("iio: addac: add AD74413R driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Cosmin Tanislav <cosmin.tanislav@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/addac/ad74413r.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/addac/ad74413r.c b/drivers/iio/addac/ad74413r.c
index acd230a6af35..6a66d7a65db7 100644
--- a/drivers/iio/addac/ad74413r.c
+++ b/drivers/iio/addac/ad74413r.c
@@ -77,13 +77,13 @@ struct ad74413r_state {
 	struct spi_transfer	adc_samples_xfer[AD74413R_CHANNEL_MAX + 1];
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	struct {
 		u8 rx_buf[AD74413R_FRAME_SIZE * AD74413R_CHANNEL_MAX];
 		s64 timestamp;
-	} adc_samples_buf ____cacheline_aligned;
+	} adc_samples_buf __aligned(IIO_DMA_MINALIGN);
 
 	u8	adc_samples_tx_buf[AD74413R_FRAME_SIZE * AD74413R_CHANNEL_MAX];
 	u8	reg_tx_buf[AD74413R_FRAME_SIZE];
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 41/92] iio: amplifiers: ad8366: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (39 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 40/92] iio: addac: ad74413r: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 42/92] iio: common: ssp: " Jonathan Cameron
                   ` (51 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: e71d42e03c60 ("iio: amplifiers: New driver for AD8366 Dual-Digital Variable Gain Amplifier")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/amplifiers/ad8366.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/amplifiers/ad8366.c b/drivers/iio/amplifiers/ad8366.c
index 1134ae12e531..f2c2ea79a07f 100644
--- a/drivers/iio/amplifiers/ad8366.c
+++ b/drivers/iio/amplifiers/ad8366.c
@@ -45,10 +45,10 @@ struct ad8366_state {
 	enum ad8366_type	type;
 	struct ad8366_info	*info;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	unsigned char		data[2] ____cacheline_aligned;
+	unsigned char		data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static struct ad8366_info ad8366_infos[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 42/92] iio: common: ssp: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (40 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 41/92] iio: amplifiers: ad8366: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 43/92] iio: dac: ad5064: " Jonathan Cameron
                   ` (50 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 50dd64d57eee ("iio: common: ssp_sensors: Add sensorhub driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/common/ssp_sensors/ssp.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/iio/common/ssp_sensors/ssp.h b/drivers/iio/common/ssp_sensors/ssp.h
index abb832795619..f649cdecc277 100644
--- a/drivers/iio/common/ssp_sensors/ssp.h
+++ b/drivers/iio/common/ssp_sensors/ssp.h
@@ -221,8 +221,7 @@ struct ssp_data {
 	struct iio_dev *sensor_devs[SSP_SENSOR_MAX];
 	atomic_t enable_refcount;
 
-	__le16 header_buffer[SSP_HEADER_BUFFER_SIZE / sizeof(__le16)]
-		____cacheline_aligned;
+	__le16 header_buffer[SSP_HEADER_BUFFER_SIZE / sizeof(__le16)] __aligned(IIO_DMA_MINALIGN);
 };
 
 void ssp_clean_pending_list(struct ssp_data *data);
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 43/92] iio: dac: ad5064: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (41 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 42/92] iio: common: ssp: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 44/92] iio: dac: ad5360: " Jonathan Cameron
                   ` (49 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 6a17a0768f77 ("iio:dac:ad5064: Add support for the ad5629r and ad5669r")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5064.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ad5064.c b/drivers/iio/dac/ad5064.c
index 27ee2c63c5d4..e3b1add34f46 100644
--- a/drivers/iio/dac/ad5064.c
+++ b/drivers/iio/dac/ad5064.c
@@ -115,13 +115,13 @@ struct ad5064_state {
 	struct mutex lock;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	union {
 		u8 i2c[3];
 		__be32 spi;
-	} data ____cacheline_aligned;
+	} data __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ad5064_type {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 44/92] iio: dac: ad5360: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (42 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 43/92] iio: dac: ad5064: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 45/92] iio: dac: ad5421: " Jonathan Cameron
                   ` (48 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: a3e2940c24d3 ("staging:iio:dac: Add AD5360 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5360.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ad5360.c b/drivers/iio/dac/ad5360.c
index ecbc6a51d60f..1bde696a572c 100644
--- a/drivers/iio/dac/ad5360.c
+++ b/drivers/iio/dac/ad5360.c
@@ -79,13 +79,13 @@ struct ad5360_state {
 	struct mutex			lock;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	union {
 		__be32 d32;
 		u8 d8[4];
-	} data[2] ____cacheline_aligned;
+	} data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ad5360_type {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 45/92] iio: dac: ad5421: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (43 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 44/92] iio: dac: ad5360: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 46/92] iio: dac: ad5449: " Jonathan Cameron
                   ` (47 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 5691b23489db ("staging:iio:dac: Add AD5421 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5421.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ad5421.c b/drivers/iio/dac/ad5421.c
index eedf661d32b2..7644acfd879e 100644
--- a/drivers/iio/dac/ad5421.c
+++ b/drivers/iio/dac/ad5421.c
@@ -72,13 +72,13 @@ struct ad5421_state {
 	struct mutex			lock;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	union {
 		__be32 d32;
 		u8 d8[4];
-	} data[2] ____cacheline_aligned;
+	} data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct iio_event_spec ad5421_current_event[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 46/92] iio: dac: ad5449: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (44 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 45/92] iio: dac: ad5421: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 47/92] iio: dac: ad5504: " Jonathan Cameron
                   ` (46 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 8341dc04dfb3 ("iio:dac: Add support for the ad5449")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5449.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ad5449.c b/drivers/iio/dac/ad5449.c
index bad9bdaafa94..4572d6f49275 100644
--- a/drivers/iio/dac/ad5449.c
+++ b/drivers/iio/dac/ad5449.c
@@ -68,10 +68,10 @@ struct ad5449 {
 	uint16_t dac_cache[AD5449_MAX_CHANNELS];
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	__be16 data[2] ____cacheline_aligned;
+	__be16 data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ad5449_type {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 47/92] iio: dac: ad5504: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (45 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 46/92] iio: dac: ad5449: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 48/92] iio: dac: ad5592r: " Jonathan Cameron
                   ` (45 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 0dbe59c7a788 ("iio:ad5504: Do not store transfer buffers on the stack")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5504.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ad5504.c b/drivers/iio/dac/ad5504.c
index 8507573aa13e..e472c9564edf 100644
--- a/drivers/iio/dac/ad5504.c
+++ b/drivers/iio/dac/ad5504.c
@@ -54,7 +54,7 @@ struct ad5504_state {
 	unsigned			pwr_down_mask;
 	unsigned			pwr_down_mode;
 
-	__be16				data[2] ____cacheline_aligned;
+	__be16				data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 /*
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 48/92] iio: dac: ad5592r: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (46 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 47/92] iio: dac: ad5504: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 49/92] iio: dac: ad5686: " Jonathan Cameron
                   ` (44 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 56ca9db862bf ("iio: dac: Add support for the AD5592R/AD5593R ADCs/DACs")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Paul Cercueil <paul@crapouillou.net>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5592r-base.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ad5592r-base.h b/drivers/iio/dac/ad5592r-base.h
index 2a22ef691996..cc7be426cbc8 100644
--- a/drivers/iio/dac/ad5592r-base.h
+++ b/drivers/iio/dac/ad5592r-base.h
@@ -14,6 +14,8 @@
 #include <linux/mutex.h>
 #include <linux/gpio/driver.h>
 
+#include <linux/iio/iio.h>
+
 struct device;
 struct ad5592r_state;
 
@@ -65,7 +67,7 @@ struct ad5592r_state {
 	u8 gpio_in;
 	u8 gpio_val;
 
-	__be16 spi_msg ____cacheline_aligned;
+	__be16 spi_msg __aligned(IIO_DMA_MINALIGN);
 	__be16 spi_msg_nop;
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 49/92] iio: dac: ad5686: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (47 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 48/92] iio: dac: ad5592r: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 50/92] iio: dac: ad5755: " Jonathan Cameron
                   ` (43 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 0357e488b825 ("iio:dac:ad5686: Refactor the driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5686.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ad5686.h b/drivers/iio/dac/ad5686.h
index cd5fff9e9d53..b7ade3a6b9b6 100644
--- a/drivers/iio/dac/ad5686.h
+++ b/drivers/iio/dac/ad5686.h
@@ -13,6 +13,8 @@
 #include <linux/mutex.h>
 #include <linux/kernel.h>
 
+#include <linux/iio/iio.h>
+
 #define AD5310_CMD(x)				((x) << 12)
 
 #define AD5683_DATA(x)				((x) << 4)
@@ -137,7 +139,7 @@ struct ad5686_state {
 	struct mutex			lock;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 
@@ -145,7 +147,7 @@ struct ad5686_state {
 		__be32 d32;
 		__be16 d16;
 		u8 d8[4];
-	} data[3] ____cacheline_aligned;
+	} data[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 50/92] iio: dac: ad5755: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (48 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 49/92] iio: dac: ad5686: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 51/92] iio: dac: ad5761: " Jonathan Cameron
                   ` (42 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: c499d029d805 ("iio:dac: Add ad5755 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5755.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ad5755.c b/drivers/iio/dac/ad5755.c
index 7a62e6e1d5f1..bbb345323b69 100644
--- a/drivers/iio/dac/ad5755.c
+++ b/drivers/iio/dac/ad5755.c
@@ -189,14 +189,14 @@ struct ad5755_state {
 	struct mutex			lock;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 
 	union {
 		__be32 d32;
 		u8 d8[4];
-	} data[2] ____cacheline_aligned;
+	} data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ad5755_type {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 51/92] iio: dac: ad5761: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (49 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 50/92] iio: dac: ad5755: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 52/92] iio: dac: ad5764: " Jonathan Cameron
                   ` (41 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 131497acd88a ("iio: add ad5761 DAC driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5761.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ad5761.c b/drivers/iio/dac/ad5761.c
index 4cb8471db81e..6aa1a068adb0 100644
--- a/drivers/iio/dac/ad5761.c
+++ b/drivers/iio/dac/ad5761.c
@@ -70,13 +70,13 @@ struct ad5761_state {
 	enum ad5761_voltage_range range;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	union {
 		__be32 d32;
 		u8 d8[4];
-	} data[3] ____cacheline_aligned;
+	} data[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct ad5761_range_params ad5761_range_params[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 52/92] iio: dac: ad5764: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (50 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 51/92] iio: dac: ad5761: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 53/92] iio: dac: ad5766: " Jonathan Cameron
                   ` (40 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 68b14d7ea956 ("staging:iio:dac: Add AD5764 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5764.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ad5764.c b/drivers/iio/dac/ad5764.c
index d235a8047ba0..26c049d5b73a 100644
--- a/drivers/iio/dac/ad5764.c
+++ b/drivers/iio/dac/ad5764.c
@@ -56,13 +56,13 @@ struct ad5764_state {
 	struct mutex			lock;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
 	union {
 		__be32 d32;
 		u8 d8[4];
-	} data[2] ____cacheline_aligned;
+	} data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ad5764_type {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 53/92] iio: dac: ad5766: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (51 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 52/92] iio: dac: ad5764: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 54/92] iio: dac: ad5770r: " Jonathan Cameron
                   ` (39 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: fd9373e41b9b ("iio: dac: ad5766: add driver support for AD5766")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5766.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ad5766.c b/drivers/iio/dac/ad5766.c
index 43189af2fb1f..899894523752 100644
--- a/drivers/iio/dac/ad5766.c
+++ b/drivers/iio/dac/ad5766.c
@@ -123,7 +123,7 @@ struct ad5766_state {
 		u32	d32;
 		u16	w16[2];
 		u8	b8[4];
-	} data[3] ____cacheline_aligned;
+	} data[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 struct ad5766_span_tbl {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 54/92] iio: dac: ad5770r: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (52 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 53/92] iio: dac: ad5766: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 55/92] iio: dac: ad5791: Fix alignment for DMA saftey Jonathan Cameron
                   ` (38 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: cbbb819837f6 ("iio: dac: ad5770r: Add AD5770R support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Alexandru Tachici <alexandru.tachici@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5770r.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ad5770r.c b/drivers/iio/dac/ad5770r.c
index 7e2fd32e993a..f66d67402e43 100644
--- a/drivers/iio/dac/ad5770r.c
+++ b/drivers/iio/dac/ad5770r.c
@@ -140,7 +140,7 @@ struct ad5770r_state {
 	bool				ch_pwr_down[AD5770R_MAX_CHANNELS];
 	bool				internal_ref;
 	bool				external_res;
-	u8				transf_buf[2] ____cacheline_aligned;
+	u8				transf_buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct regmap_config ad5770r_spi_regmap_config = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 55/92] iio: dac: ad5791: Fix alignment for DMA saftey
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (53 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 54/92] iio: dac: ad5770r: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 56/92] iio: dac: ad7293: Fix alignment for DMA safety Jonathan Cameron
                   ` (37 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 791bb52a0cd2 ("iio:ad5791: Do not store transfer buffers on the stack")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad5791.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ad5791.c b/drivers/iio/dac/ad5791.c
index 2b14914b4050..ee7e89774d9d 100644
--- a/drivers/iio/dac/ad5791.c
+++ b/drivers/iio/dac/ad5791.c
@@ -95,7 +95,7 @@ struct ad5791_state {
 	union {
 		__be32 d32;
 		u8 d8[4];
-	} data[3] ____cacheline_aligned;
+	} data[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum ad5791_supported_device_ids {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 56/92] iio: dac: ad7293: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (54 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 55/92] iio: dac: ad5791: Fix alignment for DMA saftey Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 57/92] iio: dac: ad7303: " Jonathan Cameron
                   ` (36 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 0bb12606c05f ("iio:dac:ad7293: add support for AD7293")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Antoniu Miclaus <antoniu.miclaus@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad7293.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ad7293.c b/drivers/iio/dac/ad7293.c
index 59a38ca4c3c7..06f05750d921 100644
--- a/drivers/iio/dac/ad7293.c
+++ b/drivers/iio/dac/ad7293.c
@@ -144,7 +144,7 @@ struct ad7293_state {
 	struct regulator *reg_avdd;
 	struct regulator *reg_vdrive;
 	u8 page_select;
-	u8 data[3] ____cacheline_aligned;
+	u8 data[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ad7293_page_select(struct ad7293_state *st, unsigned int reg)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 57/92] iio: dac: ad7303: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (55 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 56/92] iio: dac: ad7293: Fix alignment for DMA safety Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 58/92] iio: dac: ad8801: " Jonathan Cameron
                   ` (35 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: f83478240e74 ("iio:dac: Add support for the AD7303")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad7303.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ad7303.c b/drivers/iio/dac/ad7303.c
index 91eaaf793b3e..558af7926a89 100644
--- a/drivers/iio/dac/ad7303.c
+++ b/drivers/iio/dac/ad7303.c
@@ -44,10 +44,10 @@ struct ad7303_state {
 
 	struct mutex lock;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	__be16 data ____cacheline_aligned;
+	__be16 data __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ad7303_write(struct ad7303_state *st, unsigned int chan,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 58/92] iio: dac: ad8801: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (56 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 57/92] iio: dac: ad7303: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 59/92] iio: dac: ltc2688: " Jonathan Cameron
                   ` (34 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 7f270bc9a2d9 ("iio: dac: AD8801: add Analog Devices AD8801/AD8803 support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ad8801.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ad8801.c b/drivers/iio/dac/ad8801.c
index 6be35c92d435..919e8c880697 100644
--- a/drivers/iio/dac/ad8801.c
+++ b/drivers/iio/dac/ad8801.c
@@ -26,7 +26,7 @@ struct ad8801_state {
 	struct regulator *vrefh_reg;
 	struct regulator *vrefl_reg;
 
-	__be16 data ____cacheline_aligned;
+	__be16 data __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ad8801_spi_write(struct ad8801_state *state,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 59/92] iio: dac: ltc2688: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (57 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 58/92] iio: dac: ad8801: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 60/92] iio: dac: mcp4922: " Jonathan Cameron
                   ` (33 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 832cb9eeb931 ("iio: dac: add support for ltc2688")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ltc2688.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ltc2688.c b/drivers/iio/dac/ltc2688.c
index 2f9c384885f4..04ec38b1cad1 100644
--- a/drivers/iio/dac/ltc2688.c
+++ b/drivers/iio/dac/ltc2688.c
@@ -91,10 +91,10 @@ struct ltc2688_state {
 	struct mutex lock;
 	int vref;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	u8 tx_data[6] ____cacheline_aligned;
+	u8 tx_data[6] __aligned(IIO_DMA_MINALIGN);
 	u8 rx_data[3];
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 60/92] iio: dac: mcp4922: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (58 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 59/92] iio: dac: ltc2688: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 22:31   ` Michael Welling
  2022-05-08 17:56 ` [PATCH v2 61/92] iio: dac: ti-dac082s085: " Jonathan Cameron
                   ` (32 subsequent siblings)
  92 siblings, 1 reply; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 1b791fadf3a1 ("iio: dac: mcp4902/mcp4912/mcp4922 dac driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Michael Welling <mwelling@ieee.org>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/mcp4922.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/mcp4922.c b/drivers/iio/dac/mcp4922.c
index cb9e60e71b91..6c0e31032c57 100644
--- a/drivers/iio/dac/mcp4922.c
+++ b/drivers/iio/dac/mcp4922.c
@@ -29,7 +29,7 @@ struct mcp4922_state {
 	unsigned int value[MCP4922_NUM_CHANNELS];
 	unsigned int vref_mv;
 	struct regulator *vref_reg;
-	u8 mosi[2] ____cacheline_aligned;
+	u8 mosi[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 #define MCP4922_CHAN(chan, bits) {			\
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 61/92] iio: dac: ti-dac082s085: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (59 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 60/92] iio: dac: mcp4922: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 62/92] iio: dac: ti-dac5571: " Jonathan Cameron
                   ` (31 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 61011264c1af ("iio: dac: Add Texas Instruments 8/10/12-bit 2/4-channel DAC driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ti-dac082s085.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ti-dac082s085.c b/drivers/iio/dac/ti-dac082s085.c
index 4e1156e6deb2..f52ad8fa7747 100644
--- a/drivers/iio/dac/ti-dac082s085.c
+++ b/drivers/iio/dac/ti-dac082s085.c
@@ -55,7 +55,7 @@ struct ti_dac_chip {
 	bool powerdown;
 	u8 powerdown_mode;
 	u8 resolution;
-	u8 buf[2] ____cacheline_aligned;
+	u8 buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 #define WRITE_NOT_UPDATE(chan)	(0x00 | (chan) << 6)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 62/92] iio: dac: ti-dac5571: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (60 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 61/92] iio: dac: ti-dac082s085: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 63/92] iio: dac: ti-dac7311: " Jonathan Cameron
                   ` (30 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: df38a4a72a3b ("iio: dac: add TI DAC5571 family support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ti-dac5571.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ti-dac5571.c b/drivers/iio/dac/ti-dac5571.c
index 0b775f943db3..ba68ea1e3455 100644
--- a/drivers/iio/dac/ti-dac5571.c
+++ b/drivers/iio/dac/ti-dac5571.c
@@ -52,7 +52,7 @@ struct dac5571_data {
 	struct dac5571_spec const *spec;
 	int (*dac5571_cmd)(struct dac5571_data *data, int channel, u16 val);
 	int (*dac5571_pwrdwn)(struct dac5571_data *data, int channel, u8 pwrdwn);
-	u8 buf[3] ____cacheline_aligned;
+	u8 buf[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 #define DAC5571_POWERDOWN(mode)		((mode) + 1)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 63/92] iio: dac: ti-dac7311: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (61 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 62/92] iio: dac: ti-dac5571: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 64/92] iio: dac: ti-dac7612: " Jonathan Cameron
                   ` (29 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 7a02ef7907d8 ("iio:dac:ti-dac7311 Add driver for Texas Instrument DAC7311")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Charles-Antoine Couret <charles-antoine.couret@essensium.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ti-dac7311.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/dac/ti-dac7311.c b/drivers/iio/dac/ti-dac7311.c
index e10d17e60ed3..dd0a7b77838d 100644
--- a/drivers/iio/dac/ti-dac7311.c
+++ b/drivers/iio/dac/ti-dac7311.c
@@ -52,7 +52,7 @@ struct ti_dac_chip {
 	bool powerdown;
 	u8 powerdown_mode;
 	u8 resolution;
-	u8 buf[2] ____cacheline_aligned;
+	u8 buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static u8 ti_dac_get_power(struct ti_dac_chip *ti_dac, bool powerdown)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 64/92] iio: dac: ti-dac7612: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (62 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 63/92] iio: dac: ti-dac7311: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 65/92] iio: frequency: ad9523: " Jonathan Cameron
                   ` (28 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Updated help text to 'may' require buffers to be in their own cacheline.

Fixes: 977724d20584 ("iio:dac:ti-dac7612: Add driver for Texas Instruments DAC7612")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Ricardo Ribalda <ribalda@kernel.org>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/dac/ti-dac7612.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/dac/ti-dac7612.c b/drivers/iio/dac/ti-dac7612.c
index 4c0f4b5e9ff4..8195815de26f 100644
--- a/drivers/iio/dac/ti-dac7612.c
+++ b/drivers/iio/dac/ti-dac7612.c
@@ -31,10 +31,10 @@ struct dac7612 {
 	struct mutex lock;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	uint8_t data[2] ____cacheline_aligned;
+	uint8_t data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int dac7612_cmd_single(struct dac7612 *priv, int channel, u16 val)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 65/92] iio: frequency: ad9523: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (63 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 64/92] iio: dac: ti-dac7612: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 66/92] iio: frequency: adf4350: " Jonathan Cameron
                   ` (27 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Updated help text to 'may' require buffers to be in their own cacheline.

Fixes: cd1678f96329 ("iio: frequency: New driver for AD9523 SPI Low Jitter Clock Generator")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/frequency/ad9523.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/frequency/ad9523.c b/drivers/iio/frequency/ad9523.c
index a0f92c336fc4..31c97f9f2c1b 100644
--- a/drivers/iio/frequency/ad9523.c
+++ b/drivers/iio/frequency/ad9523.c
@@ -287,13 +287,13 @@ struct ad9523_state {
 	struct mutex		lock;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
-	 * transfer buffers to live in their own cache lines.
+	 * DMA (thus cache coherency maintenance) may require that
+	 * transfer buffers live in their own cache lines.
 	 */
 	union {
 		__be32 d32;
 		u8 d8[4];
-	} data[2] ____cacheline_aligned;
+	} data[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ad9523_read(struct iio_dev *indio_dev, unsigned int addr)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 66/92] iio: frequency: adf4350: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (64 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 65/92] iio: frequency: ad9523: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 67/92] iio: frequency: adf4371: " Jonathan Cameron
                   ` (26 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Updated help text to 'may' require buffers to be in their own cacheline.

Fixes: e31166f0fd48 ("iio: frequency: New driver for Analog Devices ADF4350/ADF4351 Wideband Synthesizers")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/frequency/adf4350.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/frequency/adf4350.c b/drivers/iio/frequency/adf4350.c
index be1218d86291..85e289700c3c 100644
--- a/drivers/iio/frequency/adf4350.c
+++ b/drivers/iio/frequency/adf4350.c
@@ -56,10 +56,10 @@ struct adf4350_state {
 	 */
 	struct mutex			lock;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
-	 * transfer buffers to live in their own cache lines.
+	 * DMA (thus cache coherency maintenance) may require that
+	 * transfer buffers live in their own cache lines.
 	 */
-	__be32				val ____cacheline_aligned;
+	__be32				val __aligned(IIO_DMA_MINALIGN);
 };
 
 static struct adf4350_platform_data default_pdata = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 67/92] iio: frequency: adf4371: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (65 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 66/92] iio: frequency: adf4350: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 68/92] iio: frequency: admv1013: " Jonathan Cameron
                   ` (25 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 7f699bd14913 ("iio: frequency: adf4371: Add support for ADF4371 PLL")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/frequency/adf4371.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/frequency/adf4371.c b/drivers/iio/frequency/adf4371.c
index ecd5e18995ad..135c8cedc33d 100644
--- a/drivers/iio/frequency/adf4371.c
+++ b/drivers/iio/frequency/adf4371.c
@@ -175,7 +175,7 @@ struct adf4371_state {
 	unsigned int mod2;
 	unsigned int rf_div_sel;
 	unsigned int ref_div_factor;
-	u8 buf[10] ____cacheline_aligned;
+	u8 buf[10] __aligned(IIO_DMA_MINALIGN);
 };
 
 static unsigned long long adf4371_pll_fract_n_get_rate(struct adf4371_state *st,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 68/92] iio: frequency: admv1013: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (66 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 67/92] iio: frequency: adf4371: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 69/92] iio: frequency: admv1014: " Jonathan Cameron
                   ` (24 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: da35a7b526d9 ("iio: frequency: admv1013: add support for ADMV1013")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Antoniu Miclaus <antoniu.miclaus@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/frequency/admv1013.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/frequency/admv1013.c b/drivers/iio/frequency/admv1013.c
index b0e1f6571afb..ed8167271358 100644
--- a/drivers/iio/frequency/admv1013.c
+++ b/drivers/iio/frequency/admv1013.c
@@ -100,7 +100,7 @@ struct admv1013_state {
 	unsigned int		input_mode;
 	unsigned int		quad_se_mode;
 	bool			det_en;
-	u8			data[3] ____cacheline_aligned;
+	u8			data[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int __admv1013_spi_read(struct admv1013_state *st, unsigned int reg,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 69/92] iio: frequency: admv1014: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (67 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 68/92] iio: frequency: admv1013: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 70/92] iio: frequency: admv4420: " Jonathan Cameron
                   ` (23 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: f4eb9ac7842f ("iio: frequency: admv1014: add support for ADMV1014")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Antoniu Miclaus <antoniu.miclaus@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/frequency/admv1014.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/frequency/admv1014.c b/drivers/iio/frequency/admv1014.c
index a7994f8e6b9b..d1ccaa7ed5fe 100644
--- a/drivers/iio/frequency/admv1014.c
+++ b/drivers/iio/frequency/admv1014.c
@@ -127,7 +127,7 @@ struct admv1014_state {
 	unsigned int			quad_se_mode;
 	unsigned int			p1db_comp;
 	bool				det_en;
-	u8				data[3] ____cacheline_aligned;
+	u8				data[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const int mixer_vgate_table[] = {106, 107, 108, 110, 111, 112, 113, 114,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 70/92] iio: frequency: admv4420: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (68 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 69/92] iio: frequency: admv1014: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 71/92] iio: frequency: adrf6780: " Jonathan Cameron
                   ` (22 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: b59c04155901 ("iio: frequency: admv4420.c: Add support for ADMV4420")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/frequency/admv4420.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/frequency/admv4420.c b/drivers/iio/frequency/admv4420.c
index 51134aee8510..863ba8e98c95 100644
--- a/drivers/iio/frequency/admv4420.c
+++ b/drivers/iio/frequency/admv4420.c
@@ -113,7 +113,7 @@ struct admv4420_state {
 	struct admv4420_n_counter	n_counter;
 	enum admv4420_mux_sel		mux_sel;
 	struct mutex			lock;
-	u8				transf_buf[4] ____cacheline_aligned;
+	u8				transf_buf[4] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct regmap_config admv4420_regmap_config = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 71/92] iio: frequency: adrf6780: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (69 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 70/92] iio: frequency: admv4420: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 72/92] iio: gyro: adis16080: " Jonathan Cameron
                   ` (21 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 63aaf6d06d87 ("iio: frequency: adrf6780: add support for ADRF6780")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Antoniu Miclaus <antoniu.miclaus@analog.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/frequency/adrf6780.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/frequency/adrf6780.c b/drivers/iio/frequency/adrf6780.c
index 8255ffd174f6..21878bad0909 100644
--- a/drivers/iio/frequency/adrf6780.c
+++ b/drivers/iio/frequency/adrf6780.c
@@ -86,7 +86,7 @@ struct adrf6780_state {
 	bool			uc_bias_en;
 	bool			lo_sideband;
 	bool			vdet_out_en;
-	u8			data[3] ____cacheline_aligned;
+	u8			data[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int __adrf6780_spi_read(struct adrf6780_state *st, unsigned int reg,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 72/92] iio: gyro: adis16080: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (70 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 71/92] iio: frequency: adrf6780: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 73/92] iio: gyro: adis16130: " Jonathan Cameron
                   ` (20 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes tag is inaccurate but unlikely anyone will backport this
beyond that point so I haven't chased the history futher than 2013.

Fixes: 3c80372dae17 ("staging:iio:adis16080: be16 cleanups")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/gyro/adis16080.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/gyro/adis16080.c b/drivers/iio/gyro/adis16080.c
index acef59d822b1..14b3abf6dce9 100644
--- a/drivers/iio/gyro/adis16080.c
+++ b/drivers/iio/gyro/adis16080.c
@@ -45,7 +45,7 @@ struct adis16080_state {
 	const struct adis16080_chip_info *info;
 	struct mutex			lock;
 
-	__be16 buf ____cacheline_aligned;
+	__be16 buf __aligned(IIO_DMA_MINALIGN);
 };
 
 static int adis16080_read_sample(struct iio_dev *indio_dev,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 73/92] iio: gyro: adis16130: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (71 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 72/92] iio: gyro: adis16080: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 74/92] iio: gyro: adxrs450: " Jonathan Cameron
                   ` (19 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 8e67875141b2 ("staging:iio:gyro: adis16130 cleanup, move to abi and bug fixes.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/gyro/adis16130.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/gyro/adis16130.c b/drivers/iio/gyro/adis16130.c
index b9c952e65b55..33cde9e6fca5 100644
--- a/drivers/iio/gyro/adis16130.c
+++ b/drivers/iio/gyro/adis16130.c
@@ -41,7 +41,7 @@
 struct adis16130_state {
 	struct spi_device		*us;
 	struct mutex			buf_lock;
-	u8				buf[4] ____cacheline_aligned;
+	u8				buf[4] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int adis16130_spi_read(struct iio_dev *indio_dev, u8 reg_addr, u32 *val)
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 74/92] iio: gyro: adxrs450: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (72 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 73/92] iio: gyro: adis16130: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 75/92] iio: gyro: fxas210002c: " Jonathan Cameron
                   ` (18 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes tag is inaccurate but unlikely anyone will be interested in
backporting beyond that point.

Fixes: 53ac8500ba9b ("staging:iio:adxrs450: Move header file contents to main file")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/gyro/adxrs450.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/gyro/adxrs450.c b/drivers/iio/gyro/adxrs450.c
index 04f350025215..f84438e0c42c 100644
--- a/drivers/iio/gyro/adxrs450.c
+++ b/drivers/iio/gyro/adxrs450.c
@@ -73,7 +73,7 @@ enum {
 struct adxrs450_state {
 	struct spi_device	*us;
 	struct mutex		buf_lock;
-	__be32			tx ____cacheline_aligned;
+	__be32			tx __aligned(IIO_DMA_MINALIGN);
 	__be32			rx;
 
 };
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 75/92] iio: gyro: fxas210002c: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (73 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 74/92] iio: gyro: adxrs450: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 76/92] iio: imu: fxos8700: " Jonathan Cameron
                   ` (17 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Updated the comment to 'may' require.

Fixes: a0701b6263ae ("iio: gyro: add core driver for fxas21002c")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Rui Miguel Silva <rui.silva@linaro.org>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/gyro/fxas21002c_core.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/iio/gyro/fxas21002c_core.c b/drivers/iio/gyro/fxas21002c_core.c
index 410e5e9f2672..7a459a823f6e 100644
--- a/drivers/iio/gyro/fxas21002c_core.c
+++ b/drivers/iio/gyro/fxas21002c_core.c
@@ -150,10 +150,10 @@ struct fxas21002c_data {
 	struct regulator *vddio;
 
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
-	 * transfer buffers to live in their own cache lines.
+	 * DMA (thus cache coherency maintenance) may require the
+	 * transfer buffers live in their own cache lines.
 	 */
-	s16 buffer[8] ____cacheline_aligned;
+	s16 buffer[8] __aligned(IIO_DMA_MINALIGN);
 };
 
 enum fxas21002c_channel_index {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 76/92] iio: imu: fxos8700: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (74 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 75/92] iio: gyro: fxas210002c: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 77/92] iio: imu: inv_icm42600: " Jonathan Cameron
                   ` (16 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 84e5ddd5c46e ("iio: imu: Add support for the FXOS8700 IMU")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Robert Jones <rjones@gateworks.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/imu/fxos8700_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c
index ab288186f36e..423cfe526f2a 100644
--- a/drivers/iio/imu/fxos8700_core.c
+++ b/drivers/iio/imu/fxos8700_core.c
@@ -167,7 +167,7 @@
 struct fxos8700_data {
 	struct regmap *regmap;
 	struct iio_trigger *trig;
-	__be16 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned;
+	__be16 buf[FXOS8700_DATA_BUF_SIZE] __aligned(IIO_DMA_MINALIGN);
 };
 
 /* Regmap info */
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 77/92] iio: imu: inv_icm42600: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (75 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 76/92] iio: imu: fxos8700: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 78/92] iio: imu: inv_icm42600: Fix alignment for DMA safety in buffer code Jonathan Cameron
                   ` (15 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron,
	Jean-Baptiste Maneyrol

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Partial fix for this driver as a second instance was introduced in
a later patch.

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: a095fadb443b ("iio: imu: inv_icm42600: add gyroscope IIO device")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/imu/inv_icm42600/inv_icm42600.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600.h b/drivers/iio/imu/inv_icm42600/inv_icm42600.h
index c0f5059b13b3..62fedac54e65 100644
--- a/drivers/iio/imu/inv_icm42600/inv_icm42600.h
+++ b/drivers/iio/imu/inv_icm42600/inv_icm42600.h
@@ -140,7 +140,7 @@ struct inv_icm42600_state {
 	struct inv_icm42600_suspended suspended;
 	struct iio_dev *indio_gyro;
 	struct iio_dev *indio_accel;
-	uint8_t buffer[2] ____cacheline_aligned;
+	uint8_t buffer[2] __aligned(IIO_DMA_MINALIGN);
 	struct inv_icm42600_fifo fifo;
 	struct {
 		int64_t gyro;
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 78/92] iio: imu: inv_icm42600: Fix alignment for DMA safety in buffer code.
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (76 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 77/92] iio: imu: inv_icm42600: " Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:56 ` [PATCH v2 79/92] iio: imu: mpu6050: Fix alignment for DMA safety Jonathan Cameron
                   ` (14 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron,
	Jean-Baptiste Maneyrol

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Second fix for this driver due to different introducing patches.

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 7f85e42a6c54 ("iio: imu: inv_icm42600: add buffer support in iio devices")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.h b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.h
index de2a3949dcc7..8b85ee333bf8 100644
--- a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.h
+++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.h
@@ -39,7 +39,7 @@ struct inv_icm42600_fifo {
 		size_t accel;
 		size_t total;
 	} nb;
-	uint8_t data[2080] ____cacheline_aligned;
+	uint8_t data[2080] __aligned(IIO_DMA_MINALIGN);
 };
 
 /* FIFO data packet */
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 79/92] iio: imu: mpu6050: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (77 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 78/92] iio: imu: inv_icm42600: Fix alignment for DMA safety in buffer code Jonathan Cameron
@ 2022-05-08 17:56 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 80/92] iio: potentiometer: ad5110: " Jonathan Cameron
                   ` (13 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron,
	Jean-Baptiste Maneyrol

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 6b0cc5dce072 ("iio:imu:inv_mpu6050 Fix dma and ts alignment and data leak issues.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
index c6aa36ee966a..32b58b797d57 100644
--- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
+++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
@@ -203,7 +203,7 @@ struct inv_mpu6050_state {
 	s32 magn_raw_to_gauss[3];
 	struct iio_mount_matrix magn_orient;
 	unsigned int suspended_sensors;
-	u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] ____cacheline_aligned;
+	u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] __aligned(IIO_DMA_MINALIGN);
 };
 
 /*register and associated bit definition*/
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 80/92] iio: potentiometer: ad5110: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (78 preceding siblings ...)
  2022-05-08 17:56 ` [PATCH v2 79/92] iio: imu: mpu6050: Fix alignment for DMA safety Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 81/92] iio: potentiometer: ad5272: " Jonathan Cameron
                   ` (12 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: d03a74bfacce ("iio: potentiometer: Add driver support for AD5110")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Mugilraj Dhavachelvan <dmugil2000@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/potentiometer/ad5110.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/potentiometer/ad5110.c b/drivers/iio/potentiometer/ad5110.c
index d4eeedae56e5..8fbcce482989 100644
--- a/drivers/iio/potentiometer/ad5110.c
+++ b/drivers/iio/potentiometer/ad5110.c
@@ -63,10 +63,10 @@ struct ad5110_data {
 	struct mutex            lock;
 	const struct ad5110_cfg	*cfg;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 */
-	u8			buf[2] ____cacheline_aligned;
+	u8			buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct iio_chan_spec ad5110_channels[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 81/92] iio: potentiometer: ad5272: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (79 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 80/92] iio: potentiometer: ad5110: " Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 82/92] iio: potentiometer: max5481: " Jonathan Cameron
                   ` (11 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 79e8a32d2aa9 ("iio: ad5272: Add support for Analog Devices digital potentiometers")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Phil Reid <preid@electromag.com.au>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/potentiometer/ad5272.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/potentiometer/ad5272.c b/drivers/iio/potentiometer/ad5272.c
index d8cbd170262f..ed5fc0b50fe9 100644
--- a/drivers/iio/potentiometer/ad5272.c
+++ b/drivers/iio/potentiometer/ad5272.c
@@ -50,7 +50,7 @@ struct ad5272_data {
 	struct i2c_client       *client;
 	struct mutex            lock;
 	const struct ad5272_cfg *cfg;
-	u8                      buf[2] ____cacheline_aligned;
+	u8                      buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct iio_chan_spec ad5272_channel = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 82/92] iio: potentiometer: max5481: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (80 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 81/92] iio: potentiometer: ad5272: " Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 83/92] iio: potentiometer: mcp41010: " Jonathan Cameron
                   ` (10 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: df1fd2de118e ("iio: max5481: Add support for Maxim digital potentiometers")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/potentiometer/max5481.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/potentiometer/max5481.c b/drivers/iio/potentiometer/max5481.c
index 098d144a8fdd..b40e5ac218d7 100644
--- a/drivers/iio/potentiometer/max5481.c
+++ b/drivers/iio/potentiometer/max5481.c
@@ -44,7 +44,7 @@ static const struct max5481_cfg max5481_cfg[] = {
 struct max5481_data {
 	struct spi_device *spi;
 	const struct max5481_cfg *cfg;
-	u8 msg[3] ____cacheline_aligned;
+	u8 msg[3] __aligned(IIO_DMA_MINALIGN);
 };
 
 #define MAX5481_CHANNEL {					\
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 83/92] iio: potentiometer: mcp41010: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (81 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 82/92] iio: potentiometer: max5481: " Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 84/92] iio: potentiometer: mcp4131: " Jonathan Cameron
                   ` (9 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 092cb71a604e ("iio: potentiometer: Add driver for Microchip MCP41xxx/42xxx")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/potentiometer/mcp41010.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/potentiometer/mcp41010.c b/drivers/iio/potentiometer/mcp41010.c
index 30a4594d4e11..2b73c7540209 100644
--- a/drivers/iio/potentiometer/mcp41010.c
+++ b/drivers/iio/potentiometer/mcp41010.c
@@ -60,7 +60,7 @@ struct mcp41010_data {
 	const struct mcp41010_cfg *cfg;
 	struct mutex lock; /* Protect write sequences */
 	unsigned int value[MCP41010_MAX_WIPERS]; /* Cache wiper values */
-	u8 buf[2] ____cacheline_aligned;
+	u8 buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 #define MCP41010_CHANNEL(ch) {					\
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 84/92] iio: potentiometer: mcp4131: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (82 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 83/92] iio: potentiometer: mcp41010: " Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 85/92] iio: pressure: dlhl60d: Drop unnecessary alignment forcing Jonathan Cameron
                   ` (8 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 22d199a53910 ("iio: potentiometer: add driver for Microchip MCP413X/414X/415X/416X/423X/424X/425X/426X")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/potentiometer/mcp4131.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/potentiometer/mcp4131.c b/drivers/iio/potentiometer/mcp4131.c
index 7c8c18ab8764..7890c0993ec4 100644
--- a/drivers/iio/potentiometer/mcp4131.c
+++ b/drivers/iio/potentiometer/mcp4131.c
@@ -129,7 +129,7 @@ struct mcp4131_data {
 	struct spi_device *spi;
 	const struct mcp4131_cfg *cfg;
 	struct mutex lock;
-	u8 buf[2] ____cacheline_aligned;
+	u8 buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 #define MCP4131_CHANNEL(ch) {					\
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 85/92] iio: pressure: dlhl60d: Drop unnecessary alignment forcing.
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (83 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 84/92] iio: potentiometer: mcp4131: " Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 86/92] iio: proximity: as3935: Fix alignment for DMA safety Jonathan Cameron
                   ` (7 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

I2C doesn't use the buffers directly for DMA so there is no need
to enforce alignment.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Tomislav Denis <tomislav.denis@avl.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/pressure/dlhl60d.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/pressure/dlhl60d.c b/drivers/iio/pressure/dlhl60d.c
index ade73267d5eb..5f6bb3603a8b 100644
--- a/drivers/iio/pressure/dlhl60d.c
+++ b/drivers/iio/pressure/dlhl60d.c
@@ -47,7 +47,7 @@ struct dlh_state {
 	struct dlh_info info;
 	bool use_interrupt;
 	struct completion completion;
-	u8 rx_buf[DLH_NUM_READ_BYTES] ____cacheline_aligned;
+	u8 rx_buf[DLH_NUM_READ_BYTES];
 };
 
 static struct dlh_info dlh_info_tbl[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 86/92] iio: proximity: as3935: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (84 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 85/92] iio: pressure: dlhl60d: Drop unnecessary alignment forcing Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 87/92] iio: proximity: vcnl3020: Drop unnecessary alignment requirement for i2c device Jonathan Cameron
                   ` (6 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 24ddb0e4bba4 ("iio: Add AS3935 lightning sensor support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Matt Ranostay <mranostay@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/proximity/as3935.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/proximity/as3935.c b/drivers/iio/proximity/as3935.c
index 67891ce2bd09..ebc95cf8f5f4 100644
--- a/drivers/iio/proximity/as3935.c
+++ b/drivers/iio/proximity/as3935.c
@@ -65,7 +65,7 @@ struct as3935_state {
 		u8 chan;
 		s64 timestamp __aligned(8);
 	} scan;
-	u8 buf[2] ____cacheline_aligned;
+	u8 buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct iio_chan_spec as3935_channels[] = {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 87/92] iio: proximity: vcnl3020: Drop unnecessary alignment requirement for i2c device
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (85 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 86/92] iio: proximity: as3935: Fix alignment for DMA safety Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 88/92] iio: resolver: ad2s1200: Fix alignment for DMA safety Jonathan Cameron
                   ` (5 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

I2C does not by default use buffers directly for DMA so there is
no need to ensure they are DMA safe.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Ivan Mikhaylov <i.mikhaylov@yadro.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/proximity/vcnl3020.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/proximity/vcnl3020.c b/drivers/iio/proximity/vcnl3020.c
index ff83638db16f..cbc8400c773c 100644
--- a/drivers/iio/proximity/vcnl3020.c
+++ b/drivers/iio/proximity/vcnl3020.c
@@ -71,14 +71,14 @@ static const int vcnl3020_prox_sampling_frequency[][2] = {
  * @dev:	vcnl3020 device.
  * @rev:	revision id.
  * @lock:	lock for protecting access to device hardware registers.
- * @buf:	DMA safe __be16 buffer.
+ * @buf:	__be16 buffer.
  */
 struct vcnl3020_data {
 	struct regmap *regmap;
 	struct device *dev;
 	u8 rev;
 	struct mutex lock;
-	__be16 buf ____cacheline_aligned;
+	__be16 buf;
 };
 
 /**
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 88/92] iio: resolver: ad2s1200: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (86 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 87/92] iio: proximity: vcnl3020: Drop unnecessary alignment requirement for i2c device Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 89/92] iio: resolver: ad2s90: " Jonathan Cameron
                   ` (4 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes tag is probably not where the issue was first introduced, but
is likely to be as far as anyone considers backporting this fix.

Fixes: 0bd3d338f61b ("staging: iio: ad2s1200: Improve readability with be16_to_cpup")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/resolver/ad2s1200.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/resolver/ad2s1200.c b/drivers/iio/resolver/ad2s1200.c
index 9746bd935628..9d95241bdf8f 100644
--- a/drivers/iio/resolver/ad2s1200.c
+++ b/drivers/iio/resolver/ad2s1200.c
@@ -41,7 +41,7 @@ struct ad2s1200_state {
 	struct spi_device *sdev;
 	struct gpio_desc *sample;
 	struct gpio_desc *rdvel;
-	__be16 rx ____cacheline_aligned;
+	__be16 rx __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ad2s1200_read_raw(struct iio_dev *indio_dev,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 89/92] iio: resolver: ad2s90: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (87 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 88/92] iio: resolver: ad2s1200: Fix alignment for DMA safety Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 90/92] iio: temp: ltc2983: " Jonathan Cameron
                   ` (3 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes tag is probably not where the issue was first introduced, but
is likely to be far beyond the point where anyone considers
backporting this fix.

Fixes: 58f08b0af857 ("staging:iio:resolver:ad2s90 general cleanup")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/resolver/ad2s90.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/resolver/ad2s90.c b/drivers/iio/resolver/ad2s90.c
index d6a91f137e13..be6836e55376 100644
--- a/drivers/iio/resolver/ad2s90.c
+++ b/drivers/iio/resolver/ad2s90.c
@@ -24,7 +24,7 @@
 struct ad2s90_state {
 	struct mutex lock; /* lock to protect rx buffer */
 	struct spi_device *sdev;
-	u8 rx[2] ____cacheline_aligned;
+	u8 rx[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int ad2s90_read_raw(struct iio_dev *indio_dev,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 90/92] iio: temp: ltc2983: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (88 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 89/92] iio: resolver: ad2s90: " Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 91/92] iio: temp: max31865: " Jonathan Cameron
                   ` (2 subsequent siblings)
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: f110f3188e56 ("iio: temperature: Add support for LTC2983")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/temperature/ltc2983.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/iio/temperature/ltc2983.c b/drivers/iio/temperature/ltc2983.c
index 301c3f13fb26..1b8252d86889 100644
--- a/drivers/iio/temperature/ltc2983.c
+++ b/drivers/iio/temperature/ltc2983.c
@@ -200,11 +200,11 @@ struct ltc2983_data {
 	u8 num_channels;
 	u8 iio_channels;
 	/*
-	 * DMA (thus cache coherency maintenance) requires the
+	 * DMA (thus cache coherency maintenance) may require the
 	 * transfer buffers to live in their own cache lines.
 	 * Holds the converted temperature
 	 */
-	__be32 temp ____cacheline_aligned;
+	__be32 temp __aligned(IIO_DMA_MINALIGN);
 };
 
 struct ltc2983_sensor {
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 91/92] iio: temp: max31865: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (89 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 90/92] iio: temp: ltc2983: " Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-05-08 17:57 ` [PATCH v2 92/92] iio: temp: maxim_thermocouple: " Jonathan Cameron
  2022-06-04 16:53 ` [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition

Fixes: e112dc4e18ea ("iio: temperature: Add MAX31865 RTD Support")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Navin Sankar Velliangiri <navin@linumiz.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/temperature/max31865.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/temperature/max31865.c b/drivers/iio/temperature/max31865.c
index 86c3f3509a26..f0079e51d8d2 100644
--- a/drivers/iio/temperature/max31865.c
+++ b/drivers/iio/temperature/max31865.c
@@ -53,7 +53,7 @@ struct max31865_data {
 	struct mutex lock;
 	bool filter_50hz;
 	bool three_wire;
-	u8 buf[2] ____cacheline_aligned;
+	u8 buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static int max31865_read(struct max31865_data *data, u8 reg,
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* [PATCH v2 92/92] iio: temp: maxim_thermocouple: Fix alignment for DMA safety
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (90 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 91/92] iio: temp: max31865: " Jonathan Cameron
@ 2022-05-08 17:57 ` Jonathan Cameron
  2022-06-04 16:53 ` [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-05-08 17:57 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition

Fixes: 1f25ca11d84a ("iio: temperature: add support for Maxim thermocouple chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Matt Ranostay <mranostay@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
---
 drivers/iio/temperature/maxim_thermocouple.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iio/temperature/maxim_thermocouple.c b/drivers/iio/temperature/maxim_thermocouple.c
index 98c41cddc6f0..c28a7a6dea5f 100644
--- a/drivers/iio/temperature/maxim_thermocouple.c
+++ b/drivers/iio/temperature/maxim_thermocouple.c
@@ -122,7 +122,7 @@ struct maxim_thermocouple_data {
 	struct spi_device *spi;
 	const struct maxim_thermocouple_chip *chip;
 
-	u8 buffer[16] ____cacheline_aligned;
+	u8 buffer[16] __aligned(IIO_DMA_MINALIGN);
 	char tc_type;
 };
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 97+ messages in thread

* Re: [PATCH v2 60/92] iio: dac: mcp4922: Fix alignment for DMA safety
  2022-05-08 17:56 ` [PATCH v2 60/92] iio: dac: mcp4922: " Jonathan Cameron
@ 2022-05-08 22:31   ` Michael Welling
  0 siblings, 0 replies; 97+ messages in thread
From: Michael Welling @ 2022-05-08 22:31 UTC (permalink / raw)
  To: Jonathan Cameron
  Cc: linux-iio, Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

On Sun, May 8, 2022 at 10:56 AM Jonathan Cameron <jic23@kernel.org> wrote:
>
> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
> on platforms with 128 byte cachelines above L1.  Switch to the updated
> IIO_DMA_MINALIGN definition.
>
> Fixes: 1b791fadf3a1 ("iio: dac: mcp4902/mcp4912/mcp4922 dac driver")
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Cc: Michael Welling <mwelling@ieee.org>
> Acked-by: Nuno Sá <nuno.sa@analog.com>
> ---
>  drivers/iio/dac/mcp4922.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/iio/dac/mcp4922.c b/drivers/iio/dac/mcp4922.c
> index cb9e60e71b91..6c0e31032c57 100644
> --- a/drivers/iio/dac/mcp4922.c
> +++ b/drivers/iio/dac/mcp4922.c
> @@ -29,7 +29,7 @@ struct mcp4922_state {
>         unsigned int value[MCP4922_NUM_CHANNELS];
>         unsigned int vref_mv;
>         struct regulator *vref_reg;
> -       u8 mosi[2] ____cacheline_aligned;
> +       u8 mosi[2] __aligned(IIO_DMA_MINALIGN);

Acked-by: Michael Welling <mwelling@ieee.org>

>  };
>
>  #define MCP4922_CHAN(chan, bits) {                     \
> --
> 2.36.0
>

^ permalink raw reply	[flat|nested] 97+ messages in thread

* Re: [PATCH v2 29/92] iio: adc: ti-adc084s021: Fix alignment for DMA safety
  2022-05-08 17:56 ` [PATCH v2 29/92] iio: adc: ti-adc084s021: " Jonathan Cameron
@ 2022-05-09  8:34   ` Marten Lindahl
  0 siblings, 0 replies; 97+ messages in thread
From: Marten Lindahl @ 2022-05-09  8:34 UTC (permalink / raw)
  To: Jonathan Cameron
  Cc: linux-iio, Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

On Sun, May 08, 2022 at 07:56:09PM +0200, Jonathan Cameron wrote:
> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
> ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
> on platforms with 128 byte cachelines above L1.  Switch to the updated
> IIO_DMA_MINALIGN definition.
> 
> Update the comment to include 'may'.
> 
> Fixes: 3691e5a69449 ("iio: adc: add driver for the ti-adc084s021 chip")
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Cc: Mårten Lindahl <martenli@axis.com>
> Acked-by: Nuno Sá <nuno.sa@analog.com>

Acked-by: Mårten Lindahl <marten.lindahl@axis.com>

> ---
>  drivers/iio/adc/ti-adc084s021.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iio/adc/ti-adc084s021.c b/drivers/iio/adc/ti-adc084s021.c
> index c9b5d9aec3dc..1f6e53832e06 100644
> --- a/drivers/iio/adc/ti-adc084s021.c
> +++ b/drivers/iio/adc/ti-adc084s021.c
> @@ -32,10 +32,10 @@ struct adc084s021 {
>  		s64 ts __aligned(8);
>  	} scan;
>  	/*
> -	 * DMA (thus cache coherency maintenance) requires the
> +	 * DMA (thus cache coherency maintenance) may require the
>  	 * transfer buffers to live in their own cache line.
>  	 */
> -	u16 tx_buf[4] ____cacheline_aligned;
> +	u16 tx_buf[4] __aligned(IIO_DMA_MINALIGN);
>  	__be16 rx_buf[5]; /* First 16-bits are trash */
>  };
>  
> -- 
> 2.36.0
> 

^ permalink raw reply	[flat|nested] 97+ messages in thread

* Re: [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA
  2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
                   ` (91 preceding siblings ...)
  2022-05-08 17:57 ` [PATCH v2 92/92] iio: temp: maxim_thermocouple: " Jonathan Cameron
@ 2022-06-04 16:53 ` Jonathan Cameron
  92 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-06-04 16:53 UTC (permalink / raw)
  To: linux-iio, Alexandru Tachici
  Cc: Alexandru Lazar, Akinobu Mita, Antoniu Miclaus,
	Charles-Antoine Couret, Cosmin Tanislav, David Lechner,
	Ivan Mikhaylov, Jacopo Mondi, Jean-Baptiste Maneyrol,
	Lars-Peter Clausen, Marcelo Schmitt, Mårten Lindahl,
	Matt Ranostay, Matt Ranostay, Michael Hennerich, Michael Welling,
	Mugilraj Dhavachelvan, Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron,
	catalin.marinas, gregkh

On Sun,  8 May 2022 18:55:40 +0100
Jonathan Cameron <jic23@kernel.org> wrote:

> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

+CC Greg as a heads up.

So I had a little debate with myself on 'how' to apply these and in the
end decided to take the slow path on the basis:

1) We haven't actually had a bug report and the problem is only known to
   be relevant directly to a very small set of platforms (those QC Kryo parts).
   (I've also so far not applied a Stable cc).

2) I'm nervous about such wide spread changes touching many drivers going
   in as fixes.

3) Churn and resulting delay to normal patch flow given this will create
   noise in a lot of drivers.

Anyhow, for now applied to the togreg branch of iio.git which I've pushed
out as testing for 0-day to play with it.  I'll almost certainly rebase that
branch of rc1 once available rather than it's current base of where Linus'
tree was when I started today (which happened to have char-misc merged).

All comments welcome as for a few days at least it's easy to modify how
these go upstream.

Thanks (particularly to Nuno for going through all these!),

Jonathan

p.s. I'll get around to the same fixes for the few drivers still in staging
 sometime in next few weeks.


> 
> Changes since v1:
> - Rename IIO_ALIGN to more specific IIO_DMA_MINALIGN
> - Fix a few patch descriptions (wrong drive names and such like)
> - Fixed a bunch of typos in the intro text in this email (I clearly
>   forgot to spell check that!)
> - Stopped removing 'to' in some comment updates. The English is fine either
>   way and this reduces the patch set size.
> - Pick up tags (thanks all!)
> 
> A few bits of feedback I haven't acted on:
> - Use of a general kernel define with a generic name. ARCH_DMA_MINALIGN
>   isn't yet available on all architectures, so the use of IIO_DMA_MINALIGN
>   provides a good path to fix this now in a fashion that can be easily
>   back ported.
> - Adding a define for __aligned(IIO_DMA_MINALIGN). I think that
>   such a define would obscure what was going a little. I couldn't think
>   of a reason we'd want to add anything else across all these locations
>   (which is the other reason we might want such a define).
> - Dropping some unnecessary marking of second buffers. I left these alone
>   because explaining why they aren't needed would require additional
>   commentary and is a separate cleanup that can wait for another time.#
> 
> Many years ago, IIO started using ____cacheline_aligned to ensure
> that buffers that might be used for DMA were not sharing a cacheline
> with other data that might lead to DMA safety issues.
> 
> As it turns out, that was fine at the time, but not based on the
> correct alignment requirement (though I believe it was a conservative
> choice at the time).  Note that on many architectures this was introducing
> unnecessary padding.  We should have been using ARCH_KMALLOC_MINALIGN
> as other subsystems such as crypto have done for a long time.
> 
> Patch 1 description contains more information but in short, there are
> ARM64 SoCs out their that have a larger cacheline size for caches beyond
> L1. In many cases they maintain coherency for all DMA devices attached
> and so this isn't a problem, but there are exceptions that do not.
> 
> So, this is a rather large patch set and just covers those drivers
> that are in the last kernel release and in drivers/iio.
> 
> Many of these drivers are somewhat old so I haven't specifically
> cc'd anyone so will be relying on those kind enough to sanity check
> patches on drivers that are beyond their own.
> 
> Given there is ongoing discussion around reducing the alignment
> requirements where possible, I've adopted the existing IIO_ALIGN
> define throughout.  That way we have a single point to update if
> that becomes relevant in future.
> 
> Cc: catalin.marinas@arm.com
> 
> Jonathan Cameron (92):
>   iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large
>   iio: accel: adxl313: Fix alignment for DMA safety
>   iio: accel: adxl355: Fix alignment for DMA safety
>   iio: accel: adxl367: Fix alignment for DMA safety
>   iio: accel: bma220: Fix alignment for DMA safety
>   iio: accel: bmi088: Fix alignment for DMA safety
>   iio: accel: sca3000: Fix alignment for DMA safety
>   iio: accel: sca3300: Fix alignment for DMA safety
>   iio: adc: ad7266: Fix alignment for DMA safety
>   iio: adc: ad7280a: Fix alignment for DMA safety
>   iio: adc: ad7292: Fix alignment for DMA safety
>   iio: adc: ad7298: Fix alignment for DMA safety
>   iio: adc: ad7476: Fix alignment for DMA safety
>   iio: adc: ad7606: Fix alignment for DMA safety
>   iio: adc: ad7766: Fix alignment for DMA safety
>   iio: adc: ad7768-1: Fix alignment for DMA safety
>   iio: adc: ad7887: Fix alignment for DMA safety
>   iio: adc: ad7923: Fix alignment for DMA safety
>   iio: adc: ad7949: Fix alignment for DMA safety
>   iio: adc: hi8435: Fix alignment for DMA safety
>   iio: adc: ltc2496: Fix alignment for DMA safety
>   iio: adc: ltc2497: Fix alignment for DMA safety
>   iio: adc: max1027: Fix alignment for DMA safety
>   iio: adc: max11100: Fix alignment for DMA safety
>   iio: adc: max1118: Fix alignment for DMA safety
>   iio: adc: max1241: Fix alignment for DMA safety
>   iio: adc: mcp320x: Fix alignment for DMA safety
>   iio: adc: ti-adc0832: Fix alignment for DMA safety
>   iio: adc: ti-adc084s021: Fix alignment for DMA safety
>   iio: adc: ti-adc108s102: Fix alignment for DMA safety
>   iio: adc: ti-adc12138: Fix alignment for DMA safety
>   iio: adc: ti-adc128s052: Fix alignment for DMA safety
>   iio: adc: ti-adc161s626: Fix alignment for DMA safety
>   iio: adc: ti-ads124s08: Fix alignment for DMA safety
>   iio: adc: ti-ads131e08: Fix alignment for DMA safety
>   iio: adc: ti-ads7950: Fix alignment for DMA safety
>   iio: adc: ti-ads8344: Fix alignment for DMA safety
>   iio: adc: ti-ads8688: Fix alignment for DMA safety
>   iio: adc: ti-tlc4541: Fix alignment for DMA safety
>   iio: addac: ad74413r: Fix alignment for DMA safety
>   iio: amplifiers: ad8366: Fix alignment for DMA safety
>   iio: common: ssp: Fix alignment for DMA safety
>   iio: dac: ad5064: Fix alignment for DMA safety
>   iio: dac: ad5360: Fix alignment for DMA safety
>   iio: dac: ad5421: Fix alignment for DMA safety
>   iio: dac: ad5449: Fix alignment for DMA safety
>   iio: dac: ad5504: Fix alignment for DMA safety
>   iio: dac: ad5592r: Fix alignment for DMA safety
>   iio: dac: ad5686: Fix alignment for DMA safety
>   iio: dac: ad5755: Fix alignment for DMA safety
>   iio: dac: ad5761: Fix alignment for DMA safety
>   iio: dac: ad5764: Fix alignment for DMA safety
>   iio: dac: ad5766: Fix alignment for DMA safety
>   iio: dac: ad5770r: Fix alignment for DMA safety
>   iio: dac: ad5791: Fix alignment for DMA saftey
>   iio: dac: ad7293: Fix alignment for DMA safety
>   iio: dac: ad7303: Fix alignment for DMA safety
>   iio: dac: ad8801: Fix alignment for DMA safety
>   iio: dac: ltc2688: Fix alignment for DMA safety
>   iio: dac: mcp4922: Fix alignment for DMA safety
>   iio: dac: ti-dac082s085: Fix alignment for DMA safety
>   iio: dac: ti-dac5571: Fix alignment for DMA safety
>   iio: dac: ti-dac7311: Fix alignment for DMA safety
>   iio: dac: ti-dac7612: Fix alignment for DMA safety
>   iio: frequency: ad9523: Fix alignment for DMA safety
>   iio: frequency: adf4350: Fix alignment for DMA safety
>   iio: frequency: adf4371: Fix alignment for DMA safety
>   iio: frequency: admv1013: Fix alignment for DMA safety
>   iio: frequency: admv1014: Fix alignment for DMA safety
>   iio: frequency: admv4420: Fix alignment for DMA safety
>   iio: frequency: adrf6780: Fix alignment for DMA safety
>   iio: gyro: adis16080: Fix alignment for DMA safety
>   iio: gyro: adis16130: Fix alignment for DMA safety
>   iio: gyro: adxrs450: Fix alignment for DMA safety
>   iio: gyro: fxas210002c: Fix alignment for DMA safety
>   iio: imu: fxos8700: Fix alignment for DMA safety
>   iio: imu: inv_icm42600: Fix alignment for DMA safety
>   iio: imu: inv_icm42600: Fix alignment for DMA safety in buffer code.
>   iio: imu: mpu6050: Fix alignment for DMA safety
>   iio: potentiometer: ad5110: Fix alignment for DMA safety
>   iio: potentiometer: ad5272: Fix alignment for DMA safety
>   iio: potentiometer: max5481: Fix alignment for DMA safety
>   iio: potentiometer: mcp41010: Fix alignment for DMA safety
>   iio: potentiometer: mcp4131: Fix alignment for DMA safety
>   iio: pressure: dlhl60d: Drop unnecessary alignment forcing.
>   iio: proximity: as3935: Fix alignment for DMA safety
>   iio: proximity: vcnl3020: Drop unnecessary alignment requirement for
>     i2c device
>   iio: resolver: ad2s1200: Fix alignment for DMA safety
>   iio: resolver: ad2s90: Fix alignment for DMA safety
>   iio: temp: ltc2983: Fix alignment for DMA safety
>   iio: temp: max31865: Fix alignment for DMA safety
>   iio: temp: maxim_thermocouple: Fix alignment for DMA safety
> 
>  drivers/iio/accel/adxl313_core.c                   |  2 +-
>  drivers/iio/accel/adxl355_core.c                   |  2 +-
>  drivers/iio/accel/adxl367.c                        |  2 +-
>  drivers/iio/accel/adxl367_spi.c                    |  8 +++++---
>  drivers/iio/accel/bma220_spi.c                     |  2 +-
>  drivers/iio/accel/bmi088-accel-core.c              |  2 +-
>  drivers/iio/accel/sca3000.c                        |  4 ++--
>  drivers/iio/accel/sca3300.c                        |  2 +-
>  drivers/iio/adc/ad7266.c                           |  4 ++--
>  drivers/iio/adc/ad7280a.c                          |  2 +-
>  drivers/iio/adc/ad7292.c                           |  2 +-
>  drivers/iio/adc/ad7298.c                           |  2 +-
>  drivers/iio/adc/ad7476.c                           |  5 ++---
>  drivers/iio/adc/ad7606.h                           |  4 ++--
>  drivers/iio/adc/ad7766.c                           |  5 ++---
>  drivers/iio/adc/ad7768-1.c                         |  4 ++--
>  drivers/iio/adc/ad7887.c                           |  5 ++---
>  drivers/iio/adc/ad7923.c                           |  4 ++--
>  drivers/iio/adc/ad7949.c                           |  2 +-
>  drivers/iio/adc/adi-axi-adc.c                      |  7 ++++---
>  drivers/iio/adc/hi8435.c                           |  2 +-
>  drivers/iio/adc/ltc2496.c                          |  4 ++--
>  drivers/iio/adc/ltc2497.c                          |  4 ++--
>  drivers/iio/adc/max1027.c                          |  2 +-
>  drivers/iio/adc/max11100.c                         |  4 ++--
>  drivers/iio/adc/max1118.c                          |  2 +-
>  drivers/iio/adc/max1241.c                          |  2 +-
>  drivers/iio/adc/mcp320x.c                          |  2 +-
>  drivers/iio/adc/ti-adc0832.c                       |  2 +-
>  drivers/iio/adc/ti-adc084s021.c                    |  4 ++--
>  drivers/iio/adc/ti-adc108s102.c                    |  4 ++--
>  drivers/iio/adc/ti-adc12138.c                      |  2 +-
>  drivers/iio/adc/ti-adc128s052.c                    |  2 +-
>  drivers/iio/adc/ti-adc161s626.c                    |  2 +-
>  drivers/iio/adc/ti-ads124s08.c                     |  2 +-
>  drivers/iio/adc/ti-ads131e08.c                     |  2 +-
>  drivers/iio/adc/ti-ads7950.c                       |  4 ++--
>  drivers/iio/adc/ti-ads8344.c                       |  2 +-
>  drivers/iio/adc/ti-ads8688.c                       |  2 +-
>  drivers/iio/adc/ti-tlc4541.c                       |  4 ++--
>  drivers/iio/addac/ad74413r.c                       |  4 ++--
>  drivers/iio/amplifiers/ad8366.c                    |  4 ++--
>  drivers/iio/common/ssp_sensors/ssp.h               |  3 +--
>  drivers/iio/dac/ad5064.c                           |  4 ++--
>  drivers/iio/dac/ad5360.c                           |  4 ++--
>  drivers/iio/dac/ad5421.c                           |  4 ++--
>  drivers/iio/dac/ad5449.c                           |  4 ++--
>  drivers/iio/dac/ad5504.c                           |  2 +-
>  drivers/iio/dac/ad5592r-base.h                     |  4 +++-
>  drivers/iio/dac/ad5686.h                           |  6 ++++--
>  drivers/iio/dac/ad5755.c                           |  4 ++--
>  drivers/iio/dac/ad5761.c                           |  4 ++--
>  drivers/iio/dac/ad5764.c                           |  4 ++--
>  drivers/iio/dac/ad5766.c                           |  2 +-
>  drivers/iio/dac/ad5770r.c                          |  2 +-
>  drivers/iio/dac/ad5791.c                           |  2 +-
>  drivers/iio/dac/ad7293.c                           |  2 +-
>  drivers/iio/dac/ad7303.c                           |  4 ++--
>  drivers/iio/dac/ad8801.c                           |  2 +-
>  drivers/iio/dac/ltc2688.c                          |  4 ++--
>  drivers/iio/dac/mcp4922.c                          |  2 +-
>  drivers/iio/dac/ti-dac082s085.c                    |  2 +-
>  drivers/iio/dac/ti-dac5571.c                       |  2 +-
>  drivers/iio/dac/ti-dac7311.c                       |  2 +-
>  drivers/iio/dac/ti-dac7612.c                       |  4 ++--
>  drivers/iio/frequency/ad9523.c                     |  6 +++---
>  drivers/iio/frequency/adf4350.c                    |  6 +++---
>  drivers/iio/frequency/adf4371.c                    |  2 +-
>  drivers/iio/frequency/admv1013.c                   |  2 +-
>  drivers/iio/frequency/admv1014.c                   |  2 +-
>  drivers/iio/frequency/admv4420.c                   |  2 +-
>  drivers/iio/frequency/adrf6780.c                   |  2 +-
>  drivers/iio/gyro/adis16080.c                       |  2 +-
>  drivers/iio/gyro/adis16130.c                       |  2 +-
>  drivers/iio/gyro/adxrs450.c                        |  2 +-
>  drivers/iio/gyro/fxas21002c_core.c                 |  6 +++---
>  drivers/iio/imu/fxos8700_core.c                    |  2 +-
>  drivers/iio/imu/inv_icm42600/inv_icm42600.h        |  2 +-
>  drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.h |  2 +-
>  drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h          |  2 +-
>  drivers/iio/industrialio-core.c                    |  4 ++--
>  drivers/iio/potentiometer/ad5110.c                 |  4 ++--
>  drivers/iio/potentiometer/ad5272.c                 |  2 +-
>  drivers/iio/potentiometer/max5481.c                |  2 +-
>  drivers/iio/potentiometer/mcp41010.c               |  2 +-
>  drivers/iio/potentiometer/mcp4131.c                |  2 +-
>  drivers/iio/pressure/dlhl60d.c                     |  2 +-
>  drivers/iio/proximity/as3935.c                     |  2 +-
>  drivers/iio/proximity/vcnl3020.c                   |  4 ++--
>  drivers/iio/resolver/ad2s1200.c                    |  2 +-
>  drivers/iio/resolver/ad2s90.c                      |  2 +-
>  drivers/iio/temperature/ltc2983.c                  |  4 ++--
>  drivers/iio/temperature/max31865.c                 |  2 +-
>  drivers/iio/temperature/maxim_thermocouple.c       |  2 +-
>  include/linux/iio/iio.h                            | 10 ++++++++--
>  95 files changed, 151 insertions(+), 142 deletions(-)
> 


^ permalink raw reply	[flat|nested] 97+ messages in thread

* Re: [PATCH v2 01/92] iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large
  2022-05-08 17:55 ` [PATCH v2 01/92] iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large Jonathan Cameron
@ 2022-06-04 16:56   ` Jonathan Cameron
  0 siblings, 0 replies; 97+ messages in thread
From: Jonathan Cameron @ 2022-06-04 16:56 UTC (permalink / raw)
  To: linux-iio
  Cc: Alexandru Lazar, Akinobu Mita, Alexandru Tachici,
	Antoniu Miclaus, Charles-Antoine Couret, Cosmin Tanislav,
	David Lechner, Ivan Mikhaylov, Jacopo Mondi,
	Jean-Baptiste Maneyrol, Lars-Peter Clausen, Marcelo Schmitt,
	Mårten Lindahl, Matt Ranostay, Matt Ranostay,
	Michael Hennerich, Michael Welling, Mugilraj Dhavachelvan,
	Navin Sankar Velliangiri, Nuno Sá,
	Paul Cercueil, Phil Reid, Puranjay Mohan, Ricardo Ribalda,
	Robert Jones, Rui Miguel Silva, Sean Nyekjaer, Tomas Melin,
	Tomislav Denis, Uwe Kleine-König, Jonathan Cameron

On Sun,  8 May 2022 18:55:41 +0100
Jonathan Cameron <jic23@kernel.org> wrote:

> From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> 
> Discussion of the series:
> https://lore.kernel.org/all/20220405135758.774016-1-catalin.marinas@arm.com/
> mm, arm64: Reduce ARCH_KMALLOC_MINALIGN brought to my attention that
> our current IIO usage of L1CACHE_ALIGN is insufficient as their are Arm
> platforms out their with non coherent DMA and larger cache lines at
> at higher levels of their cache hierarchy.
> 
> Rename the define to make it's purpose more explicit. It will be used
> much more widely going forwards (to replace incorrect ____cacheline_aligned
> markings.
> 
> Note this patch will greatly reduce the padding on some architectures
> that have smaller requirements for DMA safe buffers.
> 
> The history of changing values of ARCH_KMALLOC_MINALIGN via
> ARCH_DMA_MINALIGN on arm64 is rather complex. I'm not tagging this
> as fixing a particular patch from that route as it's not clear what to tag.
> 
> Most recently a change to bring them back inline was reverted because
> of some Qualcomm Kryo cores with an L2 cache with 128-byte lines
> sitting above the point of coherency.
> 
> c1132702c71f Revert "arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES)"
> That reverts:
> 65688d2a05de arm64: cache: Lower ARCH_DMA_MINALIGN to 64 (L1_CACHE_BYTES) which
> refers to the change originally being motivated by Thunder x1 performance
> rather than correctness.
> 
> Fixes: 6f7c8ee585e9d ("staging:iio: Add ability to allocate private data space to iio_allocate_device")
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Acked-by: Nuno Sá <nuno.sa@analog.com>

This crossed with a patch adding another use of IIO_ALIGN in bma400. I've fixed that
rename up whilst applying.

Thanks,

Jonathan

> ---
>  drivers/iio/adc/adi-axi-adc.c   |  7 ++++---
>  drivers/iio/industrialio-core.c |  4 ++--
>  include/linux/iio/iio.h         | 10 ++++++++--
>  3 files changed, 14 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/iio/adc/adi-axi-adc.c b/drivers/iio/adc/adi-axi-adc.c
> index a73e3c2d212f..099be9d47223 100644
> --- a/drivers/iio/adc/adi-axi-adc.c
> +++ b/drivers/iio/adc/adi-axi-adc.c
> @@ -84,7 +84,8 @@ void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv)
>  {
>  	struct adi_axi_adc_client *cl = conv_to_client(conv);
>  
> -	return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN);
> +	return (char *)cl + ALIGN(sizeof(struct adi_axi_adc_client),
> +				  IIO_DMA_MINALIGN);
>  }
>  EXPORT_SYMBOL_GPL(adi_axi_adc_conv_priv);
>  
> @@ -169,9 +170,9 @@ static struct adi_axi_adc_conv *adi_axi_adc_conv_register(struct device *dev,
>  	struct adi_axi_adc_client *cl;
>  	size_t alloc_size;
>  
> -	alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_ALIGN);
> +	alloc_size = ALIGN(sizeof(struct adi_axi_adc_client), IIO_DMA_MINALIGN);
>  	if (sizeof_priv)
> -		alloc_size += ALIGN(sizeof_priv, IIO_ALIGN);
> +		alloc_size += ALIGN(sizeof_priv, IIO_DMA_MINALIGN);
>  
>  	cl = kzalloc(alloc_size, GFP_KERNEL);
>  	if (!cl)
> diff --git a/drivers/iio/industrialio-core.c b/drivers/iio/industrialio-core.c
> index e1ed44dec2ab..b4218f3b1ac2 100644
> --- a/drivers/iio/industrialio-core.c
> +++ b/drivers/iio/industrialio-core.c
> @@ -1640,7 +1640,7 @@ struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv)
>  
>  	alloc_size = sizeof(struct iio_dev_opaque);
>  	if (sizeof_priv) {
> -		alloc_size = ALIGN(alloc_size, IIO_ALIGN);
> +		alloc_size = ALIGN(alloc_size, IIO_DMA_MINALIGN);
>  		alloc_size += sizeof_priv;
>  	}
>  
> @@ -1650,7 +1650,7 @@ struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv)
>  
>  	indio_dev = &iio_dev_opaque->indio_dev;
>  	indio_dev->priv = (char *)iio_dev_opaque +
> -		ALIGN(sizeof(struct iio_dev_opaque), IIO_ALIGN);
> +		ALIGN(sizeof(struct iio_dev_opaque), IIO_DMA_MINALIGN);
>  
>  	indio_dev->dev.parent = parent;
>  	indio_dev->dev.type = &iio_device_type;
> diff --git a/include/linux/iio/iio.h b/include/linux/iio/iio.h
> index faf00f2c0be6..c4ce02293f1f 100644
> --- a/include/linux/iio/iio.h
> +++ b/include/linux/iio/iio.h
> @@ -9,6 +9,7 @@
>  
>  #include <linux/device.h>
>  #include <linux/cdev.h>
> +#include <linux/slab.h>
>  #include <linux/iio/types.h>
>  #include <linux/of.h>
>  /* IIO TODO LIST */
> @@ -657,8 +658,13 @@ static inline void *iio_device_get_drvdata(const struct iio_dev *indio_dev)
>  	return dev_get_drvdata(&indio_dev->dev);
>  }
>  
> -/* Can we make this smaller? */
> -#define IIO_ALIGN L1_CACHE_BYTES
> +/*
> + * Used to ensure the iio_priv() structure is aligned to allow that structure
> + * to in turn include IIO_DMA_MINALIGN'd elements such as buffers which
> + * must not share  cachelines with the rest of the structure, thus making
> + * them safe for use with non-coherent DMA.
> + */
> +#define IIO_DMA_MINALIGN ARCH_KMALLOC_MINALIGN
>  struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv);
>  
>  /* The information at the returned address is guaranteed to be cacheline aligned */


^ permalink raw reply	[flat|nested] 97+ messages in thread

end of thread, other threads:[~2022-06-04 16:48 UTC | newest]

Thread overview: 97+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-08 17:55 [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 01/92] iio: core: Fix IIO_ALIGN and rename as it was not sufficiently large Jonathan Cameron
2022-06-04 16:56   ` Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 02/92] iio: accel: adxl313: Fix alignment for DMA safety Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 03/92] iio: accel: adxl355: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 04/92] iio: accel: adxl367: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 05/92] iio: accel: bma220: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 06/92] iio: accel: bmi088: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 07/92] iio: accel: sca3000: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 08/92] iio: accel: sca3300: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 09/92] iio: adc: ad7266: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 10/92] iio: adc: ad7280a: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 11/92] iio: adc: ad7292: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 12/92] iio: adc: ad7298: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 13/92] iio: adc: ad7476: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 14/92] iio: adc: ad7606: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 15/92] iio: adc: ad7766: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 16/92] iio: adc: ad7768-1: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 17/92] iio: adc: ad7887: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 18/92] iio: adc: ad7923: " Jonathan Cameron
2022-05-08 17:55 ` [PATCH v2 19/92] iio: adc: ad7949: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 20/92] iio: adc: hi8435: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 21/92] iio: adc: ltc2496: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 22/92] iio: adc: ltc2497: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 23/92] iio: adc: max1027: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 24/92] iio: adc: max11100: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 25/92] iio: adc: max1118: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 26/92] iio: adc: max1241: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 27/92] iio: adc: mcp320x: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 28/92] iio: adc: ti-adc0832: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 29/92] iio: adc: ti-adc084s021: " Jonathan Cameron
2022-05-09  8:34   ` Marten Lindahl
2022-05-08 17:56 ` [PATCH v2 30/92] iio: adc: ti-adc108s102: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 31/92] iio: adc: ti-adc12138: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 32/92] iio: adc: ti-adc128s052: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 33/92] iio: adc: ti-adc161s626: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 34/92] iio: adc: ti-ads124s08: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 35/92] iio: adc: ti-ads131e08: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 36/92] iio: adc: ti-ads7950: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 37/92] iio: adc: ti-ads8344: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 38/92] iio: adc: ti-ads8688: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 39/92] iio: adc: ti-tlc4541: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 40/92] iio: addac: ad74413r: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 41/92] iio: amplifiers: ad8366: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 42/92] iio: common: ssp: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 43/92] iio: dac: ad5064: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 44/92] iio: dac: ad5360: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 45/92] iio: dac: ad5421: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 46/92] iio: dac: ad5449: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 47/92] iio: dac: ad5504: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 48/92] iio: dac: ad5592r: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 49/92] iio: dac: ad5686: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 50/92] iio: dac: ad5755: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 51/92] iio: dac: ad5761: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 52/92] iio: dac: ad5764: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 53/92] iio: dac: ad5766: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 54/92] iio: dac: ad5770r: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 55/92] iio: dac: ad5791: Fix alignment for DMA saftey Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 56/92] iio: dac: ad7293: Fix alignment for DMA safety Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 57/92] iio: dac: ad7303: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 58/92] iio: dac: ad8801: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 59/92] iio: dac: ltc2688: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 60/92] iio: dac: mcp4922: " Jonathan Cameron
2022-05-08 22:31   ` Michael Welling
2022-05-08 17:56 ` [PATCH v2 61/92] iio: dac: ti-dac082s085: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 62/92] iio: dac: ti-dac5571: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 63/92] iio: dac: ti-dac7311: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 64/92] iio: dac: ti-dac7612: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 65/92] iio: frequency: ad9523: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 66/92] iio: frequency: adf4350: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 67/92] iio: frequency: adf4371: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 68/92] iio: frequency: admv1013: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 69/92] iio: frequency: admv1014: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 70/92] iio: frequency: admv4420: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 71/92] iio: frequency: adrf6780: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 72/92] iio: gyro: adis16080: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 73/92] iio: gyro: adis16130: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 74/92] iio: gyro: adxrs450: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 75/92] iio: gyro: fxas210002c: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 76/92] iio: imu: fxos8700: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 77/92] iio: imu: inv_icm42600: " Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 78/92] iio: imu: inv_icm42600: Fix alignment for DMA safety in buffer code Jonathan Cameron
2022-05-08 17:56 ` [PATCH v2 79/92] iio: imu: mpu6050: Fix alignment for DMA safety Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 80/92] iio: potentiometer: ad5110: " Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 81/92] iio: potentiometer: ad5272: " Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 82/92] iio: potentiometer: max5481: " Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 83/92] iio: potentiometer: mcp41010: " Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 84/92] iio: potentiometer: mcp4131: " Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 85/92] iio: pressure: dlhl60d: Drop unnecessary alignment forcing Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 86/92] iio: proximity: as3935: Fix alignment for DMA safety Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 87/92] iio: proximity: vcnl3020: Drop unnecessary alignment requirement for i2c device Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 88/92] iio: resolver: ad2s1200: Fix alignment for DMA safety Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 89/92] iio: resolver: ad2s90: " Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 90/92] iio: temp: ltc2983: " Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 91/92] iio: temp: max31865: " Jonathan Cameron
2022-05-08 17:57 ` [PATCH v2 92/92] iio: temp: maxim_thermocouple: " Jonathan Cameron
2022-06-04 16:53 ` [PATCH v2 00/92] IIO: Fix alignment of buffers for DMA Jonathan Cameron

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