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From: Vasant Hegde via iommu <iommu@lists.linux-foundation.org>
To: <iommu@lists.linux-foundation.org>
Cc: Vasant Hegde <vasant.hegde@amd.com>
Subject: [PATCH v3 20/35] iommu/amd: Convert to use per PCI segment rlookup_table
Date: Wed, 11 May 2022 12:51:26 +0530	[thread overview]
Message-ID: <20220511072141.15485-21-vasant.hegde@amd.com> (raw)
In-Reply-To: <20220511072141.15485-1-vasant.hegde@amd.com>

Then, remove the global amd_iommu_rlookup_table and rlookup_table_size.

Co-developed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
---
 drivers/iommu/amd/amd_iommu_types.h |  5 -----
 drivers/iommu/amd/init.c            | 23 ++---------------------
 drivers/iommu/amd/iommu.c           | 19 +++++++++----------
 3 files changed, 11 insertions(+), 36 deletions(-)

diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 553e9910e91d..ddd606daa653 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -842,11 +842,6 @@ extern struct dev_table_entry *amd_iommu_dev_table;
  */
 extern u16 *amd_iommu_alias_table;
 
-/*
- * Reverse lookup table to find the IOMMU which translates a specific device.
- */
-extern struct amd_iommu **amd_iommu_rlookup_table;
-
 /* size of the dma_ops aperture as power of 2 */
 extern unsigned amd_iommu_aperture_order;
 
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index ed40c7cec879..5e8106641c5c 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -200,12 +200,6 @@ struct dev_table_entry *amd_iommu_dev_table;
  */
 u16 *amd_iommu_alias_table;
 
-/*
- * The rlookup table is used to find the IOMMU which is responsible
- * for a specific device. It is also indexed by the PCI device id.
- */
-struct amd_iommu **amd_iommu_rlookup_table;
-
 /*
  * AMD IOMMU allows up to 2^16 different protection domains. This is a bitmap
  * to know which ones are already in use.
@@ -214,7 +208,6 @@ unsigned long *amd_iommu_pd_alloc_bitmap;
 
 static u32 dev_table_size;	/* size of the device table */
 static u32 alias_table_size;	/* size of the alias table */
-static u32 rlookup_table_size;	/* size if the rlookup table */
 
 enum iommu_init_state {
 	IOMMU_START_STATE,
@@ -1142,7 +1135,7 @@ void amd_iommu_apply_erratum_63(u16 devid)
 /* Writes the specific IOMMU for a device into the rlookup table */
 static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid)
 {
-	amd_iommu_rlookup_table[devid] = iommu;
+	iommu->pci_seg->rlookup_table[devid] = iommu;
 }
 
 /*
@@ -1824,7 +1817,7 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h,
 	 * Make sure IOMMU is not considered to translate itself. The IVRS
 	 * table tells us so, but this is a lie!
 	 */
-	amd_iommu_rlookup_table[iommu->devid] = NULL;
+	pci_seg->rlookup_table[iommu->devid] = NULL;
 
 	return 0;
 }
@@ -2782,10 +2775,6 @@ static void __init free_iommu_resources(void)
 	kmem_cache_destroy(amd_iommu_irq_cache);
 	amd_iommu_irq_cache = NULL;
 
-	free_pages((unsigned long)amd_iommu_rlookup_table,
-		   get_order(rlookup_table_size));
-	amd_iommu_rlookup_table = NULL;
-
 	free_pages((unsigned long)amd_iommu_alias_table,
 		   get_order(alias_table_size));
 	amd_iommu_alias_table = NULL;
@@ -2924,7 +2913,6 @@ static int __init early_amd_iommu_init(void)
 
 	dev_table_size     = tbl_size(DEV_TABLE_ENTRY_SIZE);
 	alias_table_size   = tbl_size(ALIAS_TABLE_ENTRY_SIZE);
-	rlookup_table_size = tbl_size(RLOOKUP_TABLE_ENTRY_SIZE);
 
 	/* Device table - directly used by all IOMMUs */
 	ret = -ENOMEM;
@@ -2943,13 +2931,6 @@ static int __init early_amd_iommu_init(void)
 	if (amd_iommu_alias_table == NULL)
 		goto out;
 
-	/* IOMMU rlookup table - find the IOMMU for a specific device */
-	amd_iommu_rlookup_table = (void *)__get_free_pages(
-			GFP_KERNEL | __GFP_ZERO,
-			get_order(rlookup_table_size));
-	if (amd_iommu_rlookup_table == NULL)
-		goto out;
-
 	amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages(
 					    GFP_KERNEL | __GFP_ZERO,
 					    get_order(MAX_DOMAIN_ID/8));
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 34909faeef76..126832ae2997 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -287,10 +287,9 @@ static void setup_aliases(struct amd_iommu *iommu, struct device *dev)
 	clone_aliases(iommu, dev);
 }
 
-static struct iommu_dev_data *find_dev_data(u16 devid)
+static struct iommu_dev_data *find_dev_data(struct amd_iommu *iommu, u16 devid)
 {
 	struct iommu_dev_data *dev_data;
-	struct amd_iommu *iommu = amd_iommu_rlookup_table[devid];
 
 	dev_data = search_dev_data(iommu, devid);
 
@@ -388,7 +387,7 @@ static int iommu_init_device(struct amd_iommu *iommu, struct device *dev)
 	if (devid < 0)
 		return devid;
 
-	dev_data = find_dev_data(devid);
+	dev_data = find_dev_data(iommu, devid);
 	if (!dev_data)
 		return -ENOMEM;
 
@@ -403,9 +402,6 @@ static int iommu_init_device(struct amd_iommu *iommu, struct device *dev)
 	 */
 	if ((iommu_default_passthrough() || !amd_iommu_force_isolation) &&
 	    dev_is_pci(dev) && pci_iommuv2_capable(to_pci_dev(dev))) {
-		struct amd_iommu *iommu;
-
-		iommu = amd_iommu_rlookup_table[dev_data->devid];
 		dev_data->iommu_v2 = iommu->is_iommu_v2;
 	}
 
@@ -416,13 +412,15 @@ static int iommu_init_device(struct amd_iommu *iommu, struct device *dev)
 
 static void iommu_ignore_device(struct amd_iommu *iommu, struct device *dev)
 {
+	struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg;
 	int devid;
 
 	devid = get_device_id(dev);
 	if (devid < 0)
 		return;
 
-	amd_iommu_rlookup_table[devid] = NULL;
+
+	pci_seg->rlookup_table[devid] = NULL;
 	memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry));
 
 	setup_aliases(iommu, dev);
@@ -2747,8 +2745,9 @@ static struct irq_remap_table *get_irq_table(struct amd_iommu *iommu, u16 devid)
 	struct irq_remap_table *table;
 	struct amd_iommu_pci_seg *pci_seg = iommu->pci_seg;
 
-	if (WARN_ONCE(!amd_iommu_rlookup_table[devid],
-		      "%s: no iommu for devid %x\n", __func__, devid))
+	if (WARN_ONCE(!pci_seg->rlookup_table[devid],
+		      "%s: no iommu for devid %x:%x\n",
+		      __func__, pci_seg->id, devid))
 		return NULL;
 
 	table = pci_seg->irq_lookup_table[devid];
@@ -2807,7 +2806,7 @@ static int set_remap_table_entry_alias(struct pci_dev *pdev, u16 alias,
 	pci_seg->irq_lookup_table[alias] = table;
 	set_dte_irq_entry(alias, table);
 
-	iommu_flush_dte(amd_iommu_rlookup_table[alias], alias);
+	iommu_flush_dte(pci_seg->rlookup_table[alias], alias);
 
 	return 0;
 }
-- 
2.27.0

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  parent reply	other threads:[~2022-05-11  7:27 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-11  7:21 [PATCH v3 00/35] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 01/35] iommu/amd: Update struct iommu_dev_data definition Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 02/35] iommu/amd: Introduce pci segment structure Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 03/35] iommu/amd: Introduce per PCI segment device table Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 04/35] iommu/amd: Introduce per PCI segment rlookup table Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 05/35] iommu/amd: Introduce per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 06/35] iommu/amd: Introduce per PCI segment dev_data_list Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 07/35] iommu/amd: Introduce per PCI segment old_dev_tbl_cpy Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 08/35] iommu/amd: Introduce per PCI segment alias_table Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 09/35] iommu/amd: Introduce per PCI segment unity map list Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 10/35] iommu/amd: Introduce per PCI segment last_bdf Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 11/35] iommu/amd: Introduce per PCI segment device table size Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 12/35] iommu/amd: Introduce per PCI segment alias " Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 13/35] iommu/amd: Introduce per PCI segment rlookup " Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 14/35] iommu/amd: Convert to use per PCI segment irq_lookup_table Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 15/35] iommu/amd: Convert to use rlookup_amd_iommu helper function Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 16/35] iommu/amd: Update irq_remapping_alloc to use IOMMU lookup " Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 17/35] iommu/amd: Introduce struct amd_ir_data.iommu Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 18/35] iommu/amd: Update amd_irte_ops functions Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 19/35] iommu/amd: Update alloc_irq_table and alloc_irq_index Vasant Hegde via iommu
2022-05-11  7:21 ` Vasant Hegde via iommu [this message]
2022-05-11  7:21 ` [PATCH v3 21/35] iommu/amd: Update set_dte_entry and clear_dte_entry Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 22/35] iommu/amd: Update iommu_ignore_device Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 23/35] iommu/amd: Update dump_dte_entry Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 24/35] iommu/amd: Update set_dte_irq_entry Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 25/35] iommu/amd: Update (un)init_device_table_dma() Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 26/35] iommu/amd: Update set_dev_entry_bit() and get_dev_entry_bit() Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 27/35] iommu/amd: Remove global amd_iommu_[dev_table/alias_table/last_bdf] Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 28/35] iommu/amd: Flush upto last_bdf only Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 29/35] iommu/amd: Introduce get_device_sbdf_id() helper function Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 30/35] iommu/amd: Include PCI segment ID when initialize IOMMU Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 31/35] iommu/amd: Specify PCI segment ID when getting pci device Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 32/35] iommu/amd: Add PCI segment support for ivrs_[ioapic/hpet/acpihid] commands Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 33/35] iommu/amd: Print PCI segment ID in error log messages Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 34/35] iommu/amd: Update device_state structure to include PCI seg ID Vasant Hegde via iommu
2022-05-11  7:21 ` [PATCH v3 35/35] iommu/amd: Update amd_iommu_fault " Vasant Hegde via iommu
2022-05-20  9:55 ` [PATCH v3 00/35] iommu/amd: Add multiple PCI segments support Vasant Hegde via iommu
2022-05-20 10:03   ` Joerg Roedel
2022-05-20 12:12     ` Vasant Hegde via iommu
2022-06-07 10:47       ` Vasant Hegde via iommu
2022-06-22  9:59         ` Vasant Hegde via iommu
2022-06-23  7:54 ` Joerg Roedel
2022-06-28  7:49   ` Vasant Hegde via iommu

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