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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id b13-20020a056830104d00b0060603221270sm897581otp.64.2022.05.11.08.22.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 May 2022 08:22:23 -0700 (PDT) Received: (nullmailer pid 336352 invoked by uid 1000); Wed, 11 May 2022 15:22:21 -0000 Date: Wed, 11 May 2022 10:22:21 -0500 From: Rob Herring To: =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= Cc: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Heiner Kallweit , Russell King , Thomas Petazzoni , Herve Codina , =?iso-8859-1?Q?Miqu=E8l?= Raynal , Milan Stevanovic , Jimmy Lalande , Pascal Eberhard , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, netdev@vger.kernel.org Subject: Re: [PATCH net-next v4 05/12] dt-bindings: net: dsa: add bindings for Renesas RZ/N1 Advanced 5 port switch Message-ID: <20220511152221.GA334055-robh@kernel.org> References: <20220509131900.7840-1-clement.leger@bootlin.com> <20220509131900.7840-6-clement.leger@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220509131900.7840-6-clement.leger@bootlin.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 09, 2022 at 03:18:53PM +0200, Clément Léger wrote: > Add bindings for Renesas RZ/N1 Advanced 5 port switch. This switch is > present on Renesas RZ/N1 SoC and was probably provided by MoreThanIP. > This company does not exists anymore and has been bought by Synopsys. > Since this IP can't be find anymore in the Synospsy portfolio, lets use > Renesas as the vendor compatible for this IP. > > Signed-off-by: Clément Léger > --- > .../bindings/net/dsa/renesas,rzn1-a5psw.yaml | 132 ++++++++++++++++++ > 1 file changed, 132 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml > > diff --git a/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml > new file mode 100644 > index 000000000000..f0f6748e1f01 > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml > @@ -0,0 +1,132 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/N1 Advanced 5 ports ethernet switch > + > +maintainers: > + - Clément Léger > + > +description: | > + The advanced 5 ports switch is present on the Renesas RZ/N1 SoC family and > + handles 4 ports + 1 CPU management port. > + > +allOf: > + - $ref: dsa.yaml# > + > +properties: > + compatible: > + items: > + - enum: > + - renesas,r9a06g032-a5psw > + - const: renesas,rzn1-a5psw > + > + reg: > + maxItems: 1 > + > + mdio: > + $ref: /schemas/net/mdio.yaml# > + unevaluatedProperties: false > + > + clocks: > + items: > + - description: AHB clock used for the switch register interface > + - description: Switch system clock > + > + clock-names: > + items: > + - const: hclk > + - const: clk > + > +patternProperties: > + "^ethernet-ports$": Move to 'properties', not a pattern. With that, Reviewed-by: Rob Herring