From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44DC5C433EF for ; Wed, 11 May 2022 18:27:54 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 623C880163; Wed, 11 May 2022 20:27:52 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="j0xmlyq9"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1524C8434C; Wed, 11 May 2022 20:27:50 +0200 (CEST) Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 10AD284353 for ; Wed, 11 May 2022 20:27:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id A0154B825F0; Wed, 11 May 2022 18:27:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3C1FBC34100; Wed, 11 May 2022 18:27:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1652293648; bh=Nhfah46iGOFNCtDpu1PNTHSrAa/RYanhYtlryqnNVEs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j0xmlyq9CecK8g35wLs3ygAlaew61JxO9WmTd8jHdibdGkMTqaK/YdPmLbZysQ8TI FgHiO+o9SeTyPUR26bbaBg5ER1Kbn3cQIwraTPbQMT0e8um4L8mZQ23xmlDLa4qMMc kFSu4pbNXpgSyq2xfdyrQ+2AIpEkkjnoUE2whBiZr/EOH86iQbSSijRE460u1EU30+ JHtxjzKXgbqcH2RCuJeVGL8vWcU1ytfDCK6Wi0Cexn1p2O0I4jFIEbr1gbSg5HI7S/ FfjHFoq8B/sGy4oIJGLvEcBboyFnxpHb/yDTeLJYtC+bVDjDphsZ9dz50XU+nysCFR zQ5t8OuvrPpoA== Received: by pali.im (Postfix) id EACA421A6; Wed, 11 May 2022 20:27:27 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Peng Fan , Jaehoon Chung , Priyanka Jain , Sinan Akman Cc: u-boot@lists.denx.de Subject: [PATCH 2/2] mmc: fsl_esdhc: Add new config option for default fallback mode Date: Wed, 11 May 2022 20:27:13 +0200 Message-Id: <20220511182713.26790-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220511182713.26790-1-pali@kernel.org> References: <20220511182713.26790-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Currently default fallback SDHC mode is 1-bit. Add new config option CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH to allow specifying default fallback mode. This is useful e.g. for SPL builds which loads other parts from SD card during boot process. Signed-off-by: Pali Rohár --- drivers/mmc/Kconfig | 5 +++++ drivers/mmc/fsl_esdhc.c | 1 + 2 files changed, 6 insertions(+) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index f04cc44e1973..df15dff6248f 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -826,6 +826,11 @@ config FSL_ESDHC_VS33_NOT_SUPPORT For eSDHC, power supply is through peripheral circuit. 3.3V support is common. Select this if 3.3V power supply not supported. +config SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH + int + depends on FSL_ESDHC + default 1 + config FSL_ESDHC_IMX bool "Freescale/NXP i.MX eSDHC controller support" help diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 834f8933b0c6..a4c22942c2be 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -988,6 +988,7 @@ int fsl_esdhc_mmc_init(struct bd_info *bis) cfg = calloc(sizeof(struct fsl_esdhc_cfg), 1); cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR; + cfg->max_bus_width = CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH; /* Prefer peripheral clock which provides higher frequency. */ if (gd->arch.sdhc_per_clk) cfg->sdhc_clk = gd->arch.sdhc_per_clk; -- 2.20.1