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From: Maxime Ripard <maxime@cerno.tech>
To: linux-clk@vger.kernel.org,
	Mike Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>
Cc: Yassine Oudjana <y.oudjana@protonmail.com>,
	Naresh Kamboju <naresh.kamboju@linaro.org>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Tony Lindgren <tony@atomide.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Alexander Stein <alexander.stein@ew.tq-group.com>,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Maxime Ripard <maxime@cerno.tech>
Subject: [PATCH v5 01/28] clk: Drop the rate range on clk_put()
Date: Mon, 16 May 2022 15:25:00 +0200	[thread overview]
Message-ID: <20220516132527.328190-2-maxime@cerno.tech> (raw)
In-Reply-To: <20220516132527.328190-1-maxime@cerno.tech>

When clk_put() is called we don't make another clk_set_rate() call to
re-evaluate the rate boundaries. This is unlike clk_set_rate_range()
that evaluates the rate again each time it is called.

However, clk_put() is essentially equivalent to clk_set_rate_range()
since after clk_put() completes the consumer's boundaries shouldn't be
enforced anymore.

Let's add a call to clk_set_rate_range() in clk_put() to make sure those
rate boundaries are dropped and the clock provider drivers can react. In
order to be as non-intrusive as possible, we'll just make that call if
the clock had non-default boundaries.

Also add a few tests to make sure this case is covered.

Fixes: c80ac50cbb37 ("clk: Always set the rate on clk_set_range_rate")
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx8mp
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> # exynos4210, meson g12b
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/clk/clk.c      |  45 +++++++++++------
 drivers/clk/clk_test.c | 108 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 139 insertions(+), 14 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index f00d4c1158d7..2a32fa9f7618 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -2325,19 +2325,15 @@ int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
 }
 EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
 
-/**
- * clk_set_rate_range - set a rate range for a clock source
- * @clk: clock source
- * @min: desired minimum clock rate in Hz, inclusive
- * @max: desired maximum clock rate in Hz, inclusive
- *
- * Returns success (0) or negative errno.
- */
-int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
+static int clk_set_rate_range_nolock(struct clk *clk,
+				     unsigned long min,
+				     unsigned long max)
 {
 	int ret = 0;
 	unsigned long old_min, old_max, rate;
 
+	lockdep_assert_held(&prepare_lock);
+
 	if (!clk)
 		return 0;
 
@@ -2350,8 +2346,6 @@ int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
 		return -EINVAL;
 	}
 
-	clk_prepare_lock();
-
 	if (clk->exclusive_count)
 		clk_core_rate_unprotect(clk->core);
 
@@ -2395,6 +2389,28 @@ int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
 	if (clk->exclusive_count)
 		clk_core_rate_protect(clk->core);
 
+	return ret;
+}
+
+/**
+ * clk_set_rate_range - set a rate range for a clock source
+ * @clk: clock source
+ * @min: desired minimum clock rate in Hz, inclusive
+ * @max: desired maximum clock rate in Hz, inclusive
+ *
+ * Return: 0 for success or negative errno on failure.
+ */
+int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
+{
+	int ret;
+
+	if (!clk)
+		return 0;
+
+	clk_prepare_lock();
+
+	ret = clk_set_rate_range_nolock(clk, min, max);
+
 	clk_prepare_unlock();
 
 	return ret;
@@ -4396,9 +4412,10 @@ void __clk_put(struct clk *clk)
 	}
 
 	hlist_del(&clk->clks_node);
-	if (clk->min_rate > clk->core->req_rate ||
-	    clk->max_rate < clk->core->req_rate)
-		clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
+
+	/* If we had any boundaries on that clock, let's drop them. */
+	if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX)
+		clk_set_rate_range_nolock(clk, 0, ULONG_MAX);
 
 	owner = clk->core->owner;
 	kref_put(&clk->core->ref, __clk_release);
diff --git a/drivers/clk/clk_test.c b/drivers/clk/clk_test.c
index 6731a822f4e3..fd2339cc5898 100644
--- a/drivers/clk/clk_test.c
+++ b/drivers/clk/clk_test.c
@@ -760,9 +760,65 @@ static void clk_range_test_multiple_set_range_rate_maximized(struct kunit *test)
 	clk_put(user1);
 }
 
+/*
+ * Test that if we have several subsequent calls to
+ * clk_set_rate_range(), across multiple users, the core will reevaluate
+ * whether a new rate is needed, including when a user drop its clock.
+ *
+ * With clk_dummy_maximize_rate_ops, this means that the rate will
+ * trail along the maximum as it evolves.
+ */
+static void clk_range_test_multiple_set_range_rate_put_maximized(struct kunit *test)
+{
+	struct clk_dummy_context *ctx = test->priv;
+	struct clk_hw *hw = &ctx->hw;
+	struct clk *clk = hw->clk;
+	struct clk *user1, *user2;
+	unsigned long rate;
+
+	user1 = clk_hw_get_clk(hw, NULL);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, user1);
+
+	user2 = clk_hw_get_clk(hw, NULL);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, user2);
+
+	KUNIT_ASSERT_EQ(test,
+			clk_set_rate(clk, DUMMY_CLOCK_RATE_2 + 1000),
+			0);
+
+	KUNIT_ASSERT_EQ(test,
+			clk_set_rate_range(user1,
+					   0,
+					   DUMMY_CLOCK_RATE_2),
+			0);
+
+	rate = clk_get_rate(clk);
+	KUNIT_ASSERT_GT(test, rate, 0);
+	KUNIT_EXPECT_EQ(test, rate, DUMMY_CLOCK_RATE_2);
+
+	KUNIT_ASSERT_EQ(test,
+			clk_set_rate_range(user2,
+					   0,
+					   DUMMY_CLOCK_RATE_1),
+			0);
+
+	rate = clk_get_rate(clk);
+	KUNIT_ASSERT_GT(test, rate, 0);
+	KUNIT_EXPECT_EQ(test, rate, DUMMY_CLOCK_RATE_1);
+
+	clk_put(user2);
+
+	rate = clk_get_rate(clk);
+	KUNIT_ASSERT_GT(test, rate, 0);
+	KUNIT_EXPECT_EQ(test, rate, DUMMY_CLOCK_RATE_2);
+
+	clk_put(user1);
+}
+
 static struct kunit_case clk_range_maximize_test_cases[] = {
 	KUNIT_CASE(clk_range_test_set_range_rate_maximized),
 	KUNIT_CASE(clk_range_test_multiple_set_range_rate_maximized),
+	KUNIT_CASE(clk_range_test_multiple_set_range_rate_put_maximized),
 	{}
 };
 
@@ -877,9 +933,61 @@ static void clk_range_test_multiple_set_range_rate_minimized(struct kunit *test)
 	clk_put(user1);
 }
 
+/*
+ * Test that if we have several subsequent calls to
+ * clk_set_rate_range(), across multiple users, the core will reevaluate
+ * whether a new rate is needed, including when a user drop its clock.
+ *
+ * With clk_dummy_minimize_rate_ops, this means that the rate will
+ * trail along the minimum as it evolves.
+ */
+static void clk_range_test_multiple_set_range_rate_put_minimized(struct kunit *test)
+{
+	struct clk_dummy_context *ctx = test->priv;
+	struct clk_hw *hw = &ctx->hw;
+	struct clk *clk = hw->clk;
+	struct clk *user1, *user2;
+	unsigned long rate;
+
+	user1 = clk_hw_get_clk(hw, NULL);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, user1);
+
+	user2 = clk_hw_get_clk(hw, NULL);
+	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, user2);
+
+	KUNIT_ASSERT_EQ(test,
+			clk_set_rate_range(user1,
+					   DUMMY_CLOCK_RATE_1,
+					   ULONG_MAX),
+			0);
+
+	rate = clk_get_rate(clk);
+	KUNIT_ASSERT_GT(test, rate, 0);
+	KUNIT_EXPECT_EQ(test, rate, DUMMY_CLOCK_RATE_1);
+
+	KUNIT_ASSERT_EQ(test,
+			clk_set_rate_range(user2,
+					   DUMMY_CLOCK_RATE_2,
+					   ULONG_MAX),
+			0);
+
+	rate = clk_get_rate(clk);
+	KUNIT_ASSERT_GT(test, rate, 0);
+	KUNIT_EXPECT_EQ(test, rate, DUMMY_CLOCK_RATE_2);
+
+	clk_put(user2);
+
+	rate = clk_get_rate(clk);
+	KUNIT_ASSERT_GT(test, rate, 0);
+	KUNIT_EXPECT_EQ(test, rate, DUMMY_CLOCK_RATE_1);
+
+	clk_put(user1);
+}
+
 static struct kunit_case clk_range_minimize_test_cases[] = {
 	KUNIT_CASE(clk_range_test_set_range_rate_minimized),
 	KUNIT_CASE(clk_range_test_multiple_set_range_rate_minimized),
+	KUNIT_CASE(clk_range_test_multiple_set_range_rate_put_minimized),
 	{}
 };
 
-- 
2.36.1


  reply	other threads:[~2022-05-16 13:25 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-16 13:24 [PATCH v5 00/28] clk: More clock rate fixes and tests Maxime Ripard
2022-05-16 13:25 ` Maxime Ripard [this message]
2022-05-16 13:25 ` [PATCH v5 02/28] clk: Skip clamping when rounding if there's no boundaries Maxime Ripard
2022-06-27 23:21   ` Stephen Boyd
2022-06-28  8:58     ` Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 03/28] clk: Introduce clk_get_rate_range() Maxime Ripard
2022-06-27 23:23   ` Stephen Boyd
2022-05-16 13:25 ` [PATCH v5 04/28] drm/vc4: hdmi: Rework hdmi_enable_4kp60 detection Maxime Ripard
2022-06-27 23:31   ` Stephen Boyd
2022-06-28  9:47     ` Maxime Ripard
2022-06-29  8:48       ` Stephen Boyd
2022-06-29  9:29         ` Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 05/28] clk: Mention that .recalc_rate can return 0 on error Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 06/28] clk: Clarify clk_get_rate() expectations Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 07/28] clk: tests: Add test suites description Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 08/28] clk: tests: Add reference to the orphan mux bug report Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 09/28] clk: tests: Add tests for uncached clock Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 10/28] clk: tests: Add tests for single parent mux Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 11/28] clk: tests: Add tests for mux with multiple parents Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 12/28] clk: tests: Add some tests for orphan " Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 13/28] clk: Take into account uncached clocks in clk_set_rate_range() Maxime Ripard
2022-06-29  9:01   ` Stephen Boyd
2022-06-29 12:42     ` Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 14/28] clk: Fix clk_get_parent() documentation Maxime Ripard
2022-06-29  9:05   ` Stephen Boyd
2022-06-29 13:12     ` Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 15/28] clk: Set req_rate on reparenting Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 16/28] clk: Change clk_core_init_rate_req prototype Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 17/28] clk: Move clk_core_init_rate_req() from clk_core_round_rate_nolock() to its caller Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 18/28] clk: Introduce clk_hw_init_rate_request() Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 19/28] clk: Add our request boundaries in clk_core_init_rate_req Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 20/28] clk: Switch from __clk_determine_rate to clk_core_round_rate_nolock Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 21/28] clk: Introduce clk_core_has_parent() Maxime Ripard
2022-06-29  9:11   ` Stephen Boyd
2022-05-16 13:25 ` [PATCH v5 22/28] clk: Stop forwarding clk_rate_requests to the parent Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 23/28] clk: Zero the clk_rate_request structure Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 24/28] clk: Test the clock pointer in clk_hw_get_name() Maxime Ripard
2022-06-29  9:13   ` Stephen Boyd
2022-06-29  9:39     ` Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 25/28] clk: Introduce the clk_hw_get_rate_range function Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 26/28] clk: qcom: clk-rcg2: Take clock boundaries into consideration for gfx3d Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 27/28] clk: tests: Add some tests for clk_get_rate_range() Maxime Ripard
2022-05-16 13:25 ` [PATCH v5 28/28] clk: tests: Add missing test case for ranges Maxime Ripard

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