From: "Víctor Colombo" <victor.colombo@eldorado.org.br>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: clg@kaod.org, danielhb413@gmail.com, david@gibson.dropbear.id.au,
groug@kaod.org, richard.henderson@linaro.org,
victor.colombo@eldorado.org.br
Subject: [PATCH RESEND 06/10] target/ppc: Implement mffscdrn[i] instructions
Date: Tue, 17 May 2022 13:47:40 -0300 [thread overview]
Message-ID: <20220517164744.58131-7-victor.colombo@eldorado.org.br> (raw)
In-Reply-To: <20220517164744.58131-1-victor.colombo@eldorado.org.br>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
---
target/ppc/insn32.decode | 5 +++++
target/ppc/translate/fp-impl.c.inc | 35 ++++++++++++++++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 682990b7f0..a3e87a0867 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -130,6 +130,9 @@
&X_imm2 rt imm
@X_imm2 ...... rt:5 ..... ... imm:2 .......... . &X_imm2
+&X_imm3 rt imm
+@X_imm3 ...... rt:5 ..... .. imm:3 .......... . &X_imm3
+
%x_xt 0:1 21:5
&X_imm5 xt imm:uint8_t vrb
@X_imm5 ...... ..... imm:5 vrb:5 .......... . &X_imm5 xt=%x_xt
@@ -330,7 +333,9 @@ MFFS 111111 ..... 00000 ----- 1001000111 . @X_t_rc
MFFSL 111111 ..... 11000 ----- 1001000111 - @X_t
MFFSCE 111111 ..... 00001 ----- 1001000111 - @X_t
MFFSCRN 111111 ..... 10110 ..... 1001000111 - @X_tb
+MFFSCDRN 111111 ..... 10100 ..... 1001000111 - @X_tb
MFFSCRNI 111111 ..... 10111 ---.. 1001000111 - @X_imm2
+MFFSCDRNI 111111 ..... 10101 --... 1001000111 - @X_imm3
### Decimal Floating-Point Arithmetic Instructions
diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc
index b294e286fb..32ddad49f5 100644
--- a/target/ppc/translate/fp-impl.c.inc
+++ b/target/ppc/translate/fp-impl.c.inc
@@ -679,6 +679,41 @@ static bool trans_MFFSCRNI(DisasContext *ctx, arg_X_imm2 *a)
return true;
}
+static bool trans_MFFSCDRN(DisasContext *ctx, arg_X_tb *a)
+{
+ TCGv_i64 t1;
+
+ REQUIRE_INSNS_FLAGS2(ctx, ISA300);
+ REQUIRE_FPU(ctx);
+
+ t1 = tcg_temp_new_i64();
+ get_fpr(t1, a->rb);
+ tcg_gen_andi_i64(t1, t1, FP_DRN);
+
+ do_mffsc(a->rt, t1, FP_DRN | FP_ENABLES | FP_NI | FP_RN, ~FP_DRN, 0x0100);
+
+ tcg_temp_free_i64(t1);
+
+ return true;
+}
+
+static bool trans_MFFSCDRNI(DisasContext *ctx, arg_X_imm3 *a)
+{
+ TCGv_i64 t1;
+
+ REQUIRE_INSNS_FLAGS2(ctx, ISA300);
+ REQUIRE_FPU(ctx);
+
+ t1 = tcg_temp_new_i64();
+ tcg_gen_movi_i64(t1, (uint64_t)a->imm << FPSCR_DRN0);
+
+ do_mffsc(a->rt, t1, FP_DRN | FP_ENABLES | FP_NI | FP_RN, ~FP_DRN, 0x0100);
+
+ tcg_temp_free_i64(t1);
+
+ return true;
+}
+
/* mtfsb0 */
static void gen_mtfsb0(DisasContext *ctx)
{
--
2.25.1
next prev parent reply other threads:[~2022-05-17 17:02 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-17 16:47 [PATCH RESEND 00/10] BCDA and mffscdrn implementations Víctor Colombo
2022-05-17 16:47 ` [PATCH RESEND 01/10] target/ppc: Fix insn32.decode style issues Víctor Colombo
2022-05-17 18:25 ` Richard Henderson
2022-05-17 16:47 ` [PATCH RESEND 02/10] target/ppc: Move mffs[.] to decodetree Víctor Colombo
2022-05-17 18:30 ` Richard Henderson
2022-05-17 16:47 ` [PATCH RESEND 03/10] target/ppc: Move mffsl " Víctor Colombo
2022-05-17 18:30 ` Richard Henderson
2022-05-17 18:45 ` Richard Henderson
2022-05-17 16:47 ` [PATCH RESEND 04/10] target/ppc: Move mffsce " Víctor Colombo
2022-05-17 18:49 ` Richard Henderson
2022-05-17 16:47 ` [PATCH RESEND 05/10] target/ppc: Move mffscrn[i] " Víctor Colombo
2022-05-17 16:47 ` Víctor Colombo [this message]
2022-05-17 18:52 ` [PATCH RESEND 06/10] target/ppc: Implement mffscdrn[i] instructions Richard Henderson
2022-05-17 16:47 ` [PATCH RESEND 07/10] target/ppc: Add flag for ISA v2.06 BCDA instructions Víctor Colombo
2022-05-17 18:54 ` Richard Henderson
2022-05-17 16:47 ` [PATCH RESEND 08/10] target/ppc: implement addg6s Víctor Colombo
2022-05-17 19:05 ` Richard Henderson
2022-05-17 16:47 ` [PATCH RESEND 09/10] target/ppc: implement cbcdtd Víctor Colombo
2022-05-17 19:10 ` Richard Henderson
2022-05-17 16:47 ` [PATCH RESEND 10/10] target/ppc: implement cdtbcd Víctor Colombo
2022-05-17 19:12 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220517164744.58131-7-victor.colombo@eldorado.org.br \
--to=victor.colombo@eldorado.org.br \
--cc=clg@kaod.org \
--cc=danielhb413@gmail.com \
--cc=david@gibson.dropbear.id.au \
--cc=groug@kaod.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.