* [PATCH v2 0/6] arm64/sysreg: More system register generation
@ 2022-05-20 16:16 Mark Brown
2022-05-20 16:16 ` [PATCH v2 1/6] arm64/sysreg: Generate definitions for CLIDR_EL1 Mark Brown
` (6 more replies)
0 siblings, 7 replies; 9+ messages in thread
From: Mark Brown @ 2022-05-20 16:16 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Rutland, linux-arm-kernel, Mark Brown
This series does a bunch more conversions of system registers to be
generated, all trivial ones that don't require anything other than the
conversions themselves.
v2:
- Drop CCSIDR_EL1, CTR_EL0 and DCZID as they had macros referring to
fields I hadn't found that make them non-trivial.
- Various minor and typographical updates.
Mark Brown (6):
arm64/sysreg: Generate definitions for CLIDR_EL1
arm64/sysreg: Generate definitions for CONTEXTIDR_ELx
arm64/sysreg: Generate definitions for CPACR_ELx
arm64/sysreg: Generate definitions for CSSELR_EL1
arm64/sysreg: Generate definitions for DACR32_EL2
arm64/sysreg: Generate definitions for FAR_ELx
arch/arm64/include/asm/sysreg.h | 11 ----
arch/arm64/tools/sysreg | 92 +++++++++++++++++++++++++++++++++
2 files changed, 92 insertions(+), 11 deletions(-)
base-commit: bded719c642f254b5e453bf65e34fdf7f1af07e5
--
2.30.2
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 1/6] arm64/sysreg: Generate definitions for CLIDR_EL1
2022-05-20 16:16 [PATCH v2 0/6] arm64/sysreg: More system register generation Mark Brown
@ 2022-05-20 16:16 ` Mark Brown
2022-05-20 16:16 ` [PATCH v2 2/6] arm64/sysreg: Generate definitions for CONTEXTIDR_ELx Mark Brown
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Mark Brown @ 2022-05-20 16:16 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Rutland, linux-arm-kernel, Mark Brown
Convert CLIDR_EL1 to be automatically generated with definition as per
DDI0487H.a. No functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
---
arch/arm64/include/asm/sysreg.h | 1 -
arch/arm64/tools/sysreg | 16 ++++++++++++++++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 91e4f8601393..0cea8bdb792f 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -457,7 +457,6 @@
#define SYS_CNTKCTL_EL1 sys_reg(3, 0, 14, 1, 0)
#define SYS_CCSIDR_EL1 sys_reg(3, 1, 0, 0, 0)
-#define SYS_CLIDR_EL1 sys_reg(3, 1, 0, 0, 1)
#define SYS_GMID_EL1 sys_reg(3, 1, 0, 0, 4)
#define SYS_AIDR_EL1 sys_reg(3, 1, 0, 0, 7)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a236d7a821b4..0067d07f9125 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -212,6 +212,22 @@ Sysreg SMCR_EL1 3 0 1 2 6
Fields SMCR_ELx
EndSysreg
+Sysreg CLIDR_EL1 3 1 0 0 1
+Res0 63:47
+Field 46:33 Ttypen
+Field 32:30 ICB
+Field 29:27 LoUU
+Field 26:24 LoC
+Field 23:21 LoUIS
+Field 20:18 Ctype7
+Field 17:15 Ctype6
+Field 14:12 Ctype5
+Field 11:9 Ctype4
+Field 8:6 Ctype3
+Field 5:3 Ctype2
+Field 2:0 Ctype1
+EndSysreg
+
Sysreg SMIDR_EL1 3 1 0 0 6
Res0 63:32
Field 31:24 IMPLEMENTER
--
2.30.2
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 2/6] arm64/sysreg: Generate definitions for CONTEXTIDR_ELx
2022-05-20 16:16 [PATCH v2 0/6] arm64/sysreg: More system register generation Mark Brown
2022-05-20 16:16 ` [PATCH v2 1/6] arm64/sysreg: Generate definitions for CLIDR_EL1 Mark Brown
@ 2022-05-20 16:16 ` Mark Brown
2022-05-20 16:16 ` [PATCH v2 3/6] arm64/sysreg: Generate definitions for CPACR_ELx Mark Brown
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Mark Brown @ 2022-05-20 16:16 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Rutland, linux-arm-kernel, Mark Brown
Convert the various CONTEXTIDR_ELx register definitions to be automatically
generated following the definitions in DDI0487H.a. No functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
---
arch/arm64/include/asm/sysreg.h | 2 --
arch/arm64/tools/sysreg | 17 +++++++++++++++++
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 0cea8bdb792f..4fd64e6ec407 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -449,7 +449,6 @@
#define SYS_ICC_IGRPEN0_EL1 sys_reg(3, 0, 12, 12, 6)
#define SYS_ICC_IGRPEN1_EL1 sys_reg(3, 0, 12, 12, 7)
-#define SYS_CONTEXTIDR_EL1 sys_reg(3, 0, 13, 0, 1)
#define SYS_TPIDR_EL1 sys_reg(3, 0, 13, 0, 4)
#define SYS_SCXTNUM_EL1 sys_reg(3, 0, 13, 0, 7)
@@ -629,7 +628,6 @@
#define SYS_MAIR_EL12 sys_reg(3, 5, 10, 2, 0)
#define SYS_AMAIR_EL12 sys_reg(3, 5, 10, 3, 0)
#define SYS_VBAR_EL12 sys_reg(3, 5, 12, 0, 0)
-#define SYS_CONTEXTIDR_EL12 sys_reg(3, 5, 13, 0, 1)
#define SYS_CNTKCTL_EL12 sys_reg(3, 5, 14, 1, 0)
#define SYS_CNTP_TVAL_EL02 sys_reg(3, 5, 14, 2, 0)
#define SYS_CNTP_CTL_EL02 sys_reg(3, 5, 14, 2, 1)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 0067d07f9125..b2e01e108b8e 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -212,6 +212,15 @@ Sysreg SMCR_EL1 3 0 1 2 6
Fields SMCR_ELx
EndSysreg
+SysregFields CONTEXTIDR_ELx
+Res0 63:32
+Field 31:0 PROCID
+EndSysregFields
+
+Sysreg CONTEXTIDR_EL1 3 0 13 0 1
+Fields CONTEXTIDR_ELx
+EndSysreg
+
Sysreg CLIDR_EL1 3 1 0 0 1
Res0 63:47
Field 46:33 Ttypen
@@ -270,6 +279,10 @@ Sysreg SMCR_EL2 3 4 1 2 6
Fields SMCR_ELx
EndSysreg
+Sysreg CONTEXTIDR_EL2 3 4 13 0 1
+Fields CONTEXTIDR_ELx
+EndSysreg
+
Sysreg ZCR_EL12 3 5 1 2 0
Fields ZCR_ELx
EndSysreg
@@ -278,6 +291,10 @@ Sysreg SMCR_EL12 3 5 1 2 6
Fields SMCR_ELx
EndSysreg
+Sysreg CONTEXTIDR_EL12 3 5 13 0 1
+Fields CONTEXTIDR_ELx
+EndSysreg
+
SysregFields TTBRx_EL1
Field 63:48 ASID
Field 47:1 BADDR
--
2.30.2
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 3/6] arm64/sysreg: Generate definitions for CPACR_ELx
2022-05-20 16:16 [PATCH v2 0/6] arm64/sysreg: More system register generation Mark Brown
2022-05-20 16:16 ` [PATCH v2 1/6] arm64/sysreg: Generate definitions for CLIDR_EL1 Mark Brown
2022-05-20 16:16 ` [PATCH v2 2/6] arm64/sysreg: Generate definitions for CONTEXTIDR_ELx Mark Brown
@ 2022-05-20 16:16 ` Mark Brown
2022-05-20 16:30 ` Mark Rutland
2022-05-20 16:16 ` [PATCH v2 4/6] arm64/sysreg: Generate definitions for CSSELR_EL1 Mark Brown
` (3 subsequent siblings)
6 siblings, 1 reply; 9+ messages in thread
From: Mark Brown @ 2022-05-20 16:16 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Rutland, linux-arm-kernel, Mark Brown
Convert the CPACR system register definitions to be automatically generated
using the definitions in DDI0487H.a. The kernel does have some additional
definitions for subfields of SMEN, FPEN and ZEN which are not identified as
distinct subfields in the architecture so the definitions are not updated
as part of this patch.
No functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 2 --
arch/arm64/tools/sysreg | 20 ++++++++++++++++++++
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 4fd64e6ec407..7603c3344697 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -209,7 +209,6 @@
#define SYS_ID_AA64MMFR2_EL1 sys_reg(3, 0, 0, 7, 2)
#define SYS_ACTLR_EL1 sys_reg(3, 0, 1, 0, 1)
-#define SYS_CPACR_EL1 sys_reg(3, 0, 1, 0, 2)
#define SYS_RGSR_EL1 sys_reg(3, 0, 1, 0, 5)
#define SYS_GCR_EL1 sys_reg(3, 0, 1, 0, 6)
@@ -614,7 +613,6 @@
/* VHE encodings for architectural EL0/1 system registers */
#define SYS_SCTLR_EL12 sys_reg(3, 5, 1, 0, 0)
-#define SYS_CPACR_EL12 sys_reg(3, 5, 1, 0, 2)
#define SYS_TTBR0_EL12 sys_reg(3, 5, 2, 0, 0)
#define SYS_TTBR1_EL12 sys_reg(3, 5, 2, 0, 1)
#define SYS_TCR_EL12 sys_reg(3, 5, 2, 0, 2)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index b2e01e108b8e..4bf413770b65 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -185,6 +185,22 @@ Field 1 A
Field 0 M
EndSysreg
+SysregFields CPACR_ELx
+Res0 63:29
+Field 28 TTA
+Res0 27:26
+Field 25:24 SMEN
+Res0 23:22
+Field 21:20 FPEN
+Res0 19:18
+Field 17:16 ZEN
+Res0 15:0
+EndSysregFields
+
+Sysreg CPACR_EL1 3 0 1 0 2
+Fields CPACR_ELx
+EndSysreg
+
Sysreg SMPRI_EL1 3 0 1 2 4
Res0 63:4
Field 3:0 PRIORITY
@@ -283,6 +299,10 @@ Sysreg CONTEXTIDR_EL2 3 4 13 0 1
Fields CONTEXTIDR_ELx
EndSysreg
+Sysreg CPACR_EL12 3 5 1 0 2
+Fields CPACR_ELx
+EndSysreg
+
Sysreg ZCR_EL12 3 5 1 2 0
Fields ZCR_ELx
EndSysreg
--
2.30.2
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 4/6] arm64/sysreg: Generate definitions for CSSELR_EL1
2022-05-20 16:16 [PATCH v2 0/6] arm64/sysreg: More system register generation Mark Brown
` (2 preceding siblings ...)
2022-05-20 16:16 ` [PATCH v2 3/6] arm64/sysreg: Generate definitions for CPACR_ELx Mark Brown
@ 2022-05-20 16:16 ` Mark Brown
2022-05-20 16:16 ` [PATCH v2 5/6] arm64/sysreg: Generate definitions for DACR32_EL2 Mark Brown
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Mark Brown @ 2022-05-20 16:16 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Rutland, linux-arm-kernel, Mark Brown
Convert CSSELR_EL1 to automatic generation as per DDI0487H.a, no functional
change.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
---
arch/arm64/include/asm/sysreg.h | 2 --
arch/arm64/tools/sysreg | 7 +++++++
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 7603c3344697..d1ca7f11e110 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -462,8 +462,6 @@
#define SMIDR_EL1_SMPS_SHIFT 15
#define SMIDR_EL1_AFFINITY_SHIFT 0
-#define SYS_CSSELR_EL1 sys_reg(3, 2, 0, 0, 0)
-
#define SYS_CTR_EL0 sys_reg(3, 3, 0, 0, 1)
#define SYS_DCZID_EL0 sys_reg(3, 3, 0, 0, 7)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 4bf413770b65..759075747dcc 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -262,6 +262,13 @@ Res0 14:12
Field 11:0 AFFINITY
EndSysreg
+Sysreg CSSELR_EL1 3 2 0 0 0
+Res0 63:5
+Field 4 TnD
+Field 3:1 Level
+Field 0 InD
+EndSysreg
+
Sysreg SVCR 3 3 4 2 2
Res0 63:2
Field 1 ZA
--
2.30.2
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 5/6] arm64/sysreg: Generate definitions for DACR32_EL2
2022-05-20 16:16 [PATCH v2 0/6] arm64/sysreg: More system register generation Mark Brown
` (3 preceding siblings ...)
2022-05-20 16:16 ` [PATCH v2 4/6] arm64/sysreg: Generate definitions for CSSELR_EL1 Mark Brown
@ 2022-05-20 16:16 ` Mark Brown
2022-05-20 16:16 ` [PATCH v2 6/6] arm64/sysreg: Generate definitions for FAR_ELx Mark Brown
2022-05-20 17:56 ` [PATCH v2 0/6] arm64/sysreg: More system register generation Catalin Marinas
6 siblings, 0 replies; 9+ messages in thread
From: Mark Brown @ 2022-05-20 16:16 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Rutland, linux-arm-kernel, Mark Brown
Convert DACR32_EL2 to automatic register generation as per DDI0487H.a, no
functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
---
arch/arm64/include/asm/sysreg.h | 1 -
arch/arm64/tools/sysreg | 20 ++++++++++++++++++++
2 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index d1ca7f11e110..c9d2d2a3dd68 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -554,7 +554,6 @@
#define SYS_HFGITR_EL2 sys_reg(3, 4, 1, 1, 6)
#define SYS_TRFCR_EL2 sys_reg(3, 4, 1, 2, 1)
#define SYS_HCRX_EL2 sys_reg(3, 4, 1, 2, 2)
-#define SYS_DACR32_EL2 sys_reg(3, 4, 3, 0, 0)
#define SYS_HDFGRTR_EL2 sys_reg(3, 4, 3, 1, 4)
#define SYS_HDFGWTR_EL2 sys_reg(3, 4, 3, 1, 5)
#define SYS_HAFGRTR_EL2 sys_reg(3, 4, 3, 1, 6)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 759075747dcc..af21acbb542d 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -302,6 +302,26 @@ Sysreg SMCR_EL2 3 4 1 2 6
Fields SMCR_ELx
EndSysreg
+Sysreg DACR32_EL2 3 4 3 0 0
+Res0 63:32
+Field 31:30 D15
+Field 29:28 D14
+Field 27:26 D13
+Field 25:24 D12
+Field 23:22 D11
+Field 21:20 D10
+Field 19:18 D9
+Field 17:16 D8
+Field 15:14 D7
+Field 13:12 D6
+Field 11:10 D5
+Field 9:8 D4
+Field 7:6 D3
+Field 5:4 D2
+Field 3:2 D1
+Field 1:0 D0
+EndSysreg
+
Sysreg CONTEXTIDR_EL2 3 4 13 0 1
Fields CONTEXTIDR_ELx
EndSysreg
--
2.30.2
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 6/6] arm64/sysreg: Generate definitions for FAR_ELx
2022-05-20 16:16 [PATCH v2 0/6] arm64/sysreg: More system register generation Mark Brown
` (4 preceding siblings ...)
2022-05-20 16:16 ` [PATCH v2 5/6] arm64/sysreg: Generate definitions for DACR32_EL2 Mark Brown
@ 2022-05-20 16:16 ` Mark Brown
2022-05-20 17:56 ` [PATCH v2 0/6] arm64/sysreg: More system register generation Catalin Marinas
6 siblings, 0 replies; 9+ messages in thread
From: Mark Brown @ 2022-05-20 16:16 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Rutland, linux-arm-kernel, Mark Brown
Convert FAR_ELx to automatic register generation as per DDI0487H.a. In the
architecture these registers have a single field "named" as "Faulting
Virtual Address for synchronous exceptions taken to ELx" occupying the
entire register, in order to fit in with the requirement to describe the
contents of the register I have created a single field named ADDR.
No functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
---
arch/arm64/include/asm/sysreg.h | 3 ---
arch/arm64/tools/sysreg | 12 ++++++++++++
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index c9d2d2a3dd68..55f998c3dc28 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -249,7 +249,6 @@
#define SYS_TFSR_EL1 sys_reg(3, 0, 5, 6, 0)
#define SYS_TFSRE0_EL1 sys_reg(3, 0, 5, 6, 1)
-#define SYS_FAR_EL1 sys_reg(3, 0, 6, 0, 0)
#define SYS_PAR_EL1 sys_reg(3, 0, 7, 4, 0)
#define SYS_PAR_EL1_F BIT(0)
@@ -564,7 +563,6 @@
#define SYS_VSESR_EL2 sys_reg(3, 4, 5, 2, 3)
#define SYS_FPEXC32_EL2 sys_reg(3, 4, 5, 3, 0)
#define SYS_TFSR_EL2 sys_reg(3, 4, 5, 6, 0)
-#define SYS_FAR_EL2 sys_reg(3, 4, 6, 0, 0)
#define SYS_VDISR_EL2 sys_reg(3, 4, 12, 1, 1)
#define __SYS__AP0Rx_EL2(x) sys_reg(3, 4, 12, 8, x)
@@ -619,7 +617,6 @@
#define SYS_AFSR1_EL12 sys_reg(3, 5, 5, 1, 1)
#define SYS_ESR_EL12 sys_reg(3, 5, 5, 2, 0)
#define SYS_TFSR_EL12 sys_reg(3, 5, 5, 6, 0)
-#define SYS_FAR_EL12 sys_reg(3, 5, 6, 0, 0)
#define SYS_MAIR_EL12 sys_reg(3, 5, 10, 2, 0)
#define SYS_AMAIR_EL12 sys_reg(3, 5, 10, 3, 0)
#define SYS_VBAR_EL12 sys_reg(3, 5, 12, 0, 0)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index af21acbb542d..ff5e552f7420 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -228,6 +228,10 @@ Sysreg SMCR_EL1 3 0 1 2 6
Fields SMCR_ELx
EndSysreg
+Sysreg FAR_EL1 3 0 6 0 0
+Field 63:0 ADDR
+EndSysreg
+
SysregFields CONTEXTIDR_ELx
Res0 63:32
Field 31:0 PROCID
@@ -322,6 +326,10 @@ Field 3:2 D1
Field 1:0 D0
EndSysreg
+Sysreg FAR_EL2 3 4 6 0 0
+Field 63:0 ADDR
+EndSysreg
+
Sysreg CONTEXTIDR_EL2 3 4 13 0 1
Fields CONTEXTIDR_ELx
EndSysreg
@@ -338,6 +346,10 @@ Sysreg SMCR_EL12 3 5 1 2 6
Fields SMCR_ELx
EndSysreg
+Sysreg FAR_EL12 3 5 6 0 0
+Field 63:0 ADDR
+EndSysreg
+
Sysreg CONTEXTIDR_EL12 3 5 13 0 1
Fields CONTEXTIDR_ELx
EndSysreg
--
2.30.2
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v2 3/6] arm64/sysreg: Generate definitions for CPACR_ELx
2022-05-20 16:16 ` [PATCH v2 3/6] arm64/sysreg: Generate definitions for CPACR_ELx Mark Brown
@ 2022-05-20 16:30 ` Mark Rutland
0 siblings, 0 replies; 9+ messages in thread
From: Mark Rutland @ 2022-05-20 16:30 UTC (permalink / raw)
To: Mark Brown; +Cc: Catalin Marinas, Will Deacon, linux-arm-kernel
On Fri, May 20, 2022 at 05:16:35PM +0100, Mark Brown wrote:
> Convert the CPACR system register definitions to be automatically generated
> using the definitions in DDI0487H.a. The kernel does have some additional
> definitions for subfields of SMEN, FPEN and ZEN which are not identified as
> distinct subfields in the architecture so the definitions are not updated
> as part of this patch.
>
> No functional change.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
I do think that in future we may want to define enumerated values for the
FPEN/ZEN/SMEN fields, but with that aside, all the values appear to be correct,
so for this as-as:
Reviewed-by: Mark Rutland Mark.rutland@arm.com>
Mark.
> ---
> arch/arm64/include/asm/sysreg.h | 2 --
> arch/arm64/tools/sysreg | 20 ++++++++++++++++++++
> 2 files changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 4fd64e6ec407..7603c3344697 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -209,7 +209,6 @@
> #define SYS_ID_AA64MMFR2_EL1 sys_reg(3, 0, 0, 7, 2)
>
> #define SYS_ACTLR_EL1 sys_reg(3, 0, 1, 0, 1)
> -#define SYS_CPACR_EL1 sys_reg(3, 0, 1, 0, 2)
> #define SYS_RGSR_EL1 sys_reg(3, 0, 1, 0, 5)
> #define SYS_GCR_EL1 sys_reg(3, 0, 1, 0, 6)
>
> @@ -614,7 +613,6 @@
>
> /* VHE encodings for architectural EL0/1 system registers */
> #define SYS_SCTLR_EL12 sys_reg(3, 5, 1, 0, 0)
> -#define SYS_CPACR_EL12 sys_reg(3, 5, 1, 0, 2)
> #define SYS_TTBR0_EL12 sys_reg(3, 5, 2, 0, 0)
> #define SYS_TTBR1_EL12 sys_reg(3, 5, 2, 0, 1)
> #define SYS_TCR_EL12 sys_reg(3, 5, 2, 0, 2)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index b2e01e108b8e..4bf413770b65 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -185,6 +185,22 @@ Field 1 A
> Field 0 M
> EndSysreg
>
> +SysregFields CPACR_ELx
> +Res0 63:29
> +Field 28 TTA
> +Res0 27:26
> +Field 25:24 SMEN
> +Res0 23:22
> +Field 21:20 FPEN
> +Res0 19:18
> +Field 17:16 ZEN
> +Res0 15:0
> +EndSysregFields
> +
> +Sysreg CPACR_EL1 3 0 1 0 2
> +Fields CPACR_ELx
> +EndSysreg
> +
> Sysreg SMPRI_EL1 3 0 1 2 4
> Res0 63:4
> Field 3:0 PRIORITY
> @@ -283,6 +299,10 @@ Sysreg CONTEXTIDR_EL2 3 4 13 0 1
> Fields CONTEXTIDR_ELx
> EndSysreg
>
> +Sysreg CPACR_EL12 3 5 1 0 2
> +Fields CPACR_ELx
> +EndSysreg
> +
> Sysreg ZCR_EL12 3 5 1 2 0
> Fields ZCR_ELx
> EndSysreg
> --
> 2.30.2
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 0/6] arm64/sysreg: More system register generation
2022-05-20 16:16 [PATCH v2 0/6] arm64/sysreg: More system register generation Mark Brown
` (5 preceding siblings ...)
2022-05-20 16:16 ` [PATCH v2 6/6] arm64/sysreg: Generate definitions for FAR_ELx Mark Brown
@ 2022-05-20 17:56 ` Catalin Marinas
6 siblings, 0 replies; 9+ messages in thread
From: Catalin Marinas @ 2022-05-20 17:56 UTC (permalink / raw)
To: Mark Brown, Will Deacon; +Cc: Mark Rutland, linux-arm-kernel
On Fri, 20 May 2022 17:16:32 +0100, Mark Brown wrote:
> This series does a bunch more conversions of system registers to be
> generated, all trivial ones that don't require anything other than the
> conversions themselves.
>
> v2:
> - Drop CCSIDR_EL1, CTR_EL0 and DCZID as they had macros referring to
> fields I hadn't found that make them non-trivial.
> - Various minor and typographical updates.
>
> [...]
Applied to arm64 (for-next/sysreg-gen), thanks!
[1/6] arm64/sysreg: Generate definitions for CLIDR_EL1
https://git.kernel.org/arm64/c/af65ea977bb8
[2/6] arm64/sysreg: Generate definitions for CONTEXTIDR_ELx
https://git.kernel.org/arm64/c/8c12e22c9f88
[3/6] arm64/sysreg: Generate definitions for CPACR_ELx
https://git.kernel.org/arm64/c/b5c0f1051dc3
[4/6] arm64/sysreg: Generate definitions for CSSELR_EL1
https://git.kernel.org/arm64/c/8bd354b30533
[5/6] arm64/sysreg: Generate definitions for DACR32_EL2
https://git.kernel.org/arm64/c/01baa57ad686
[6/6] arm64/sysreg: Generate definitions for FAR_ELx
https://git.kernel.org/arm64/c/dffdeade1843
--
Catalin
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2022-05-20 17:58 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-20 16:16 [PATCH v2 0/6] arm64/sysreg: More system register generation Mark Brown
2022-05-20 16:16 ` [PATCH v2 1/6] arm64/sysreg: Generate definitions for CLIDR_EL1 Mark Brown
2022-05-20 16:16 ` [PATCH v2 2/6] arm64/sysreg: Generate definitions for CONTEXTIDR_ELx Mark Brown
2022-05-20 16:16 ` [PATCH v2 3/6] arm64/sysreg: Generate definitions for CPACR_ELx Mark Brown
2022-05-20 16:30 ` Mark Rutland
2022-05-20 16:16 ` [PATCH v2 4/6] arm64/sysreg: Generate definitions for CSSELR_EL1 Mark Brown
2022-05-20 16:16 ` [PATCH v2 5/6] arm64/sysreg: Generate definitions for DACR32_EL2 Mark Brown
2022-05-20 16:16 ` [PATCH v2 6/6] arm64/sysreg: Generate definitions for FAR_ELx Mark Brown
2022-05-20 17:56 ` [PATCH v2 0/6] arm64/sysreg: More system register generation Catalin Marinas
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