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* [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support
@ 2022-05-21 15:20 Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Dmitry Baryshkov
                   ` (10 more replies)
  0 siblings, 11 replies; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree

This work is largely based on the previous work by Bjorn Andersson ([1])

Changes since v5:
- Drop icc patch, as there are questions whether the original paths are
  valid. It will be submitted separately.

Changes since v4:
- Remove unused mdp and sd-card-det-n DT nodes from the ifc6560 dts
  (thanks to Konrad).

Changes since v3 (most points based on review by Marijn):
- Fixed a typo in dsi0 patch
- Fixed indentation here and there
- Renamed qusb2phy to qusb2phy0 to play better with qusb2phy1
- Fixed the ICC path for the GPU
- Fixed sdhc2 pinconf for sdm636-sony-xperia-ganges-mermaid
- Moved SDHC2 card detect gpio pin to board files

Changes since v2:
- Removed useless enablement of mdp node from the board file. It is
  already enabled in the SoC dtsi file.

Changes since v1 (mostly based on Kondrad's review):
- Also disabled dsi0/dsi0 phy in sdm630.dtsi
- Removed the clock from BAM DMA devices rather than disabling them
  completely
- Replaced numbers with symbolic names for interconnects in sdm630.dtsi
- Switched to "qcom,sda660" as a fallback compatible string
- Added dt-bindings for the qcom,sda660 compat
- Removed extra nesting level from the adsp firmware path
- Replaced numbers with proper symbolic names in the board file
- Added chassis-type property
- Changed the order of blsp entries in the board file
- Removed spurious newlines
- Changed the order of regulator properties
- Changed the DSI data-lines to list all four lanes. Still use just
  three lanes for the adv bridge (and describe the reason in the
  comment)

Changes since Bjorn's v2:
- Disable dsi1, dsi1 phy, GPU by default in sdm660.dtsi/sdm630.dtsi
- Fix qusb2phy ref clock
- Added USB2 host support to sdm630.dtsi
- Renamed DTS to follow SoC-vendor-board pattern
- Fixed vph_pwr voltage
- Removed extra/unrelated comments
- Added keys, USB2, USB3,
- Added configuration for the attached HDMI bridge
- Enabled MDP, MDSS and DSI0/DSI0 PHY devices
- Removed uart pinctrl and /reserved-mem nodes (present in main dtsi
  file)
- Added card detection for the SDCC2
- Disabled BLSP BAM DMA devices, they make the board reset during boot

[1] https://lore.kernel.org/linux-arm-msm/20210825221110.1498718-1-bjorn.andersson@linaro.org/#t


Dmitry Baryshkov (11):
  arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default
  arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default
  arm64: dts: qcom: sdm630: disable GPU by default
  arm64: dts: qcom: sdm630: fix the qusb2phy ref clock
  arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0
  arm64: dts: qcom: sdm630: add second (HS) USB host support
  arm64: dts: qcom: sdm630: fix gpu's interconnect path
  arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2
    pinconf
  arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board
    files
  arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support
  dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board

 .../devicetree/bindings/arm/qcom.yaml         |   6 +
 arch/arm64/boot/dts/qcom/Makefile             |   1 +
 .../boot/dts/qcom/sda660-inforce-ifc6560.dts  | 461 ++++++++++++++++++
 .../dts/qcom/sdm630-sony-xperia-nile.dtsi     |  18 +-
 arch/arm64/boot/dts/qcom/sdm630.dtsi          |  81 ++-
 .../sdm636-sony-xperia-ganges-mermaid.dts     |   2 +-
 .../boot/dts/qcom/sdm660-xiaomi-lavender.dts  |  18 +-
 arch/arm64/boot/dts/qcom/sdm660.dtsi          |   3 +
 8 files changed, 571 insertions(+), 19 deletions(-)
 create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts

-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 16:06   ` Marijn Suijten
  2022-05-21 15:20 ` [PATCH v6 02/11] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy " Dmitry Baryshkov
                   ` (9 subsequent siblings)
  10 siblings, 1 reply; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Marijn Suijten, Konrad Dybcio

Follow the typical practice and keep DSI0/DSI0 PHY disabled by default.
They should be enabled in the board DT files. No existing boards use
them at this moment.

Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 240293592ef9..8697d40e9b74 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1559,6 +1559,8 @@ dsi0: dsi@c994000 {
 				phys = <&dsi0_phy>;
 				phy-names = "dsi";
 
+				status = "disabled";
+
 				ports {
 					#address-cells = <1>;
 					#size-cells = <0>;
@@ -1592,6 +1594,7 @@ dsi0_phy: dsi-phy@c994400 {
 
 				clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>;
 				clock-names = "iface", "ref";
+				status = "disabled";
 			};
 		};
 
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 02/11] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 03/11] arm64: dts: qcom: sdm630: disable GPU " Dmitry Baryshkov
                   ` (8 subsequent siblings)
  10 siblings, 0 replies; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Marijn Suijten, Konrad Dybcio

Follow the typical practice and keep DSI1/DSI1 PHY disabled by default.
They should be enabled in the board DT files. No existing boards use
them at this moment.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm660.dtsi b/arch/arm64/boot/dts/qcom/sdm660.dtsi
index eccf6fde16b4..023b0ac4118c 100644
--- a/arch/arm64/boot/dts/qcom/sdm660.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm660.dtsi
@@ -192,6 +192,8 @@ dsi1: dsi@c996000 {
 		phys = <&dsi1_phy>;
 		phy-names = "dsi";
 
+		status = "disabled";
+
 		ports {
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -225,6 +227,7 @@ dsi1_phy: dsi-phy@c996400 {
 
 		clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
 		clock-names = "iface", "ref";
+		status = "disabled";
 	};
 };
 
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 03/11] arm64: dts: qcom: sdm630: disable GPU by default
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 02/11] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy " Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 04/11] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock Dmitry Baryshkov
                   ` (7 subsequent siblings)
  10 siblings, 0 replies; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Konrad Dybcio, Marijn Suijten

The SoC's device tree file disables gpucc and adreno's SMMU by default.
So let's disable the GPU too. Moreover it looks like SMMU might be not
usable without additional patches (which means that GPU is unusable
too). No board uses GPU at this moment.

Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration")
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 8697d40e9b74..e8bb170e8b2f 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1050,6 +1050,8 @@ adreno_gpu: gpu@5000000 {
 
 			operating-points-v2 = <&gpu_sdm630_opp_table>;
 
+			status = "disabled";
+
 			gpu_sdm630_opp_table: opp-table {
 				compatible  = "operating-points-v2";
 				opp-775000000 {
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 04/11] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
                   ` (2 preceding siblings ...)
  2022-05-21 15:20 ` [PATCH v6 03/11] arm64: dts: qcom: sdm630: disable GPU " Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 05/11] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 Dmitry Baryshkov
                   ` (6 subsequent siblings)
  10 siblings, 0 replies; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Konrad Dybcio, Marijn Suijten

According to the downstram DT file, the qusb2phy ref clock should be
GCC_RX0_USB2_CLKREF_CLK, not GCC_RX1_USB2_CLKREF_CLK.

Fixes: c65a4ed2ea8b ("arm64: dts: qcom: sdm630: Add USB configuration")
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index e8bb170e8b2f..5be0ec06ed86 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1262,7 +1262,7 @@ qusb2phy: phy@c012000 {
 			#phy-cells = <0>;
 
 			clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
-				<&gcc GCC_RX1_USB2_CLKREF_CLK>;
+				 <&gcc GCC_RX0_USB2_CLKREF_CLK>;
 			clock-names = "cfg_ahb", "ref";
 
 			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 05/11] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
                   ` (3 preceding siblings ...)
  2022-05-21 15:20 ` [PATCH v6 04/11] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 16:07   ` Marijn Suijten
  2022-05-21 15:20 ` [PATCH v6 06/11] arm64: dts: qcom: sdm630: add second (HS) USB host support Dmitry Baryshkov
                   ` (5 subsequent siblings)
  10 siblings, 1 reply; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Marijn Suijten, Konrad Dybcio

In preparation to adding second USB host/PHY pair, change first USB
PHY's label to qusb2phy0.

Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 2 +-
 arch/arm64/boot/dts/qcom/sdm630.dtsi                  | 4 ++--
 arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts   | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
index 42af1fade461..00baacf28c63 100644
--- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
@@ -224,7 +224,7 @@ &pon_resin {
 	linux,code = <KEY_VOLUMEUP>;
 };
 
-&qusb2phy {
+&qusb2phy0 {
 	status = "okay";
 
 	vdd-supply = <&vreg_l1b_0p925>;
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 5be0ec06ed86..eb8504e5735c 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1250,13 +1250,13 @@ usb3_dwc3: usb@a800000 {
 				 * haven't seen any devices making use of it.
 				 */
 				maximum-speed = "high-speed";
-				phys = <&qusb2phy>;
+				phys = <&qusb2phy0>;
 				phy-names = "usb2-phy";
 				snps,hird-threshold = /bits/ 8 <0>;
 			};
 		};
 
-		qusb2phy: phy@c012000 {
+		qusb2phy0: phy@c012000 {
 			compatible = "qcom,sdm660-qusb2-phy";
 			reg = <0x0c012000 0x180>;
 			#phy-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
index dcbaacf18f66..9280c1f0c334 100644
--- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
+++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
@@ -103,7 +103,7 @@ &pon_resin {
 	linux,code = <KEY_VOLUMEDOWN>;
 };
 
-&qusb2phy {
+&qusb2phy0 {
 	status = "okay";
 
 	vdd-supply = <&vreg_l1b_0p925>;
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 06/11] arm64: dts: qcom: sdm630: add second (HS) USB host support
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
                   ` (4 preceding siblings ...)
  2022-05-21 15:20 ` [PATCH v6 05/11] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path Dmitry Baryshkov
                   ` (4 subsequent siblings)
  10 siblings, 0 replies; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Marijn Suijten

Add DT entries for the second DWC3 USB host, which is limited to the
USB2.0 (HighSpeed), and the corresponding QUSB PHY.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 55 ++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index eb8504e5735c..2b5dbc12bdf8 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1270,6 +1270,20 @@ qusb2phy0: phy@c012000 {
 			status = "disabled";
 		};
 
+		qusb2phy1: phy@c014000 {
+			compatible = "qcom,sdm660-qusb2-phy";
+			reg = <0x0c014000 0x180>;
+			#phy-cells = <0>;
+
+			clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+				 <&gcc GCC_RX1_USB2_CLKREF_CLK>;
+			clock-names = "cfg_ahb", "ref";
+
+			resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
+			nvmem-cells = <&qusb2_hstx_trim>;
+			status = "disabled";
+		};
+
 		sdhc_2: sdhci@c084000 {
 			compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5";
 			reg = <0x0c084000 0x1000>;
@@ -1375,6 +1389,47 @@ opp-384000000 {
 			};
 		};
 
+		usb2: usb@c2f8800 {
+			compatible = "qcom,sdm660-dwc3", "qcom,dwc3";
+			reg = <0x0c2f8800 0x400>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			clocks = <&gcc GCC_CFG_NOC_USB2_AXI_CLK>,
+				 <&gcc GCC_USB20_MASTER_CLK>,
+				 <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+				 <&gcc GCC_USB20_SLEEP_CLK>;
+			clock-names = "cfg_noc", "core",
+				      "mock_utmi", "sleep";
+
+			assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+					  <&gcc GCC_USB20_MASTER_CLK>;
+			assigned-clock-rates = <19200000>, <60000000>;
+
+			interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "hs_phy_irq";
+
+			qcom,select-utmi-as-pipe-clk;
+
+			resets = <&gcc GCC_USB_20_BCR>;
+
+			usb2_dwc3: usb@c200000 {
+				compatible = "snps,dwc3";
+				reg = <0x0c200000 0xc8d0>;
+				interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+				snps,dis_u2_susphy_quirk;
+				snps,dis_enblslpm_quirk;
+
+				/* This is the HS-only host */
+				maximum-speed = "high-speed";
+				phys = <&qusb2phy1>;
+				phy-names = "usb2-phy";
+				snps,hird-threshold = /bits/ 8 <0>;
+			};
+		};
+
 		mmcc: clock-controller@c8c0000 {
 			compatible = "qcom,mmcc-sdm630";
 			reg = <0x0c8c0000 0x40000>;
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
                   ` (5 preceding siblings ...)
  2022-05-21 15:20 ` [PATCH v6 06/11] arm64: dts: qcom: sdm630: add second (HS) USB host support Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 16:17   ` Marijn Suijten
  2022-05-21 15:20 ` [PATCH v6 08/11] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf Dmitry Baryshkov
                   ` (3 subsequent siblings)
  10 siblings, 1 reply; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Marijn Suijten

ICC path for the GPU incorrectly states <&gnoc 1 &bimc 5>, which is
a path from SLAVE_GNOC_BIMC to SLAVE_EBI. According to the downstream
GPU uses MASTER_OXILI here, <&bimc 1 ...>.

While we are at it, use defined names instead of the numbers for this
interconnect path.

Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration")
Reported-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 2b5dbc12bdf8..bcda3a1dd249 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -8,6 +8,7 @@
 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
+#include <dt-bindings/interconnect/qcom,sdm660.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -1045,7 +1046,7 @@ adreno_gpu: gpu@5000000 {
 			nvmem-cells = <&gpu_speed_bin>;
 			nvmem-cell-names = "speed_bin";
 
-			interconnects = <&gnoc 1 &bimc 5>;
+			interconnects = <&bimc MASTER_OXILI &bimc SLAVE_EBI>;
 			interconnect-names = "gfx-mem";
 
 			operating-points-v2 = <&gpu_sdm630_opp_table>;
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 08/11] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
                   ` (6 preceding siblings ...)
  2022-05-21 15:20 ` [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 09/11] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files Dmitry Baryshkov
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Konrad Dybcio

Fix the device tree node in the &sdc2_state_on override. The sdm630 uses
'clk' rather than 'pinconf-clk'.

Fixes: 4c1d849ec047 ("arm64: dts: qcom: sdm630-xperia: Retire sdm630-sony-xperia-ganges.dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
index b96da53f2f1e..58f687fc49e0 100644
--- a/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
+++ b/arch/arm64/boot/dts/qcom/sdm636-sony-xperia-ganges-mermaid.dts
@@ -19,7 +19,7 @@ / {
 };
 
 &sdc2_state_on {
-	pinconf-clk {
+	clk {
 		drive-strength = <14>;
 	};
 };
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 09/11] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
                   ` (7 preceding siblings ...)
  2022-05-21 15:20 ` [PATCH v6 08/11] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 16:19   ` Marijn Suijten
  2022-05-21 15:20 ` [PATCH v6 10/11] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Dmitry Baryshkov
  10 siblings, 1 reply; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Marijn Suijten

This results in dts duplication, but per mutual agreement card detect
pin configuration belongs to the board files. Move it from the SoC
dtsi to the board DT files.

Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 .../boot/dts/qcom/sdm630-sony-xperia-nile.dtsi   | 16 ++++++++++++++++
 arch/arm64/boot/dts/qcom/sdm630.dtsi             | 12 ------------
 .../boot/dts/qcom/sdm660-xiaomi-lavender.dts     | 16 ++++++++++++++++
 3 files changed, 32 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
index 00baacf28c63..ccde9951e4fb 100644
--- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
@@ -549,6 +549,22 @@ vreg_l19a_3p3: l19 {
 	};
 };
 
+&sdc2_state_on {
+	sd-cd {
+		pins = "gpio54";
+		bias-pull-up;
+		drive-strength = <2>;
+	};
+};
+
+&sdc2_state_off {
+	sd-cd {
+		pins = "gpio54";
+		bias-disable;
+		drive-strength = <2>;
+	};
+};
+
 &sdhc_1 {
 	status = "okay";
 	supports-cqe;
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index bcda3a1dd249..e6de49e14840 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -983,12 +983,6 @@ data {
 					bias-pull-up;
 					drive-strength = <10>;
 				};
-
-				sd-cd {
-					pins = "gpio54";
-					bias-pull-up;
-					drive-strength = <2>;
-				};
 			};
 
 			sdc2_state_off: sdc2-off {
@@ -1009,12 +1003,6 @@ data {
 					bias-pull-up;
 					drive-strength = <2>;
 				};
-
-				sd-cd {
-					pins = "gpio54";
-					bias-disable;
-					drive-strength = <2>;
-				};
 			};
 		};
 
diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
index 9280c1f0c334..2b1216502eb0 100644
--- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
+++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
@@ -363,6 +363,22 @@ vreg_l19a_3p3: l19 {
 	};
 };
 
+&sdc2_state_on {
+	sd-cd {
+		pins = "gpio54";
+		bias-pull-up;
+		drive-strength = <2>;
+	};
+};
+
+&sdc2_state_off {
+	sd-cd {
+		pins = "gpio54";
+		bias-disable;
+		drive-strength = <2>;
+	};
+};
+
 &sdhc_1 {
 	status = "okay";
 	supports-cqe;
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 10/11] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
                   ` (8 preceding siblings ...)
  2022-05-21 15:20 ` [PATCH v6 09/11] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 15:20 ` [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Dmitry Baryshkov
  10 siblings, 0 replies; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Marijn Suijten

The IFC6560 is a board from Inforce Computing, built around the SDA660
SoC. This patch describes core clocks, some regulators from the two
PMICs, debug uart, storage, bluetooth and audio DSP remoteproc.

The regulator settings are inherited from prior work by Konrad Dybcio
and AngeloGioacchino Del Regno.

Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/Makefile             |   1 +
 .../boot/dts/qcom/sda660-inforce-ifc6560.dts  | 461 ++++++++++++++++++
 2 files changed, 462 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index f9e6343acd03..5f717fe0e8d0 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-herobrine-herobrine-r1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-idp2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7280-crd.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sda660-inforce-ifc6560.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-ganges-kirin.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-discovery.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm630-sony-xperia-nile-pioneer.dtb
diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
new file mode 100644
index 000000000000..5360b56df045
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
@@ -0,0 +1,461 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2021, Linaro Ltd.
+ * Copyright (c) 2020, Konrad Dybcio <konrad.dybcio@somainline.org>
+ * Copyright (c) 2020, AngeloGioacchino Del Regno
+ *                     <angelogioacchino.delregno@somainline.org>
+ */
+
+/dts-v1/;
+
+#include "sdm660.dtsi"
+#include "pm660.dtsi"
+#include "pm660l.dtsi"
+
+/ {
+	model = "Inforce 6560 Single Board Computer";
+	compatible = "inforce,ifc6560", "qcom,sda660";
+	chassis-type = "embedded"; /* SBC */
+
+	aliases {
+		serial0 = &blsp1_uart2;
+		serial1 = &blsp2_uart1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		volup {
+			label = "Volume Up";
+			gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_VOLUMEUP>;
+			debounce-interval = <15>;
+		};
+	};
+
+	/*
+	 * Until we hook up type-c detection, we
+	 * have to stick with this. But it works.
+	 */
+	extcon_usb: extcon-usb {
+		compatible = "linux,extcon-usb-gpio";
+		id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+	};
+
+	hdmi-out {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&adv7533_out>;
+			};
+		};
+	};
+
+	vph_pwr: vph-pwr-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vph_pwr";
+		regulator-min-microvolt = <3800000>;
+		regulator-max-microvolt = <3800000>;
+
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	v3p3_bck_bst: v3p3-bck-bst-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "v3p3_bck_bst";
+
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		vin-supply = <&vph_pwr>;
+	};
+
+	v1p2_ldo: v1p2-ldo-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "v1p2_ldo";
+
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+
+		vin-supply = <&vph_pwr>;
+	};
+
+	v5p0_boost: v5p0-boost-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "v5p0_boost";
+
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+
+		vin-supply = <&vph_pwr>;
+	};
+};
+
+&adsp_pil {
+	firmware-name = "qcom/ifc6560/adsp.mbn";
+};
+
+&blsp1_dma {
+	/*
+	 * The board will lock up if we toggle the BLSP clock, unless the
+	 * BAM DMA interconnects support is in place.
+	 */
+	/delete-property/ clocks;
+};
+
+&blsp_i2c6 {
+	status = "okay";
+
+	adv7533: hdmi@39 {
+		compatible = "adi,adv7535";
+		reg = <0x39>, <0x66>;
+		reg-names = "main", "edid";
+
+		interrupt-parent = <&pm660l_gpios>;
+		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+
+		clocks = <&rpmcc RPM_SMD_BB_CLK2>;
+		clock-names = "cec";
+		/*
+		 * Limit to 3 lanes to prevent the bridge from changing amount
+		 * of lanes in the fly. MSM DSI host doesn't like that.
+		 */
+		adi,dsi-lanes = <3>;
+		avdd-supply = <&vreg_l13a_1p8>;
+		dvdd-supply = <&vreg_l13a_1p8>;
+		pvdd-supply = <&vreg_l13a_1p8>;
+		a2vdd-supply = <&vreg_l13a_1p8>;
+		v3p3-supply = <&v3p3_bck_bst>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				adv7533_in: endpoint {
+					remote-endpoint = <&dsi0_out>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+
+				adv7533_out: endpoint {
+					remote-endpoint = <&hdmi_con>;
+				};
+			};
+		};
+	};
+};
+
+&blsp1_uart2 {
+	status = "okay";
+};
+
+&blsp2_dma {
+	/*
+	 * The board will lock up if we toggle the BLSP clock, unless the
+	 * BAM DMA interconnects support is in place.
+	 */
+	/delete-property/ clocks;
+};
+
+&blsp2_uart1 {
+	status = "okay";
+
+	bluetooth {
+		compatible = "qcom,wcn3990-bt";
+
+		vddio-supply = <&vreg_l13a_1p8>;
+		vddxo-supply = <&vreg_l9a_1p8>;
+		vddrf-supply = <&vreg_l6a_1p3>;
+		vddch0-supply = <&vreg_l19a_3p3>;
+		max-speed = <3200000>;
+	};
+};
+
+&dsi0 {
+	status = "okay";
+	vdda-supply = <&vreg_l1a_1p225>;
+};
+
+&dsi0_out {
+	remote-endpoint = <&adv7533_in>;
+	data-lanes = <0 1 2 3>;
+};
+
+&dsi0_phy {
+	status = "okay";
+	vcca-supply = <&vreg_l1b_0p925>;
+};
+
+&mdss {
+	status = "okay";
+};
+
+&mmss_smmu {
+	status = "okay";
+};
+
+&pon_pwrkey {
+	status = "okay";
+};
+
+&pon_resin {
+	status = "okay";
+
+	linux,code = <KEY_VOLUMEUP>;
+};
+
+&qusb2phy0 {
+	status = "okay";
+
+	vdd-supply = <&vreg_l1b_0p925>;
+	vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
+};
+
+&qusb2phy1 {
+	status = "okay";
+
+	vdd-supply = <&vreg_l1b_0p925>;
+	vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
+};
+
+&rpm_requests {
+	pm660-regulators {
+		compatible = "qcom,rpm-pm660-regulators";
+
+		vdd_s1-supply = <&vph_pwr>;
+		vdd_s2-supply = <&vph_pwr>;
+		vdd_s3-supply = <&vph_pwr>;
+		vdd_s4-supply = <&vph_pwr>;
+		vdd_s5-supply = <&vph_pwr>;
+		vdd_s6-supply = <&vph_pwr>;
+
+		vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>;
+		vdd_l2_l3-supply = <&vreg_s2b_1p05>;
+		vdd_l5-supply = <&vreg_s2b_1p05>;
+		vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>;
+		vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>;
+
+		vreg_s4a_2p04: s4 {
+			regulator-min-microvolt = <1805000>;
+			regulator-max-microvolt = <2040000>;
+			regulator-enable-ramp-delay = <200>;
+			regulator-ramp-delay = <0>;
+			regulator-always-on;
+		};
+
+		vreg_s5a_1p35: s5 {
+			regulator-min-microvolt = <1224000>;
+			regulator-max-microvolt = <1350000>;
+			regulator-enable-ramp-delay = <200>;
+			regulator-ramp-delay = <0>;
+		};
+
+		vreg_l1a_1p225: l1 {
+			regulator-min-microvolt = <1150000>;
+			regulator-max-microvolt = <1250000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l6a_1p3: l6 {
+			regulator-min-microvolt = <1304000>;
+			regulator-max-microvolt = <1368000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-ramp-delay = <0>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l8a_1p8: l8 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-ramp-delay = <0>;
+			regulator-system-load = <325000>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l9a_1p8: l9 {
+			regulator-min-microvolt = <1804000>;
+			regulator-max-microvolt = <1896000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-ramp-delay = <0>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l13a_1p8: l13 {
+			/* This gives power to the LPDDR4: never turn it off! */
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1944000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-ramp-delay = <0>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		vreg_l19a_3p3: l19 {
+			regulator-min-microvolt = <3312000>;
+			regulator-max-microvolt = <3400000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-ramp-delay = <0>;
+			regulator-allow-set-load;
+		};
+	};
+
+	pm660l-regulators {
+		compatible = "qcom,rpm-pm660l-regulators";
+
+		vdd_s1-supply = <&vph_pwr>;
+		vdd_s2-supply = <&vph_pwr>;
+		vdd_s3_s4-supply = <&vph_pwr>;
+		vdd_s5-supply = <&vph_pwr>;
+		vdd_s6-supply = <&vph_pwr>;
+
+		vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>;
+		vdd_l2-supply = <&vreg_bob>;
+		vdd_l3_l5_l7_l8-supply = <&vreg_bob>;
+		vdd_l4_l6-supply = <&vreg_bob>;
+		vdd_bob-supply = <&vph_pwr>;
+
+		vreg_s2b_1p05: s2 {
+			regulator-min-microvolt = <1050000>;
+			regulator-max-microvolt = <1050000>;
+			regulator-enable-ramp-delay = <200>;
+			regulator-ramp-delay = <0>;
+		};
+
+		vreg_l1b_0p925: l1 {
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <925000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l2b_2p95: l2 {
+			regulator-min-microvolt = <1648000>;
+			regulator-max-microvolt = <3100000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-ramp-delay = <0>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l4b_2p95: l4 {
+			regulator-min-microvolt = <2944000>;
+			regulator-max-microvolt = <2952000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-ramp-delay = <0>;
+
+			regulator-min-microamp = <200>;
+			regulator-max-microamp = <600000>;
+			regulator-system-load = <570000>;
+			regulator-allow-set-load;
+		};
+
+		/*
+		 * Downstream specifies a range of 1721-3600mV,
+		 * but the only assigned consumers are SDHCI2 VMMC
+		 * and Coresight QPDI that both request pinned 2.95V.
+		 * Tighten the range to 1.8-3.328 (closest to 3.3) to
+		 * make the mmc driver happy.
+		 */
+		vreg_l5b_2p95: l5 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3328000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-system-load = <800000>;
+			regulator-ramp-delay = <0>;
+			regulator-allow-set-load;
+		};
+
+		vreg_l7b_3p125: l7 {
+			regulator-min-microvolt = <2700000>;
+			regulator-max-microvolt = <3125000>;
+			regulator-enable-ramp-delay = <250>;
+		};
+
+		vreg_l8b_3p3: l8 {
+			regulator-min-microvolt = <2800000>;
+			regulator-max-microvolt = <3400000>;
+			regulator-enable-ramp-delay = <250>;
+			regulator-ramp-delay = <0>;
+		};
+
+		vreg_bob: bob {
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3624000>;
+			regulator-enable-ramp-delay = <500>;
+			regulator-ramp-delay = <0>;
+		};
+	};
+};
+
+&sdc2_state_on {
+	sd-cd {
+		pins = "gpio54";
+		bias-pull-up;
+		drive-strength = <2>;
+	};
+};
+
+&sdc2_state_off {
+	sd-cd {
+		pins = "gpio54";
+		bias-disable;
+		drive-strength = <2>;
+	};
+};
+
+&sdhc_1 {
+	status = "okay";
+	supports-cqe;
+
+	vmmc-supply = <&vreg_l4b_2p95>;
+	vqmmc-supply = <&vreg_l8a_1p8>;
+
+	mmc-ddr-1_8v;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+};
+
+&sdhc_2 {
+	status = "okay";
+
+	vmmc-supply = <&vreg_l5b_2p95>;
+	vqmmc-supply = <&vreg_l2b_2p95>;
+
+	cd-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
+	no-sdio;
+	no-emmc;
+};
+
+&tlmm {
+	gpio-reserved-ranges = <0 4>, <8 4>;
+};
+
+&usb2 {
+	status = "okay";
+};
+
+&usb2_dwc3 {
+	dr_mode = "host";
+};
+
+&usb3 {
+	status = "okay";
+};
+
+&usb3_dwc3 {
+	dr_mode = "peripheral";
+	extcon = <&extcon_usb>;
+};
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board
  2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
                   ` (9 preceding siblings ...)
  2022-05-21 15:20 ` [PATCH v6 10/11] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support Dmitry Baryshkov
@ 2022-05-21 15:20 ` Dmitry Baryshkov
  2022-05-21 16:20   ` Marijn Suijten
  2022-05-21 16:37   ` Krzysztof Kozlowski
  10 siblings, 2 replies; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 15:20 UTC (permalink / raw)
  To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski
  Cc: linux-arm-msm, devicetree, Marijn Suijten, Krzysztof Kozlowski

Add binding documentation for the Inforce IFC6560 board which uses
Snapdragon SDA660.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 129cdd246223..ac4ee0f874ea 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -41,6 +41,7 @@ description: |
         sa8155p
         sc7180
         sc7280
+        sda660
         sdm630
         sdm632
         sdm660
@@ -225,6 +226,11 @@ properties:
               - google,senor
           - const: qcom,sc7280
 
+      - items:
+          - enum:
+              - inforce,ifc6560
+          - const: qcom,sda660
+
       - items:
           - enum:
               - fairphone,fp3
-- 
2.35.1


^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default
  2022-05-21 15:20 ` [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Dmitry Baryshkov
@ 2022-05-21 16:06   ` Marijn Suijten
  2022-05-21 16:49     ` Krzysztof Kozlowski
  2022-05-21 20:13     ` Dmitry Baryshkov
  0 siblings, 2 replies; 25+ messages in thread
From: Marijn Suijten @ 2022-05-21 16:06 UTC (permalink / raw)
  To: Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
	linux-arm-msm, devicetree, Konrad Dybcio

On 2022-05-21 18:20:39, Dmitry Baryshkov wrote:
> Follow the typical practice and keep DSI0/DSI0 PHY disabled by default.
> They should be enabled in the board DT files. No existing boards use
> them at this moment.
> 
> Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

I also added my:

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>

To v5, to confirm the Suggested-by.

> ---
>  arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index 240293592ef9..8697d40e9b74 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -1559,6 +1559,8 @@ dsi0: dsi@c994000 {
>  				phys = <&dsi0_phy>;
>  				phy-names = "dsi";
>  
> +				status = "disabled";
> +
>  				ports {
>  					#address-cells = <1>;
>  					#size-cells = <0>;
> @@ -1592,6 +1594,7 @@ dsi0_phy: dsi-phy@c994400 {
>  
>  				clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>;
>  				clock-names = "iface", "ref";
> +				status = "disabled";
>  			};
>  		};
>  
> -- 
> 2.35.1
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 05/11] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0
  2022-05-21 15:20 ` [PATCH v6 05/11] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 Dmitry Baryshkov
@ 2022-05-21 16:07   ` Marijn Suijten
  0 siblings, 0 replies; 25+ messages in thread
From: Marijn Suijten @ 2022-05-21 16:07 UTC (permalink / raw)
  To: Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
	linux-arm-msm, devicetree, Konrad Dybcio

On 2022-05-21 18:20:43, Dmitry Baryshkov wrote:
> In preparation to adding second USB host/PHY pair, change first USB
> PHY's label to qusb2phy0.
> 
> Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

https://lore.kernel.org/linux-arm-msm/20220515144734.4jzx4dyhj7hgvcfe@SoMainline.org/

> ---
>  arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi | 2 +-
>  arch/arm64/boot/dts/qcom/sdm630.dtsi                  | 4 ++--
>  arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts   | 2 +-
>  3 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
> index 42af1fade461..00baacf28c63 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
> @@ -224,7 +224,7 @@ &pon_resin {
>  	linux,code = <KEY_VOLUMEUP>;
>  };
>  
> -&qusb2phy {
> +&qusb2phy0 {
>  	status = "okay";
>  
>  	vdd-supply = <&vreg_l1b_0p925>;
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index 5be0ec06ed86..eb8504e5735c 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -1250,13 +1250,13 @@ usb3_dwc3: usb@a800000 {
>  				 * haven't seen any devices making use of it.
>  				 */
>  				maximum-speed = "high-speed";
> -				phys = <&qusb2phy>;
> +				phys = <&qusb2phy0>;
>  				phy-names = "usb2-phy";
>  				snps,hird-threshold = /bits/ 8 <0>;
>  			};
>  		};
>  
> -		qusb2phy: phy@c012000 {
> +		qusb2phy0: phy@c012000 {
>  			compatible = "qcom,sdm660-qusb2-phy";
>  			reg = <0x0c012000 0x180>;
>  			#phy-cells = <0>;
> diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
> index dcbaacf18f66..9280c1f0c334 100644
> --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
> @@ -103,7 +103,7 @@ &pon_resin {
>  	linux,code = <KEY_VOLUMEDOWN>;
>  };
>  
> -&qusb2phy {
> +&qusb2phy0 {
>  	status = "okay";
>  
>  	vdd-supply = <&vreg_l1b_0p925>;
> -- 
> 2.35.1
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path
  2022-05-21 15:20 ` [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path Dmitry Baryshkov
@ 2022-05-21 16:17   ` Marijn Suijten
  2022-05-21 16:51     ` Krzysztof Kozlowski
  0 siblings, 1 reply; 25+ messages in thread
From: Marijn Suijten @ 2022-05-21 16:17 UTC (permalink / raw)
  To: Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
	linux-arm-msm, devicetree

On 2022-05-21 18:20:45, Dmitry Baryshkov wrote:
> ICC path for the GPU incorrectly states <&gnoc 1 &bimc 5>, which is
> a path from SLAVE_GNOC_BIMC to SLAVE_EBI. According to the downstream

Note that I suggested to reword this sentence for readablity in v5:

https://lore.kernel.org/linux-arm-msm/20220515145108.zfmlb53vacx7sr33@SoMainline.org/

> GPU uses MASTER_OXILI here, <&bimc 1 ...>.
> 
> While we are at it, use defined names instead of the numbers for this
> interconnect path.
> 
> Fixes: 5cf69dcbec8b ("arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration")
> Reported-by: Marijn Suijten <marijn.suijten@somainline.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

And also added my Reviewed-by there.  I think it is normal to have a
Reviewed-by on top of a Suggested-by/Reported-by, so that I as reviewer
confirm the contents of the patch?

Since this is the third patch missing these, It may just have been an
oversight.

- Marijn

> ---
>  arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index 2b5dbc12bdf8..bcda3a1dd249 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -8,6 +8,7 @@
>  #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
>  #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
>  #include <dt-bindings/clock/qcom,rpmcc.h>
> +#include <dt-bindings/interconnect/qcom,sdm660.h>
>  #include <dt-bindings/power/qcom-rpmpd.h>
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -1045,7 +1046,7 @@ adreno_gpu: gpu@5000000 {
>  			nvmem-cells = <&gpu_speed_bin>;
>  			nvmem-cell-names = "speed_bin";
>  
> -			interconnects = <&gnoc 1 &bimc 5>;
> +			interconnects = <&bimc MASTER_OXILI &bimc SLAVE_EBI>;
>  			interconnect-names = "gfx-mem";
>  
>  			operating-points-v2 = <&gpu_sdm630_opp_table>;
> -- 
> 2.35.1
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 09/11] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files
  2022-05-21 15:20 ` [PATCH v6 09/11] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files Dmitry Baryshkov
@ 2022-05-21 16:19   ` Marijn Suijten
  0 siblings, 0 replies; 25+ messages in thread
From: Marijn Suijten @ 2022-05-21 16:19 UTC (permalink / raw)
  To: Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
	linux-arm-msm, devicetree

On 2022-05-21 18:20:47, Dmitry Baryshkov wrote:
> This results in dts duplication, but per mutual agreement card detect
> pin configuration belongs to the board files. Move it from the SoC
> dtsi to the board DT files.
> 
> Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>

> ---
>  .../boot/dts/qcom/sdm630-sony-xperia-nile.dtsi   | 16 ++++++++++++++++
>  arch/arm64/boot/dts/qcom/sdm630.dtsi             | 12 ------------
>  .../boot/dts/qcom/sdm660-xiaomi-lavender.dts     | 16 ++++++++++++++++
>  3 files changed, 32 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
> index 00baacf28c63..ccde9951e4fb 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi
> @@ -549,6 +549,22 @@ vreg_l19a_3p3: l19 {
>  	};
>  };
>  
> +&sdc2_state_on {
> +	sd-cd {
> +		pins = "gpio54";
> +		bias-pull-up;
> +		drive-strength = <2>;
> +	};
> +};
> +
> +&sdc2_state_off {
> +	sd-cd {
> +		pins = "gpio54";
> +		bias-disable;
> +		drive-strength = <2>;
> +	};
> +};
> +
>  &sdhc_1 {
>  	status = "okay";
>  	supports-cqe;
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index bcda3a1dd249..e6de49e14840 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -983,12 +983,6 @@ data {
>  					bias-pull-up;
>  					drive-strength = <10>;
>  				};
> -
> -				sd-cd {
> -					pins = "gpio54";
> -					bias-pull-up;
> -					drive-strength = <2>;
> -				};
>  			};
>  
>  			sdc2_state_off: sdc2-off {
> @@ -1009,12 +1003,6 @@ data {
>  					bias-pull-up;
>  					drive-strength = <2>;
>  				};
> -
> -				sd-cd {
> -					pins = "gpio54";
> -					bias-disable;
> -					drive-strength = <2>;
> -				};
>  			};
>  		};
>  
> diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
> index 9280c1f0c334..2b1216502eb0 100644
> --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
> @@ -363,6 +363,22 @@ vreg_l19a_3p3: l19 {
>  	};
>  };
>  
> +&sdc2_state_on {
> +	sd-cd {
> +		pins = "gpio54";
> +		bias-pull-up;
> +		drive-strength = <2>;
> +	};
> +};
> +
> +&sdc2_state_off {
> +	sd-cd {
> +		pins = "gpio54";
> +		bias-disable;
> +		drive-strength = <2>;
> +	};
> +};
> +
>  &sdhc_1 {
>  	status = "okay";
>  	supports-cqe;
> -- 
> 2.35.1
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board
  2022-05-21 15:20 ` [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Dmitry Baryshkov
@ 2022-05-21 16:20   ` Marijn Suijten
  2022-05-21 16:30     ` Krzysztof Kozlowski
  2022-05-21 16:37   ` Krzysztof Kozlowski
  1 sibling, 1 reply; 25+ messages in thread
From: Marijn Suijten @ 2022-05-21 16:20 UTC (permalink / raw)
  To: Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
	linux-arm-msm, devicetree, Krzysztof Kozlowski

On 2022-05-21 18:20:49, Dmitry Baryshkov wrote:
> Add binding documentation for the Inforce IFC6560 board which uses
> Snapdragon SDA660.
> 
> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Nit: don't dt-bindings patches go _before_ using these in dts?  In ohter
words, should patch 10 and 11 be swapped?

> ---
>  Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
> index 129cdd246223..ac4ee0f874ea 100644
> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
> @@ -41,6 +41,7 @@ description: |
>          sa8155p
>          sc7180
>          sc7280
> +        sda660
>          sdm630
>          sdm632
>          sdm660
> @@ -225,6 +226,11 @@ properties:
>                - google,senor
>            - const: qcom,sc7280
>  
> +      - items:
> +          - enum:
> +              - inforce,ifc6560
> +          - const: qcom,sda660
> +
>        - items:
>            - enum:
>                - fairphone,fp3
> -- 
> 2.35.1
> 

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board
  2022-05-21 16:20   ` Marijn Suijten
@ 2022-05-21 16:30     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-21 16:30 UTC (permalink / raw)
  To: Marijn Suijten, Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
	linux-arm-msm, devicetree

On 21/05/2022 18:20, Marijn Suijten wrote:
> On 2022-05-21 18:20:49, Dmitry Baryshkov wrote:
>> Add binding documentation for the Inforce IFC6560 board which uses
>> Snapdragon SDA660.
>>
>> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> Nit: don't dt-bindings patches go _before_ using these in dts?  In ohter
> words, should patch 10 and 11 be swapped?

Yes, they should.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board
  2022-05-21 15:20 ` [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Dmitry Baryshkov
  2022-05-21 16:20   ` Marijn Suijten
@ 2022-05-21 16:37   ` Krzysztof Kozlowski
  1 sibling, 0 replies; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-21 16:37 UTC (permalink / raw)
  To: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring
  Cc: linux-arm-msm, devicetree, Marijn Suijten, Krzysztof Kozlowski

On 21/05/2022 17:20, Dmitry Baryshkov wrote:
> Add binding documentation for the Inforce IFC6560 board which uses
> Snapdragon SDA660.
> 
> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
> index 129cdd246223..ac4ee0f874ea 100644
> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
> @@ -41,6 +41,7 @@ description: |
>          sa8155p
>          sc7180
>          sc7280
> +        sda660

I wanted to base my work on top of it, but this patch does not apply. I
think you based it on something out of date, also judging by my old
email address you are using (in each patchset). The patches should be
based on current development tree.


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default
  2022-05-21 16:06   ` Marijn Suijten
@ 2022-05-21 16:49     ` Krzysztof Kozlowski
  2022-05-21 18:19       ` Marijn Suijten
  2022-05-21 20:13     ` Dmitry Baryshkov
  1 sibling, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-21 16:49 UTC (permalink / raw)
  To: Marijn Suijten, Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, linux-arm-msm,
	devicetree, Konrad Dybcio

On 21/05/2022 18:06, Marijn Suijten wrote:
> On 2022-05-21 18:20:39, Dmitry Baryshkov wrote:
>> Follow the typical practice and keep DSI0/DSI0 PHY disabled by default.
>> They should be enabled in the board DT files. No existing boards use
>> them at this moment.
>>
>> Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> I also added my:
> 
> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
> 
> To v5, to confirm the Suggested-by.

Reviewed-by tag is not used to confirm other tags like reported or
suggested. It means you performed the review and you state what is
described in "Reviewer's statement of oversight".

Don't add the tag for reasons other than described in that statement of
oversight.


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path
  2022-05-21 16:17   ` Marijn Suijten
@ 2022-05-21 16:51     ` Krzysztof Kozlowski
  2022-05-21 18:27       ` Marijn Suijten
  0 siblings, 1 reply; 25+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-21 16:51 UTC (permalink / raw)
  To: Marijn Suijten, Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, linux-arm-msm, devicetree

On 21/05/2022 18:17, Marijn Suijten wrote:
> 
> And also added my Reviewed-by there.  I think it is normal to have a
> Reviewed-by on top of a Suggested-by/Reported-by, so that I as reviewer
> confirm the contents of the patch?

The review tag is not used to confirm anything like that.

> 
> Since this is the third patch missing these, It may just have been an
> oversight.

If your review was meeting the criteria of "Reviewer's statement of
oversight", then of course should be added here.


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default
  2022-05-21 16:49     ` Krzysztof Kozlowski
@ 2022-05-21 18:19       ` Marijn Suijten
  0 siblings, 0 replies; 25+ messages in thread
From: Marijn Suijten @ 2022-05-21 18:19 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
	linux-arm-msm, devicetree, Konrad Dybcio

On 2022-05-21 18:49:36, Krzysztof Kozlowski wrote:
> On 21/05/2022 18:06, Marijn Suijten wrote:
> > On 2022-05-21 18:20:39, Dmitry Baryshkov wrote:
> >> Follow the typical practice and keep DSI0/DSI0 PHY disabled by default.
> >> They should be enabled in the board DT files. No existing boards use
> >> them at this moment.
> >>
> >> Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
> >> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> >> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > 
> > I also added my:
> > 
> > Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
> > 
> > To v5, to confirm the Suggested-by.
> 
> Reviewed-by tag is not used to confirm other tags like reported or
> suggested. It means you performed the review and you state what is
> described in "Reviewer's statement of oversight".

That is obviously implied, otherwise I wouldn't have sent a Reviewed-by
in the first place.

However, I don't think Suggested-by quite carries the load of a
Reviewed-by (at all...), so I don't understand why my Reviewed-by's have
strangely been picked up for every patch except those where my name is
already listed as Suggested-by or Reported-by, those are completely
separate things.

- Marijn

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path
  2022-05-21 16:51     ` Krzysztof Kozlowski
@ 2022-05-21 18:27       ` Marijn Suijten
  0 siblings, 0 replies; 25+ messages in thread
From: Marijn Suijten @ 2022-05-21 18:27 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Dmitry Baryshkov, Andy Gross, Bjorn Andersson, Rob Herring,
	linux-arm-msm, devicetree

On 2022-05-21 18:51:07, Krzysztof Kozlowski wrote:
> On 21/05/2022 18:17, Marijn Suijten wrote:
> > 
> > And also added my Reviewed-by there.  I think it is normal to have a
> > Reviewed-by on top of a Suggested-by/Reported-by, so that I as reviewer
> > confirm the contents of the patch?
> 
> The review tag is not used to confirm anything like that.

It is used to acknowledge that I agree on (confirm) the contents of the
patch as per how a review usually works.  I have reviewed the patch,
double-checked the numbers on my end.  That's the "contents of the
patch"?

> > Since this is the third patch missing these, It may just have been an
> > oversight.
> 
> If your review was meeting the criteria of "Reviewer's statement of
> oversight", then of course should be added here.

That's what I said above, the Reviewed-by goes on top of the Reported-by
as the latter doesn't imply the former at all.

- Marijn

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default
  2022-05-21 16:06   ` Marijn Suijten
  2022-05-21 16:49     ` Krzysztof Kozlowski
@ 2022-05-21 20:13     ` Dmitry Baryshkov
  2022-05-21 22:15       ` Marijn Suijten
  1 sibling, 1 reply; 25+ messages in thread
From: Dmitry Baryshkov @ 2022-05-21 20:13 UTC (permalink / raw)
  To: Marijn Suijten
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
	linux-arm-msm, devicetree, Konrad Dybcio

On 21/05/2022 19:06, Marijn Suijten wrote:
> On 2022-05-21 18:20:39, Dmitry Baryshkov wrote:
>> Follow the typical practice and keep DSI0/DSI0 PHY disabled by default.
>> They should be enabled in the board DT files. No existing boards use
>> them at this moment.
>>
>> Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> I also added my:
> 
> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>

Please excuse me. I didn't pick up your R-b tags by mistake.

> 
> To v5, to confirm the Suggested-by.
> 
>> ---
>>   arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
>> index 240293592ef9..8697d40e9b74 100644
>> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
>> @@ -1559,6 +1559,8 @@ dsi0: dsi@c994000 {
>>   				phys = <&dsi0_phy>;
>>   				phy-names = "dsi";
>>   
>> +				status = "disabled";
>> +
>>   				ports {
>>   					#address-cells = <1>;
>>   					#size-cells = <0>;
>> @@ -1592,6 +1594,7 @@ dsi0_phy: dsi-phy@c994400 {
>>   
>>   				clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>;
>>   				clock-names = "iface", "ref";
>> +				status = "disabled";
>>   			};
>>   		};
>>   
>> -- 
>> 2.35.1
>>


-- 
With best wishes
Dmitry

^ permalink raw reply	[flat|nested] 25+ messages in thread

* Re: [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default
  2022-05-21 20:13     ` Dmitry Baryshkov
@ 2022-05-21 22:15       ` Marijn Suijten
  0 siblings, 0 replies; 25+ messages in thread
From: Marijn Suijten @ 2022-05-21 22:15 UTC (permalink / raw)
  To: Dmitry Baryshkov
  Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
	linux-arm-msm, devicetree, Konrad Dybcio

On 2022-05-21 23:13:49, Dmitry Baryshkov wrote:
> On 21/05/2022 19:06, Marijn Suijten wrote:
> > On 2022-05-21 18:20:39, Dmitry Baryshkov wrote:
> >> Follow the typical practice and keep DSI0/DSI0 PHY disabled by default.
> >> They should be enabled in the board DT files. No existing boards use
> >> them at this moment.
> >>
> >> Suggested-by: Marijn Suijten <marijn.suijten@somainline.org>
> >> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> >> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > 
> > I also added my:
> > 
> > Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
> 
> Please excuse me. I didn't pick up your R-b tags by mistake.

No worries, it just seemed coincidental to have them picked up on every
patch except the ones which already had a Suggested/Reported-by tag,
thanks for picking them up now!

- Marijn

^ permalink raw reply	[flat|nested] 25+ messages in thread

end of thread, other threads:[~2022-05-21 22:15 UTC | newest]

Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Dmitry Baryshkov
2022-05-21 16:06   ` Marijn Suijten
2022-05-21 16:49     ` Krzysztof Kozlowski
2022-05-21 18:19       ` Marijn Suijten
2022-05-21 20:13     ` Dmitry Baryshkov
2022-05-21 22:15       ` Marijn Suijten
2022-05-21 15:20 ` [PATCH v6 02/11] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy " Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 03/11] arm64: dts: qcom: sdm630: disable GPU " Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 04/11] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 05/11] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 Dmitry Baryshkov
2022-05-21 16:07   ` Marijn Suijten
2022-05-21 15:20 ` [PATCH v6 06/11] arm64: dts: qcom: sdm630: add second (HS) USB host support Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path Dmitry Baryshkov
2022-05-21 16:17   ` Marijn Suijten
2022-05-21 16:51     ` Krzysztof Kozlowski
2022-05-21 18:27       ` Marijn Suijten
2022-05-21 15:20 ` [PATCH v6 08/11] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 09/11] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files Dmitry Baryshkov
2022-05-21 16:19   ` Marijn Suijten
2022-05-21 15:20 ` [PATCH v6 10/11] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Dmitry Baryshkov
2022-05-21 16:20   ` Marijn Suijten
2022-05-21 16:30     ` Krzysztof Kozlowski
2022-05-21 16:37   ` Krzysztof Kozlowski

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