From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F8B4C433EF for ; Sun, 22 May 2022 23:35:11 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E21AD83EE8; Mon, 23 May 2022 01:35:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 83A9383ED8; Mon, 23 May 2022 01:35:05 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id EE20283EB7 for ; Mon, 23 May 2022 01:34:58 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 52090113E; Sun, 22 May 2022 16:34:58 -0700 (PDT) Received: from slackpad.lan (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 869103F70D; Sun, 22 May 2022 16:34:57 -0700 (PDT) Date: Sun, 22 May 2022 23:38:52 +0100 From: Andre Przywara To: Samuel Holland Cc: u-boot@lists.denx.de, Jagan Teki , Tom Rini Subject: Re: [PATCH 10/12] ARM: dts: sun8i: R40/T3: Sync from Linux v5.18-rc1 Message-ID: <20220522233852.4e1a6331@slackpad.lan> In-Reply-To: <20220427203132.47271-11-samuel@sholland.org> References: <20220427203132.47271-1-samuel@sholland.org> <20220427203132.47271-11-samuel@sholland.org> Organization: Arm Ltd. X-Mailer: Claws Mail 4.1.0 (GTK 3.24.31; x86_64-slackware-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean On Wed, 27 Apr 2022 15:31:29 -0500 Samuel Holland wrote: > Copy the devicetree for the R40/T3 SoC verbatim from the Linux v5.18-rc1 > tag. None of the existing boards had any devicetree updates. > > This commit adds the following new board devicetrees: > - sun8i-r40-oka40i-c.dts > - sun8i-t3-cqa3t-bv3.dts > > Signed-off-by: Samuel Holland The files are identical to the kernel versions, and I see only additions, so there should be no change of behaviour. Reviewed-by: Andre Przywara Cheers, Andre > --- > > arch/arm/dts/Makefile | 2 + > arch/arm/dts/sun8i-r40-feta40i.dtsi | 106 +++++++++++++ > arch/arm/dts/sun8i-r40-oka40i-c.dts | 203 +++++++++++++++++++++++++ > arch/arm/dts/sun8i-r40.dtsi | 118 ++++++++++++++- > arch/arm/dts/sun8i-t3-cqa3t-bv3.dts | 226 ++++++++++++++++++++++++++++ > 5 files changed, 653 insertions(+), 2 deletions(-) > create mode 100644 arch/arm/dts/sun8i-r40-feta40i.dtsi > create mode 100644 arch/arm/dts/sun8i-r40-oka40i-c.dts > create mode 100644 arch/arm/dts/sun8i-t3-cqa3t-bv3.dts > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 059ac7fad8..95909ef037 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -668,6 +668,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \ > sun8i-h3-zeropi.dtb > dtb-$(CONFIG_MACH_SUN8I_R40) += \ > sun8i-r40-bananapi-m2-ultra.dtb \ > + sun8i-r40-oka40i-c.dtb \ > + sun8i-t3-cqa3t-bv3.dtb \ > sun8i-v40-bananapi-m2-berry.dtb > dtb-$(CONFIG_MACH_SUN8I_V3S) += \ > sun8i-s3-elimo-initium.dtb \ > diff --git a/arch/arm/dts/sun8i-r40-feta40i.dtsi b/arch/arm/dts/sun8i-r40-feta40i.dtsi > new file mode 100644 > index 0000000000..265e0fa57a > --- /dev/null > +++ b/arch/arm/dts/sun8i-r40-feta40i.dtsi > @@ -0,0 +1,106 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR MIT > +// Copyright (C) 2021 Ivan Uvarov > +// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is: > +// Copyright (C) 2017 Chen-Yu Tsai > +// Copyright (C) 2017 Icenowy Zheng > + > +#include "sun8i-r40.dtsi" > + > +&i2c0 { > + status = "okay"; > + > + axp22x: pmic@34 { > + compatible = "x-powers,axp221"; > + reg = <0x34>; > + interrupt-parent = <&nmi_intc>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > + }; > +}; > + > +#include "axp22x.dtsi" > + > +&mmc2 { > + vmmc-supply = <®_dcdc1>; > + vqmmc-supply = <®_aldo2>; > + bus-width = <8>; > + non-removable; > + status = "okay"; > +}; > + > +&pio { > + pinctrl-names = "default"; > + pinctrl-0 = <&clk_out_a_pin>; > + vcc-pa-supply = <®_dcdc1>; > + vcc-pc-supply = <®_aldo2>; > + vcc-pd-supply = <®_dcdc1>; > + vcc-pf-supply = <®_dldo4>; > + vcc-pg-supply = <®_dldo1>; > +}; > + > +®_aldo2 { > + regulator-always-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-name = "vcc-pa"; > +}; > + > +®_aldo3 { > + regulator-always-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-name = "avcc"; > +}; > + > +®_dcdc1 { > + regulator-always-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-3v3"; > +}; > + > +®_dcdc2 { > + regulator-always-on; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + regulator-name = "vdd-cpu"; > +}; > + > +®_dcdc3 { > + regulator-always-on; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + regulator-name = "vdd-sys"; > +}; > + > +®_dcdc5 { > + regulator-always-on; > + regulator-min-microvolt = <1500000>; > + regulator-max-microvolt = <1500000>; > + regulator-name = "vcc-dram"; > +}; > + > +®_dldo1 { > + regulator-always-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-wifi-io"; > +}; > + > +®_dldo4 { > + regulator-always-on; > + regulator-min-microvolt = <2500000>; > + regulator-max-microvolt = <2500000>; > + regulator-name = "vdd2v5-sata"; > +}; > + > +®_eldo2 { > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-name = "vdd1v2-sata"; > +}; > + > +®_eldo3 { > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + regulator-name = "vcc-pe"; > +}; > diff --git a/arch/arm/dts/sun8i-r40-oka40i-c.dts b/arch/arm/dts/sun8i-r40-oka40i-c.dts > new file mode 100644 > index 0000000000..0bd1336206 > --- /dev/null > +++ b/arch/arm/dts/sun8i-r40-oka40i-c.dts > @@ -0,0 +1,203 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR MIT > +// Copyright (C) 2021 Ivan Uvarov > +// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is: > +// Copyright (C) 2017 Chen-Yu Tsai > +// Copyright (C) 2017 Icenowy Zheng > + > +/dts-v1/; > +#include "sun8i-r40-feta40i.dtsi" > + > +#include > +#include > + > +/ { > + model = "Forlinx OKA40i-C"; > + compatible = "forlinx,oka40i-c", "forlinx,feta40i-c", "allwinner,sun8i-r40"; > + > + aliases { > + ethernet0 = &gmac; > + serial0 = &uart0; > + serial2 = &uart2; > + serial3 = &uart3; > + serial4 = &uart4; > + serial5 = &uart5; /* RS485 */ > + serial7 = &uart7; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + connector { > + compatible = "hdmi-connector"; > + type = "a"; > + > + port { > + hdmi_con_in: endpoint { > + remote-endpoint = <&hdmi_out_con>; > + }; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + led-5 { /* this is how the leds are labeled on the board */ > + gpios = <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */ > + color = ; > + function = LED_FUNCTION_STATUS; > + }; > + > + led-6 { > + gpios = <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */ > + color = ; > + function = LED_FUNCTION_STATUS; > + }; > + }; > + > + reg_vcc5v0: vcc5v0 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc5v0"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + }; > + > + wifi_pwrseq: wifi_pwrseq { > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN > + clocks = <&ccu CLK_OUTA>; > + clock-names = "ext_clock"; > + }; > +}; > + > +&ahci { > + ahci-supply = <®_dldo4>; > + phy-supply = <®_eldo2>; > + status = "okay"; > +}; > + > +&de { > + status = "okay"; > +}; > + > +&ehci1 { > + status = "okay"; > +}; > + > +&ehci2 { > + status = "okay"; > +}; > + > +&gmac { > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac_rgmii_pins>; > + phy-handle = <&phy1>; > + phy-mode = "rgmii-id"; > + phy-supply = <®_dcdc1>; > + status = "okay"; > +}; > + > +&gmac_mdio { > + phy1: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + }; > +}; > + > +&hdmi { > + status = "okay"; > +}; > + > +&hdmi_out { > + hdmi_out_con: endpoint { > + remote-endpoint = <&hdmi_con_in>; > + }; > +}; > + > +&i2c2 { > + status = "okay"; > +}; > + > +&mmc0 { > + vmmc-supply = <®_dcdc1>; > + vqmmc-supply = <®_dcdc1>; > + bus-width = <4>; > + cd-gpios = <&pio 8 11 GPIO_ACTIVE_LOW>; // PI11 > + status = "okay"; > +}; > + > +&mmc3 { > + vmmc-supply = <®_dcdc1>; > + vqmmc-supply = <®_dcdc1>; > + bus-width = <4>; > + cd-gpios = <&pio 8 10 GPIO_ACTIVE_LOW>; // PI10 > + status = "okay"; > +}; > + > +&ohci1 { > + status = "okay"; > +}; > + > +&ohci2 { > + status = "okay"; > +}; > + > +®_dc1sw { > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-lcd"; > +}; > + > +®_dldo2 { > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-wifi"; > +}; > + > +&tcon_tv0 { > + status = "okay"; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_pb_pins>; > + status = "okay"; > +}; > + > +&uart2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart2_pi_pins>, <&uart2_rts_cts_pi_pins>; > + uart-has-rtscts; > + status = "okay"; > +}; > + > +&uart3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>; > + uart-has-rtscts; > + status = "okay"; > +}; > + > +&uart4 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart4_pg_pins>; > + status = "okay"; > +}; > + > +&uart5 { /* RS485 */ > + pinctrl-names = "default"; > + pinctrl-0 = <&uart5_ph_pins>; > + status = "okay"; > +}; > + > +&uart7 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart7_pi_pins>; > + status = "okay"; > +}; > + > +&usbphy { > + usb1_vbus-supply = <®_vcc5v0>; > + usb2_vbus-supply = <®_vcc5v0>; > + status = "okay"; > +}; > diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi > index d5ad3b9efd..03d3e5f45a 100644 > --- a/arch/arm/dts/sun8i-r40.dtsi > +++ b/arch/arm/dts/sun8i-r40.dtsi > @@ -357,6 +357,8 @@ > clock-names = "ahb", "mmc"; > resets = <&ccu RST_BUS_MMC3>; > reset-names = "ahb"; > + pinctrl-0 = <&mmc3_pins>; > + pinctrl-names = "default"; > interrupts = ; > status = "disabled"; > #address-cells = <1>; > @@ -509,6 +511,16 @@ > #interrupt-cells = <3>; > #gpio-cells = <3>; > > + can_ph_pins: can-ph-pins { > + pins = "PH20", "PH21"; > + function = "can"; > + }; > + > + can_pa_pins: can-pa-pins { > + pins = "PA16", "PA17"; > + function = "can"; > + }; > + > clk_out_a_pin: clk-out-a-pin { > pins = "PI12"; > function = "clk_out_a"; > @@ -601,6 +613,15 @@ > bias-pull-up; > }; > > + /omit-if-no-ref/ > + mmc3_pins: mmc3-pins { > + pins = "PI4", "PI5", "PI6", > + "PI7", "PI8", "PI9"; > + function = "mmc3"; > + drive-strength = <30>; > + bias-pull-up; > + }; > + > /omit-if-no-ref/ > spi0_pc_pins: spi0-pc-pins { > pins = "PC0", "PC1", "PC2"; > @@ -631,20 +652,65 @@ > function = "spi1"; > }; > > + /omit-if-no-ref/ > uart0_pb_pins: uart0-pb-pins { > pins = "PB22", "PB23"; > function = "uart0"; > }; > > + /omit-if-no-ref/ > + uart2_pi_pins: uart2-pi-pins { > + pins = "PI18", "PI19"; > + function = "uart2"; > + }; > + > + /omit-if-no-ref/ > + uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{ > + pins = "PI16", "PI17"; > + function = "uart2"; > + }; > + > + /omit-if-no-ref/ > uart3_pg_pins: uart3-pg-pins { > pins = "PG6", "PG7"; > function = "uart3"; > }; > > + /omit-if-no-ref/ > uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins { > pins = "PG8", "PG9"; > function = "uart3"; > }; > + > + /omit-if-no-ref/ > + uart4_pg_pins: uart4-pg-pins { > + pins = "PG10", "PG11"; > + function = "uart4"; > + }; > + > + /omit-if-no-ref/ > + uart5_ph_pins: uart5-ph-pins { > + pins = "PH6", "PH7"; > + function = "uart5"; > + }; > + > + /omit-if-no-ref/ > + uart7_pi_pins: uart7-pi-pins { > + pins = "PI20", "PI21"; > + function = "uart7"; > + }; > + }; > + > + timer@1c20c00 { > + compatible = "allwinner,sun4i-a10-timer"; > + reg = <0x01c20c00 0x90>; > + interrupts = , > + , > + , > + , > + , > + ; > + clocks = <&osc24M>; > }; > > wdt: watchdog@1c20c90 { > @@ -680,6 +746,45 @@ > status = "disabled"; > }; > > + i2s0: i2s@1c22000 { > + #sound-dai-cells = <0>; > + compatible = "allwinner,sun8i-r40-i2s", > + "allwinner,sun8i-h3-i2s"; > + reg = <0x01c22000 0x400>; > + interrupts = ; > + clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>; > + clock-names = "apb", "mod"; > + resets = <&ccu RST_BUS_I2S0>; > + dmas = <&dma 3>, <&dma 3>; > + dma-names = "rx", "tx"; > + }; > + > + i2s1: i2s@1c22400 { > + #sound-dai-cells = <0>; > + compatible = "allwinner,sun8i-r40-i2s", > + "allwinner,sun8i-h3-i2s"; > + reg = <0x01c22400 0x400>; > + interrupts = ; > + clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>; > + clock-names = "apb", "mod"; > + resets = <&ccu RST_BUS_I2S1>; > + dmas = <&dma 4>, <&dma 4>; > + dma-names = "rx", "tx"; > + }; > + > + i2s2: i2s@1c22800 { > + #sound-dai-cells = <0>; > + compatible = "allwinner,sun8i-r40-i2s", > + "allwinner,sun8i-h3-i2s"; > + reg = <0x01c22800 0x400>; > + interrupts = ; > + clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>; > + clock-names = "apb", "mod"; > + resets = <&ccu RST_BUS_I2S2>; > + dmas = <&dma 6>, <&dma 6>; > + dma-names = "rx", "tx"; > + }; > + > ths: thermal-sensor@1c24c00 { > compatible = "allwinner,sun8i-r40-ths"; > reg = <0x01c24c00 0x100>; > @@ -831,6 +936,15 @@ > #size-cells = <0>; > }; > > + can0: can@1c2bc00 { > + compatible = "allwinner,sun8i-r40-can"; > + reg = <0x01c2bc00 0x400>; > + interrupts = ; > + clocks = <&ccu CLK_BUS_CAN>; > + resets = <&ccu RST_BUS_CAN>; > + status = "disabled"; > + }; > + > i2c4: i2c@1c2c000 { > compatible = "allwinner,sun6i-a31-i2c"; > reg = <0x01c2c000 0x400>; > @@ -1117,8 +1231,8 @@ > reg-io-width = <1>; > interrupts = ; > clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>, > - <&ccu CLK_HDMI>; > - clock-names = "iahb", "isfr", "tmds"; > + <&ccu CLK_HDMI>, <&rtc 0>; > + clock-names = "iahb", "isfr", "tmds", "cec"; > resets = <&ccu RST_BUS_HDMI1>; > reset-names = "ctrl"; > phys = <&hdmi_phy>; > diff --git a/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts > new file mode 100644 > index 0000000000..6931aaab23 > --- /dev/null > +++ b/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts > @@ -0,0 +1,226 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Copyright (C) 2017 Chen-Yu Tsai > + * Copyright (C) 2017 Icenowy Zheng > + * Copyright (C) 2018 Hao Zhang > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of the > + * License, or (at your option) any later version. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +/dts-v1/; > +#include "sun8i-r40.dtsi" > + > +#include > + > +/ { > + model = "t3-cqa3t-bv3"; > + compatible = "qihua,t3-cqa3t-bv3", "allwinner,sun8i-t3", > + "allwinner,sun8i-r40"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + connector { > + compatible = "hdmi-connector"; > + type = "a"; > + > + port { > + hdmi_con_in: endpoint { > + remote-endpoint = <&hdmi_out_con>; > + }; > + }; > + }; > + > + reg_vcc5v0: vcc5v0 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc5v0"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */ > + enable-active-high; > + }; > +}; > + > +&ahci { > + ahci-supply = <®_dldo4>; > + phy-supply = <®_eldo3>; > + status = "okay"; > +}; > + > +&de { > + status = "okay"; > +}; > + > +&ehci1 { > + status = "okay"; > +}; > + > +&ehci2 { > + status = "okay"; > +}; > + > +&hdmi { > + status = "okay"; > +}; > + > +&hdmi_out { > + hdmi_out_con: endpoint { > + remote-endpoint = <&hdmi_con_in>; > + }; > +}; > + > +&i2c0 { > + status = "okay"; > + > + axp22x: pmic@34 { > + compatible = "x-powers,axp221"; > + reg = <0x34>; > + interrupt-parent = <&nmi_intc>; > + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; > + }; > +}; > + > +#include "axp22x.dtsi" > + > +&mmc0 { > + vmmc-supply = <®_dcdc1>; > + bus-width = <4>; > + cd-gpios = <&pio 7 15 GPIO_ACTIVE_LOW>; /* PH15 */ > + status = "okay"; > +}; > + > +&mmc2 { > + vmmc-supply = <®_dcdc1>; > + vqmmc-supply = <®_dcdc1>; > + bus-width = <8>; > + non-removable; > + status = "okay"; > +}; > + > +&ohci1 { > + status = "okay"; > +}; > + > +&ohci2 { > + status = "okay"; > +}; > + > +®_aldo2 { > + regulator-always-on; > + regulator-min-microvolt = <2500000>; > + regulator-max-microvolt = <2500000>; > + regulator-name = "vcc-pa"; > +}; > + > +®_aldo3 { > + regulator-always-on; > + regulator-min-microvolt = <2700000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "avcc"; > +}; > + > +®_dcdc1 { > + regulator-always-on; > + regulator-min-microvolt = <3000000>; > + regulator-max-microvolt = <3000000>; > + regulator-name = "vcc-3v0"; > +}; > + > +®_dcdc2 { > + regulator-always-on; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1300000>; > + regulator-name = "vdd-cpu"; > +}; > + > +®_dcdc3 { > + regulator-always-on; > + regulator-min-microvolt = <1000000>; > + regulator-max-microvolt = <1300000>; > + regulator-name = "vdd-sys"; > +}; > + > +®_dcdc5 { > + regulator-always-on; > + regulator-min-microvolt = <1500000>; > + regulator-max-microvolt = <1500000>; > + regulator-name = "vcc-dram"; > +}; > + > +®_dldo1 { > + regulator-always-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-pg"; > +}; > + > +®_dldo3 { > + regulator-always-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-name = "vcc-dldo3"; > +}; > + > +®_eldo3 { > + regulator-always-on; > + regulator-min-microvolt = <2800000>; > + regulator-max-microvolt = <2800000>; > + regulator-name = "vcc-pe"; > +}; > + > +&tcon_tv0 { > + status = "okay"; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_pb_pins>; > + status = "okay"; > +}; > + > +&usbphy { > + usb1_vbus-supply = <®_vcc5v0>; > + usb2_vbus-supply = <®_vcc5v0>; > + status = "okay"; > +};