From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CB1DC433EF for ; Mon, 23 May 2022 06:03:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235662AbiEWGC6 (ORCPT ); Mon, 23 May 2022 02:02:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233081AbiEWGBQ (ORCPT ); Mon, 23 May 2022 02:01:16 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DCDCC102C; Sun, 22 May 2022 23:01:11 -0700 (PDT) X-UUID: 66f0b8326af3447c9ce6752472e503ed-20220523 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:ba4c823f-132f-46ce-b6dc-8a7f447b15ea,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:2a19b09,CLOUDID:88773e7a-5ef6-470b-96c9-bdb8ced32786,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:1,EDM:-3,IP:nil,URL:0,File:nil ,QS:0,BEC:nil X-UUID: 66f0b8326af3447c9ce6752472e503ed-20220523 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 105743696; Mon, 23 May 2022 14:01:01 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 23 May 2022 14:01:00 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 23 May 2022 14:01:00 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 23 May 2022 14:00:59 +0800 From: Rex-BC Chen To: , , , , CC: , , , , , , , , , , , , Rex-BC Chen Subject: [PATCH v8 16/19] arm64: dts: mediatek: Add infra #reset-cells property for MT8195 Date: Mon, 23 May 2022 14:00:53 +0800 Message-ID: <20220523060056.24396-17-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220523060056.24396-1-rex-bc.chen@mediatek.com> References: <20220523060056.24396-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We will use mediatek clock reset as infracfg_ao reset instead of ti-syscon. To support this, remove property of ti reset and add property of #reset-cells for mediatek clock reset. Signed-off-by: Rex-BC Chen Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Nícolas F. R. A. Prado Tested-by: Nícolas F. R. A. Prado --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index b57e620c2c72..db16eba9d475 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -10,7 +10,6 @@ #include #include #include -#include / { compatible = "mediatek,mt8195"; @@ -292,20 +291,10 @@ }; infracfg_ao: syscon@10001000 { - compatible = "mediatek,mt8195-infracfg_ao", "syscon", "simple-mfd"; + compatible = "mediatek,mt8195-infracfg_ao", "syscon"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; - - infracfg_rst: reset-controller { - compatible = "ti,syscon-reset"; - #reset-cells = <1>; - ti,reset-bits = < - 0x140 18 0x144 18 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* pcie */ - 0x120 0 0x124 0 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* thermal */ - 0x730 10 0x734 10 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* thermal */ - 0x150 5 0x154 5 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* svs gpu */ - >; - }; + #reset-cells = <1>; }; pericfg: syscon@10003000 { -- 2.18.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04E1BC433F5 for ; Mon, 23 May 2022 09:00:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SSApiHrkWY9SkmhJB/uTiLTIWGHn7Gj8Y5GHldrYOBQ=; b=3/vakY31b9bZf3 rPTFRMgwHWfUg8mAObId/E9eNyVs4gN0ez7vw1147JEt1lWVM2QXPDJQrYmTwNzRMIZCxA+jyjzXN J3XxcSptCJhrr96ROiLzrfAqijcDcvLKXGcSjPJM7zK//HCTtPmc6d/mrVxn4zA9cbY3cwm6lR+OK l53hXtZQCvrHIxRH0R+kgf9Vx445rnWtTX6Xa5PFDhmNAOjbiS3cnV+KjCEDFPZHdE4emUDLMARqJ N3njjOOkJ+RmvVeLQlwOITX+cHhvxQFiMuH25BQMQXPR7BwyegHJwmME/IQkKzcGe+yHVPDrgp6DT eSqrM3gcZ6At3sYwasog==; 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Mon, 23 May 2022 14:01:00 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 23 May 2022 14:00:59 +0800 From: Rex-BC Chen To: , , , , CC: , , , , , , , , , , , , Rex-BC Chen Subject: [PATCH v8 16/19] arm64: dts: mediatek: Add infra #reset-cells property for MT8195 Date: Mon, 23 May 2022 14:00:53 +0800 Message-ID: <20220523060056.24396-17-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220523060056.24396-1-rex-bc.chen@mediatek.com> References: <20220523060056.24396-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220523_071124_839917_BC07BAFA X-CRM114-Status: GOOD ( 10.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org V2Ugd2lsbCB1c2UgbWVkaWF0ZWsgY2xvY2sgcmVzZXQgYXMgaW5mcmFjZmdfYW8gcmVzZXQgaW5z dGVhZCBvZgp0aS1zeXNjb24uIFRvIHN1cHBvcnQgdGhpcywgcmVtb3ZlIHByb3BlcnR5IG9mIHRp IHJlc2V0IGFuZCBhZGQKcHJvcGVydHkgb2YgI3Jlc2V0LWNlbGxzIGZvciBtZWRpYXRlayBjbG9j ayByZXNldC4KClNpZ25lZC1vZmYtYnk6IFJleC1CQyBDaGVuIDxyZXgtYmMuY2hlbkBtZWRpYXRl ay5jb20+ClJldmlld2VkLWJ5OiBBbmdlbG9HaW9hY2NoaW5vIERlbCBSZWdubyA8YW5nZWxvZ2lv YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tPgpSZXZpZXdlZC1ieTogTsOtY29sYXMgRi4g Ui4gQS4gUHJhZG8gPG5mcmFwcmFkb0Bjb2xsYWJvcmEuY29tPgpUZXN0ZWQtYnk6IE7DrWNvbGFz IEYuIFIuIEEuIFByYWRvIDxuZnJhcHJhZG9AY29sbGFib3JhLmNvbT4KLS0tCiBhcmNoL2FybTY0 L2Jvb3QvZHRzL21lZGlhdGVrL210ODE5NS5kdHNpIHwgMTUgKystLS0tLS0tLS0tLS0tCiAxIGZp bGUgY2hhbmdlZCwgMiBpbnNlcnRpb25zKCspLCAxMyBkZWxldGlvbnMoLSkKCmRpZmYgLS1naXQg YS9hcmNoL2FybTY0L2Jvb3QvZHRzL21lZGlhdGVrL210ODE5NS5kdHNpIGIvYXJjaC9hcm02NC9i b290L2R0cy9tZWRpYXRlay9tdDgxOTUuZHRzaQppbmRleCBiNTdlNjIwYzJjNzIuLmRiMTZlYmE5 ZDQ3NSAxMDA2NDQKLS0tIGEvYXJjaC9hcm02NC9ib290L2R0cy9tZWRpYXRlay9tdDgxOTUuZHRz aQorKysgYi9hcmNoL2FybTY0L2Jvb3QvZHRzL21lZGlhdGVrL210ODE5NS5kdHNpCkBAIC0xMCw3 ICsxMCw2IEBACiAjaW5jbHVkZSA8ZHQtYmluZGluZ3MvaW50ZXJydXB0LWNvbnRyb2xsZXIvaXJx Lmg+CiAjaW5jbHVkZSA8ZHQtYmluZGluZ3MvcGh5L3BoeS5oPgogI2luY2x1ZGUgPGR0LWJpbmRp bmdzL3BpbmN0cmwvbXQ4MTk1LXBpbmZ1bmMuaD4KLSNpbmNsdWRlIDxkdC1iaW5kaW5ncy9yZXNl dC90aS1zeXNjb24uaD4KIAogLyB7CiAJY29tcGF0aWJsZSA9ICJtZWRpYXRlayxtdDgxOTUiOwpA QCAtMjkyLDIwICsyOTEsMTAgQEAKIAkJfTsKIAogCQlpbmZyYWNmZ19hbzogc3lzY29uQDEwMDAx MDAwIHsKLQkJCWNvbXBhdGlibGUgPSAibWVkaWF0ZWssbXQ4MTk1LWluZnJhY2ZnX2FvIiwgInN5 c2NvbiIsICJzaW1wbGUtbWZkIjsKKwkJCWNvbXBhdGlibGUgPSAibWVkaWF0ZWssbXQ4MTk1LWlu ZnJhY2ZnX2FvIiwgInN5c2NvbiI7CiAJCQlyZWcgPSA8MCAweDEwMDAxMDAwIDAgMHgxMDAwPjsK IAkJCSNjbG9jay1jZWxscyA9IDwxPjsKLQotCQkJaW5mcmFjZmdfcnN0OiByZXNldC1jb250cm9s bGVyIHsKLQkJCQljb21wYXRpYmxlID0gInRpLHN5c2Nvbi1yZXNldCI7Ci0JCQkJI3Jlc2V0LWNl bGxzID0gPDE+OwotCQkJCXRpLHJlc2V0LWJpdHMgPSA8Ci0JCQkJCTB4MTQwIDE4IDB4MTQ0IDE4 IDAgMCAoQVNTRVJUX1NFVCB8IERFQVNTRVJUX1NFVCB8IFNUQVRVU19OT05FKSAvKiBwY2llICov Ci0JCQkJCTB4MTIwIDAgIDB4MTI0IDAgIDAgMCAoQVNTRVJUX1NFVCB8IERFQVNTRVJUX1NFVCB8 IFNUQVRVU19OT05FKSAvKiB0aGVybWFsICovCi0JCQkJCTB4NzMwIDEwIDB4NzM0IDEwIDAgMCAo QVNTRVJUX1NFVCB8IERFQVNTRVJUX1NFVCB8IFNUQVRVU19OT05FKSAvKiB0aGVybWFsICovCi0J CQkJCTB4MTUwIDUgIDB4MTU0IDUgIDAgMCAoQVNTRVJUX1NFVCB8IERFQVNTRVJUX1NFVCB8IFNU QVRVU19OT05FKSAvKiBzdnMgZ3B1ICovCi0JCQkJPjsKLQkJCX07CisJCQkjcmVzZXQtY2VsbHMg PSA8MT47CiAJCX07CiAKIAkJcGVyaWNmZzogc3lzY29uQDEwMDAzMDAwIHsKLS0gCjIuMTguMAoK Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFy bS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9y ZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1r ZXJuZWwK