Hi all,

On Mon, 23 May 2022 14:24:31 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Today's linux-next merge of the tip tree got a conflict in:
> 
>   scripts/Makefile.build
> 
> between commit:
> 
>   0212301af7bb ("kbuild: do not create *.prelink.o for Clang LTO or IBT")
> 
> from the kbuild tree and commit:
> 
>   753da4179d08 ("objtool: Remove --lto and --vmlinux in favor of --link")
> 
> from the tip tree.
> 
> I am not sure if I fixed this up correctly, please check the final result
> when linux-next is released.
> 
> I fixed it up (I used the former version) and can carry the fix as
> necessary. This is now fixed as far as linux-next is concerned, but any
> non trivial conflicts should be mentioned to your upstream maintainer
> when your tree is submitted for merging.  You may also want to consider
> cooperating with the maintainer of the conflicting tree to minimise any
> particularly complex conflicts.

That produced may warnings :-(   so I tried the below resolution instead.

-- 
Cheers,
Stephen Rothwell

70023a983b831421d2bac71f46b94bce024a147b
diff --cc scripts/Makefile.build
index 48712bfc8740,f89d3fcff39f..cbe9b45e7b7d
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@@ -226,18 -244,23 +230,19 @@@ objtool_args =								
  cmd_objtool = $(if $(objtool-enabled), ; $(objtool) $(objtool_args) $@)
  cmd_gen_objtooldep = $(if $(objtool-enabled), { echo ; echo '$@: $$(wildcard $(objtool))' ; } >> $(dot-target).cmd)
  
- endif # CONFIG_STACK_VALIDATION
+ endif # CONFIG_OBJTOOL
  
 -ifneq ($(CONFIG_LTO_CLANG)$(CONFIG_X86_KERNEL_IBT),)
 -
 -# Skip objtool for LLVM bitcode
 -$(obj)/%.o: objtool-enabled :=
 -
 -else
  
  # 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
  # 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
  # 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
  
 -$(obj)/%.o: objtool-enabled = $(if $(filter-out y%, \
 -	$(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n),y)
 +is-standard-object = $(if $(filter-out y%, $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n),y)
  
 -endif
 +delay-objtool := $(or $(CONFIG_LTO_CLANG),$(CONFIG_X86_KERNEL_IBT))
 +
 +$(obj)/%.o: objtool-enabled = $(if $(is-standard-object),$(if $(delay-objtool),$(is-single-obj-m),y))
++$(obj)/%.o: linked-object := y
  
  ifdef CONFIG_TRIM_UNUSED_KSYMS
  cmd_gen_ksymdeps = \
@@@ -404,24 -464,32 +409,25 @@@ $(obj)/modules.order: $(obj-m) FORC
  #
  # Rule to compile a set of .o files into one .a file (with symbol table)
  #
 -quiet_cmd_ar_lib = AR      $@
 -      cmd_ar_lib = $(cmd_update_lto_symversions); $(cmd_ar)
  
  $(obj)/lib.a: $(lib-y) FORCE
 -	$(call if_changed,ar_lib)
 -
 -# NOTE:
 -# Do not replace $(filter %.o,^) with $(real-prereqs). When a single object
 -# module is turned into a multi object module, $^ will contain header file
 -# dependencies recorded in the .*.cmd file.
 -ifneq ($(CONFIG_LTO_CLANG)$(CONFIG_X86_KERNEL_IBT),)
 -quiet_cmd_link_multi-m = AR [M]  $@
 -cmd_link_multi-m =						\
 -	$(cmd_update_lto_symversions);				\
 -	rm -f $@; 						\
 -	$(AR) cDPrsT $@ $(filter %.o,$^)
 -else
 -quiet_cmd_link_multi-m = LD [M]  $@
 -      cmd_link_multi-m = $(LD) $(ld_flags) -r -o $@ $(filter %.o,$^)
 -endif
 +	$(call if_changed,ar)
 +
 +quiet_cmd_ld_multi_m = LD [M]  $@
 +      cmd_ld_multi_m = $(LD) $(ld_flags) -r -o $@ @$(patsubst %.o,%.mod,$@) $(cmd_objtool)
 +
 +define rule_ld_multi_m
 +	$(call cmd_and_savecmd,ld_multi_m)
 +	$(call cmd,gen_objtooldep)
 +endef
  
 -$(multi-obj-m): FORCE
 -	$(call if_changed,link_multi-m)
 +$(multi-obj-m): objtool-enabled := $(delay-objtool)
 +$(multi-obj-m): part-of-module := y
++$(multi-obj-m): linked-object := y
 +$(multi-obj-m): %.o: %.mod FORCE
 +	$(call if_changed_rule,ld_multi_m)
  $(call multi_depend, $(multi-obj-m), .o, -objs -y -m)
  
 -targets += $(multi-obj-m)
  targets := $(filter-out $(PHONY), $(targets))
  
  # Add intermediate targets: