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([93.188.34.55]) by smtp.gmail.com with ESMTPSA id j12-20020a5d618c000000b002102f4ebf73sm7673539wru.31.2022.05.31.16.08.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 May 2022 16:08:48 -0700 (PDT) From: Oleksandr Suvorov To: u-boot@lists.denx.de Cc: Michal Simek , Adrian Fiergolski , Ricardo Salveti , Jorge Ramirez-Ortiz , Igor Opaniuk , Oleksandr Suvorov , Michal Simek Subject: [PATCH v8 04/14] fpga: xilinx: add bitstream flags to driver desc Date: Wed, 1 Jun 2022 02:08:29 +0300 Message-Id: <20220531230839.183690-5-oleksandr.suvorov@foundries.io> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220531230839.183690-4-oleksandr.suvorov@foundries.io> References: <20220531230839.183690-1-oleksandr.suvorov@foundries.io> <20220531230839.183690-2-oleksandr.suvorov@foundries.io> <20220531230839.183690-3-oleksandr.suvorov@foundries.io> <20220531230839.183690-4-oleksandr.suvorov@foundries.io> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Store a set of supported bitstream types in xilinx_desc structure. It will be used to determine whether an FPGA image is able to be loaded with a given driver. Signed-off-by: Oleksandr Suvorov --- (no changes since v1) include/versalpl.h | 2 +- include/xilinx.h | 5 +++++ include/zynqmppl.h | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/include/versalpl.h b/include/versalpl.h index b94c82e6e66..26f04a2f649 100644 --- a/include/versalpl.h +++ b/include/versalpl.h @@ -15,6 +15,6 @@ extern struct xilinx_fpga_op versal_op; #define XILINX_VERSAL_DESC \ -{ xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op } +{ xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL, FPGA_LEGACY } #endif /* _VERSALPL_H_ */ diff --git a/include/xilinx.h b/include/xilinx.h index 362943bc717..91179abe31f 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -37,6 +37,9 @@ typedef enum { /* typedef xilinx_family */ max_xilinx_type /* insert all new types before this */ } xilinx_family; /* end, typedef xilinx_family */ +/* FPGA bitstream supported types */ +#define FPGA_LEGACY BIT(0) + typedef struct { /* typedef xilinx_desc */ xilinx_family family; /* part type */ xilinx_iface iface; /* interface type */ @@ -45,6 +48,7 @@ typedef struct { /* typedef xilinx_desc */ int cookie; /* implementation specific cookie */ struct xilinx_fpga_op *operations; /* operations */ char *name; /* device name in bitstream */ + int flags; /* compatible flags */ } xilinx_desc; /* end, typedef xilinx_desc */ struct xilinx_fpga_op { @@ -56,6 +60,7 @@ struct xilinx_fpga_op { struct fpga_secure_info *fpga_sec_info); int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize); int (*info)(xilinx_desc *desc); + int (*str2flag)(xilinx_desc *desc, const char *string); }; /* Generic Xilinx Functions diff --git a/include/zynqmppl.h b/include/zynqmppl.h index 35cfe17d444..a6e171dcb49 100644 --- a/include/zynqmppl.h +++ b/include/zynqmppl.h @@ -26,6 +26,6 @@ extern struct xilinx_fpga_op zynqmp_op; #define XILINX_ZYNQMP_DESC \ -{ xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op } +{ xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op, NULL, FPGA_LEGACY } #endif /* _ZYNQMPPL_H_ */ -- 2.36.1