From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B116CCCA473 for ; Wed, 1 Jun 2022 15:28:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355600AbiFAP2L (ORCPT ); Wed, 1 Jun 2022 11:28:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355537AbiFAP2J (ORCPT ); Wed, 1 Jun 2022 11:28:09 -0400 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 485F24A92D for ; Wed, 1 Jun 2022 08:27:57 -0700 (PDT) Received: by mail-ej1-x632.google.com with SMTP id rs12so4464828ejb.13 for ; Wed, 01 Jun 2022 08:27:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xkCtDUW8KDmXB613fVyiMXB2YkEaxXKxwnsWXEUT47c=; b=XiP4K+OXtb2g0sAVbW0Ke2qwQoraPZr10w0/Vtq1k4TkIRE0u3eyrJjQZe43kL6Dav 0ZSeFadD2rPMIK9nkZSwaTUvt+Q59JnKkGT11v0vjEoD+RkBhgviiwz3JeBREIrYzweG dZls+QHYfxbcxzOvNqXjFjTfr5pqWXEfs6MMiSc+blzO213hf7lxfAUUCqRuaCKANMf9 aftTQse8lDSa7syQNh+PcCG2f2+STlqhkbE5z70DLnPpxzLPCXd9twT1Hyl3IIidxKKA xgQ34hV625zUna8caTadBULW8PNRR1iTxczINECy+2bzW704DGgWqQF8mvAMYO0Ay1WC cT1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xkCtDUW8KDmXB613fVyiMXB2YkEaxXKxwnsWXEUT47c=; b=XLIhkVpnmKWB+UJo82u/6Gu3d2NuVDFLgoWSuOepsQz8WHQ0hMwHDJLURLcvX/n53P qcxrO3sb0UwskfMa/cedjMejXd6rpvM9CSM1NP2nC5WM7xuOgx6sdSgMb1bXF+u2zYir /AJ+GCaB/jrvuW6fa7vHtHDWknBSnhJXFg/rbu01S/Y5mrlgc1EX98YQauvPfAHPgD3p 4r7nkUHrldDfe2RZoQqQFhxTuJFMrfwJ1dx9gbT8CFLQ5yQB4HSvH5+cx7IWL5TFtdVX 5oWTe8DjM/NkckXkOnnbVk8py655xvoQb1SJZdsYtBHP0mgC/EiCuO1ewpKAgAPr3acv zLXw== X-Gm-Message-State: AOAM531ay2LoQAv1FpRk8JNxL/z31bHlCC3bEiqJ70YkDxFI0zDwfpjE AeiW7nOcqKCbK8CFaPBJv3EKnA== X-Google-Smtp-Source: ABdhPJzGUdJeCPAq3rdMERlG9nMzXccLGpPuKiSoDNm457/XviI9WvS5F1tm5ZIc1Ggy5IZD4IwCFg== X-Received: by 2002:a17:907:1690:b0:6f5:40d:f4bb with SMTP id hc16-20020a170907169000b006f5040df4bbmr25515ejc.495.1654097275757; Wed, 01 Jun 2022 08:27:55 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id e13-20020a170906248d00b006fee7b5dff2sm845870ejb.143.2022.06.01.08.27.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jun 2022 08:27:55 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 4/7] ARM: dts: exynos: use local header for pinctrl register values Date: Wed, 1 Jun 2022 17:27:17 +0200 Message-Id: <20220601152720.232383-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220601152720.232383-1-krzysztof.kozlowski@linaro.org> References: <20220601152720.232383-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos-pinctrl.h | 55 +++++++++++++++++++++++ arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos4412-midas.dtsi | 3 +- arch/arm/boot/dts/exynos4412-p4note.dtsi | 2 +- arch/arm/boot/dts/exynos4412-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5250-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5260-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5410-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 2 +- 10 files changed, 65 insertions(+), 9 deletions(-) create mode 100644 arch/arm/boot/dts/exynos-pinctrl.h diff --git a/arch/arm/boot/dts/exynos-pinctrl.h b/arch/arm/boot/dts/exynos-pinctrl.h new file mode 100644 index 000000000000..e3a6df95281c --- /dev/null +++ b/arch/arm/boot/dts/exynos-pinctrl.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Samsung Exynos DTS pinctrl constants + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Linaro Ltd + * Author: Krzysztof Kozlowski + */ + +#ifndef __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ +#define __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ + +#define EXYNOS_PIN_PULL_NONE 0 +#define EXYNOS_PIN_PULL_DOWN 1 +#define EXYNOS_PIN_PULL_UP 3 + +/* Pin function in power down mode */ +#define EXYNOS_PIN_PDN_OUT0 0 +#define EXYNOS_PIN_PDN_OUT1 1 +#define EXYNOS_PIN_PDN_INPUT 2 +#define EXYNOS_PIN_PDN_PREV 3 + +/* Drive strengths for Exynos3250, Exynos4 (all) and Exynos5250 */ +#define EXYNOS4_PIN_DRV_LV1 0 +#define EXYNOS4_PIN_DRV_LV2 2 +#define EXYNOS4_PIN_DRV_LV3 1 +#define EXYNOS4_PIN_DRV_LV4 3 + +/* Drive strengths for Exynos5260 */ +#define EXYNOS5260_PIN_DRV_LV1 0 +#define EXYNOS5260_PIN_DRV_LV2 1 +#define EXYNOS5260_PIN_DRV_LV4 2 +#define EXYNOS5260_PIN_DRV_LV6 3 + +/* + * Drive strengths for Exynos5410, Exynos542x, Exynos5800 and Exynos850 (except + * GPIO_HSI block) + */ +#define EXYNOS5420_PIN_DRV_LV1 0 +#define EXYNOS5420_PIN_DRV_LV2 1 +#define EXYNOS5420_PIN_DRV_LV3 2 +#define EXYNOS5420_PIN_DRV_LV4 3 + +#define EXYNOS_PIN_FUNC_INPUT 0 +#define EXYNOS_PIN_FUNC_OUTPUT 1 +#define EXYNOS_PIN_FUNC_2 2 +#define EXYNOS_PIN_FUNC_3 3 +#define EXYNOS_PIN_FUNC_4 4 +#define EXYNOS_PIN_FUNC_5 5 +#define EXYNOS_PIN_FUNC_6 6 +#define EXYNOS_PIN_FUNC_EINT 0xf +#define EXYNOS_PIN_FUNC_F EXYNOS_PIN_FUNC_EINT + +#endif /* __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ */ diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index cc30d154ec94..011ba2eff29e 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" #define PIN_IN(_pin, _pull, _drv) \ pin- ## _pin { \ diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 6373009bb727..76f44ae0de46 100644 --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -11,7 +11,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi index 23f50c9be527..b967397a46c5 100644 --- a/arch/arm/boot/dts/exynos4412-midas.dtsi +++ b/arch/arm/boot/dts/exynos4412-midas.dtsi @@ -12,11 +12,12 @@ /dts-v1/; #include "exynos4412.dtsi" #include "exynos4412-ppmu-common.dtsi" + #include #include #include #include -#include +#include "exynos-pinctrl.h" / { compatible = "samsung,midas", "samsung,exynos4412", "samsung,exynos4"; diff --git a/arch/arm/boot/dts/exynos4412-p4note.dtsi b/arch/arm/boot/dts/exynos4412-p4note.dtsi index 97f131b1014b..286a547b110e 100644 --- a/arch/arm/boot/dts/exynos4412-p4note.dtsi +++ b/arch/arm/boot/dts/exynos4412-p4note.dtsi @@ -15,8 +15,8 @@ #include #include #include -#include #include +#include "exynos-pinctrl.h" / { compatible = "samsung,p4note", "samsung,exynos4412", "samsung,exynos4"; diff --git a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi index 88b8afd55664..58847d4fa846 100644 --- a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" #define PIN_SLP(_pin, _mode, _pull) \ _pin { \ diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi index 918947a3897e..48732edadff1 100644 --- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi index 150607f8103d..43e4a541f479 100644 --- a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi index 6c7814b4372e..f7b923382892 100644 --- a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi @@ -6,7 +6,7 @@ * https://www.hardkernel.com */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index 546ba274f4e5..14cf9c4ca0ed 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpy7: gpy7-gpio-bank { -- 2.34.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0A60BC433EF for ; Wed, 1 Jun 2022 15:30:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yKqKYn3+9jvEwq5uQJVoya/dq6B221l0t95faoS6kCw=; b=4iju7AkqhT/rb9 fVqbXdXdH5f2G8y1evkrB2LHBW/7XYeHWnJBu78AZ7fIxqLEMkP52taZwt1+V3vDJSv/YllYMgi7e sXYYA/EX894TMoA9RP24PdPDvNi2yXud5Io7TXU2PvkUOP4GusOB3IX4UxA3BIhQpUtG1XgxgWi94 29smv+WA/wzvUgfK3XIzrl9Plo2zix8jSCOWqtKhGsuEyVEc9iGvaiUHeYqSi4L/8yU5vVntpFDM4 0JjfQfJnH7vE/2FVb4NDNGE53QVXXqgXEq2ttvJBaujX4p9DCQUBG/AO8562OY/ws1FdAIPBexh5E /aSyE0eN87Orl143Dcmw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nwQHl-00GtXw-2u; Wed, 01 Jun 2022 15:29:25 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nwQGT-00Gt4a-Qr for linux-arm-kernel@bombadil.infradead.org; Wed, 01 Jun 2022 15:28:05 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=xkCtDUW8KDmXB613fVyiMXB2YkEaxXKxwnsWXEUT47c=; b=lA7fgHrktvOfUx77nbWDvMm+Nb TPTzKAYZYSXHdwF8fks/t4KCAA/txMwPtffGzvt65fKVMM+3T30D90dJgYusuxXe6MvNdlEgci/51 pYYykc4sufUQUNAYMKGbs1SEwMG4EAymO6XPa9veIBurHoJqW8te+b8fc4WWHfHf50hWh9Tz7dDbS gb8s/qqo7XNBKJ6O7jkJRT19VfFKqO/wRPa+NZhQZI6ukp1c/Sfw+yWR8La7Hywh1Jf41uJs3h2mD Usto3aLCmekyWZlc3C12IriZQ9Y8Wk2WuUc6cDijzE8l4AE1qGYKDKvQ70KNL2XxigsAukUWH+M4W vvWhqPPw==; Received: from mail-ej1-x633.google.com ([2a00:1450:4864:20::633]) by desiato.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nwQGM-003on5-EI for linux-arm-kernel@lists.infradead.org; Wed, 01 Jun 2022 15:28:03 +0000 Received: by mail-ej1-x633.google.com with SMTP id q21so4549197ejm.1 for ; Wed, 01 Jun 2022 08:27:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xkCtDUW8KDmXB613fVyiMXB2YkEaxXKxwnsWXEUT47c=; b=XiP4K+OXtb2g0sAVbW0Ke2qwQoraPZr10w0/Vtq1k4TkIRE0u3eyrJjQZe43kL6Dav 0ZSeFadD2rPMIK9nkZSwaTUvt+Q59JnKkGT11v0vjEoD+RkBhgviiwz3JeBREIrYzweG dZls+QHYfxbcxzOvNqXjFjTfr5pqWXEfs6MMiSc+blzO213hf7lxfAUUCqRuaCKANMf9 aftTQse8lDSa7syQNh+PcCG2f2+STlqhkbE5z70DLnPpxzLPCXd9twT1Hyl3IIidxKKA xgQ34hV625zUna8caTadBULW8PNRR1iTxczINECy+2bzW704DGgWqQF8mvAMYO0Ay1WC cT1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xkCtDUW8KDmXB613fVyiMXB2YkEaxXKxwnsWXEUT47c=; b=cB2tP2f57RJRDSn8Gsyym81SWwizG+tka4nNSA3nX1nJcwIlHx9LhmG7P9R63VLX76 pr1K7GOxvCh/h8wBggfOzjqUzhaxBC7I4a0VjMWR740biAz/D/IAJqOpqQCElhCW3BhA tpxU9M0kA8zrMjT0ti42ONV3iGjS4J4813iEdou30RH8136FPFnzoWgJnvqQS+L7/4lk oYpYN2oSRy75TAcI6hDqBeFsHRVGYxqSNhcKwJgugqDMooZ8SqTL6z06A7ztAy++suAR /7WDbUT9h1JINHGMBawSsq5pMuj5RssqRFSaPHr/b0z0oRx5h2zkJaB0PzP9u1cJN71E eBlg== X-Gm-Message-State: AOAM531V4xR5/8SRKRiLQqkq0pBTl0YVSN6BgRjxnuSC1qMH13oLCkI1 Vvspz7kmgAnIM2ODf/POS5n2pg== X-Google-Smtp-Source: ABdhPJzGUdJeCPAq3rdMERlG9nMzXccLGpPuKiSoDNm457/XviI9WvS5F1tm5ZIc1Ggy5IZD4IwCFg== X-Received: by 2002:a17:907:1690:b0:6f5:40d:f4bb with SMTP id hc16-20020a170907169000b006f5040df4bbmr25515ejc.495.1654097275757; Wed, 01 Jun 2022 08:27:55 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id e13-20020a170906248d00b006fee7b5dff2sm845870ejb.143.2022.06.01.08.27.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jun 2022 08:27:55 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Tomasz Figa , Sylwester Nawrocki , Linus Walleij , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 4/7] ARM: dts: exynos: use local header for pinctrl register values Date: Wed, 1 Jun 2022 17:27:17 +0200 Message-Id: <20220601152720.232383-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220601152720.232383-1-krzysztof.kozlowski@linaro.org> References: <20220601152720.232383-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220601_162759_222963_EFD2AA2C X-CRM114-Status: GOOD ( 19.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos-pinctrl.h | 55 +++++++++++++++++++++++ arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos4412-midas.dtsi | 3 +- arch/arm/boot/dts/exynos4412-p4note.dtsi | 2 +- arch/arm/boot/dts/exynos4412-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5250-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5260-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5410-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos5420-pinctrl.dtsi | 2 +- 10 files changed, 65 insertions(+), 9 deletions(-) create mode 100644 arch/arm/boot/dts/exynos-pinctrl.h diff --git a/arch/arm/boot/dts/exynos-pinctrl.h b/arch/arm/boot/dts/exynos-pinctrl.h new file mode 100644 index 000000000000..e3a6df95281c --- /dev/null +++ b/arch/arm/boot/dts/exynos-pinctrl.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Samsung Exynos DTS pinctrl constants + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Linaro Ltd + * Author: Krzysztof Kozlowski + */ + +#ifndef __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ +#define __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ + +#define EXYNOS_PIN_PULL_NONE 0 +#define EXYNOS_PIN_PULL_DOWN 1 +#define EXYNOS_PIN_PULL_UP 3 + +/* Pin function in power down mode */ +#define EXYNOS_PIN_PDN_OUT0 0 +#define EXYNOS_PIN_PDN_OUT1 1 +#define EXYNOS_PIN_PDN_INPUT 2 +#define EXYNOS_PIN_PDN_PREV 3 + +/* Drive strengths for Exynos3250, Exynos4 (all) and Exynos5250 */ +#define EXYNOS4_PIN_DRV_LV1 0 +#define EXYNOS4_PIN_DRV_LV2 2 +#define EXYNOS4_PIN_DRV_LV3 1 +#define EXYNOS4_PIN_DRV_LV4 3 + +/* Drive strengths for Exynos5260 */ +#define EXYNOS5260_PIN_DRV_LV1 0 +#define EXYNOS5260_PIN_DRV_LV2 1 +#define EXYNOS5260_PIN_DRV_LV4 2 +#define EXYNOS5260_PIN_DRV_LV6 3 + +/* + * Drive strengths for Exynos5410, Exynos542x, Exynos5800 and Exynos850 (except + * GPIO_HSI block) + */ +#define EXYNOS5420_PIN_DRV_LV1 0 +#define EXYNOS5420_PIN_DRV_LV2 1 +#define EXYNOS5420_PIN_DRV_LV3 2 +#define EXYNOS5420_PIN_DRV_LV4 3 + +#define EXYNOS_PIN_FUNC_INPUT 0 +#define EXYNOS_PIN_FUNC_OUTPUT 1 +#define EXYNOS_PIN_FUNC_2 2 +#define EXYNOS_PIN_FUNC_3 3 +#define EXYNOS_PIN_FUNC_4 4 +#define EXYNOS_PIN_FUNC_5 5 +#define EXYNOS_PIN_FUNC_6 6 +#define EXYNOS_PIN_FUNC_EINT 0xf +#define EXYNOS_PIN_FUNC_F EXYNOS_PIN_FUNC_EINT + +#endif /* __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ */ diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index cc30d154ec94..011ba2eff29e 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" #define PIN_IN(_pin, _pull, _drv) \ pin- ## _pin { \ diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 6373009bb727..76f44ae0de46 100644 --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -11,7 +11,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi index 23f50c9be527..b967397a46c5 100644 --- a/arch/arm/boot/dts/exynos4412-midas.dtsi +++ b/arch/arm/boot/dts/exynos4412-midas.dtsi @@ -12,11 +12,12 @@ /dts-v1/; #include "exynos4412.dtsi" #include "exynos4412-ppmu-common.dtsi" + #include #include #include #include -#include +#include "exynos-pinctrl.h" / { compatible = "samsung,midas", "samsung,exynos4412", "samsung,exynos4"; diff --git a/arch/arm/boot/dts/exynos4412-p4note.dtsi b/arch/arm/boot/dts/exynos4412-p4note.dtsi index 97f131b1014b..286a547b110e 100644 --- a/arch/arm/boot/dts/exynos4412-p4note.dtsi +++ b/arch/arm/boot/dts/exynos4412-p4note.dtsi @@ -15,8 +15,8 @@ #include #include #include -#include #include +#include "exynos-pinctrl.h" / { compatible = "samsung,p4note", "samsung,exynos4412", "samsung,exynos4"; diff --git a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi index 88b8afd55664..58847d4fa846 100644 --- a/arch/arm/boot/dts/exynos4412-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4412-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" #define PIN_SLP(_pin, _mode, _pull) \ _pin { \ diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi index 918947a3897e..48732edadff1 100644 --- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi index 150607f8103d..43e4a541f479 100644 --- a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi index 6c7814b4372e..f7b923382892 100644 --- a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi @@ -6,7 +6,7 @@ * https://www.hardkernel.com */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpa0: gpa0-gpio-bank { diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index 546ba274f4e5..14cf9c4ca0ed 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -9,7 +9,7 @@ * tree nodes are listed in this file. */ -#include +#include "exynos-pinctrl.h" &pinctrl_0 { gpy7: gpy7-gpio-bank { -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel