From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18E8EC433EF for ; Thu, 2 Jun 2022 11:21:11 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B599584352; Thu, 2 Jun 2022 13:20:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=tinet.cat Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 6079883E8A; Thu, 2 Jun 2022 13:07:06 +0200 (CEST) Received: from mx1.tinet.cat (mx1.dipta.cat [195.76.233.59]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E4E7983EDC for ; Thu, 2 Jun 2022 13:07:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=tinet.cat Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=xdrudis@tinet.cat X-ASG-Debug-ID: 1654168021-12aaf267664c1df0001-4l7tJC Received: from smtp01.tinet.cat (smtp.tinet.cat [195.77.216.131]) by mx1.tinet.cat with ESMTP id dfqkbpE115FOAlzS; Thu, 02 Jun 2022 13:07:01 +0200 (CEST) X-Barracuda-Envelope-From: xdrudis@tinet.cat X-Barracuda-Effective-Source-IP: smtp.tinet.cat[195.77.216.131] X-Barracuda-Apparent-Source-IP: 195.77.216.131 Received: from begut (50.red-79-152-182.dynamicip.rima-tde.net [79.152.182.50]) by smtp01.tinet.cat (Postfix) with ESMTPSA id 574E76063582; Thu, 2 Jun 2022 13:07:01 +0200 (CEST) Date: Thu, 2 Jun 2022 13:06:59 +0200 From: Xavier Drudis Ferran To: u-boot@lists.denx.de Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com, lukma@denx.de, seanga2@gmail.com Subject: Re: [PATCH 2/3] Add a couple of missing clocks for MMCSD. Message-ID: <20220602110659.GD1727@begut> X-ASG-Orig-Subj: Re: [PATCH 2/3] Add a couple of missing clocks for MMCSD. References: <20220602110200.GB1727@begut> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20220602110200.GB1727@begut> User-Agent: Mutt/1.10.1 (2018-07-13) X-Barracuda-Connect: smtp.tinet.cat[195.77.216.131] X-Barracuda-Start-Time: 1654168021 X-Barracuda-URL: https://webmail.tinet.cat:443/cgi-mod/mark.cgi X-Barracuda-Scan-Msg-Size: 1519 X-Barracuda-BRTS-Status: 1 X-Barracuda-Bayes: INNOCENT GLOBAL 0.5002 1.0000 0.7500 X-Barracuda-Spam-Score: 0.75 X-Barracuda-Spam-Status: No, SCORE=0.75 using global scores of TAG_LEVEL=1000.0 QUARANTINE_LEVEL=6.0 KILL_LEVEL=8.0 tests= X-Barracuda-Spam-Report: Code version 3.2, rules version 3.2.3.98432 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------------------------- X-Mailman-Approved-At: Thu, 02 Jun 2022 13:20:24 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean This helped boot a Radxa Rock Pi 4B from SD card. With U-boot master at commit 4fe629d2e8bb ("Merge https://source.denx.de/u-boot/custodians/u-boot-riscv") from 2022-05-27T08:50:42-0400 and the SPI clock shorted to GND to make the bootrom boot from SD card, SPL stopped at the "Trying to boot from MMC1" message. Signed-off-by: Xavier Drudis Ferran --- drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 7d31a9f22a..fc3a5d4e9b 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -1184,6 +1184,12 @@ static int rk3399_clk_enable(struct clk *clk) case SCLK_PCIEPHY_REF: rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); break; + case SCLK_SDMMC: + rk_clrreg(&priv->cru->clksel_con[6], BIT(1)); + break; + case HCLK_SDMMC: + rk_clrreg(&priv->cru->clksel_con[33], BIT(8)); + break; default: debug("%s: unsupported clk %ld\n", __func__, clk->id); return -ENOENT; @@ -1278,6 +1284,12 @@ static int rk3399_clk_disable(struct clk *clk) case SCLK_PCIEPHY_REF: rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); break; + case SCLK_SDMMC: + rk_setreg(&priv->cru->clksel_con[6], BIT(1)); + break; + case HCLK_SDMMC: + rk_setreg(&priv->cru->clksel_con[33], BIT(8)); + break; default: debug("%s: unsupported clk %ld\n", __func__, clk->id); return -ENOENT; -- 2.20.1